Using Optical Means Patents (Class 324/750.23)
  • Publication number: 20130241587
    Abstract: A wafer stage and a method of supporting a wafer for inspection. the wafer stage comprises a platform for supporting a wafer such that a backside of the wafer is suspended above a cavity of the platform; and a support structure disposed substantially within the cavity for supporting a portion of the wafer; wherein the wafer stage is adapted for relative movement of the platform with respect to the support structure for alignment of the wafer with respect to a probe.
    Type: Application
    Filed: May 6, 2013
    Publication date: September 19, 2013
    Applicant: SEMICAPS PTE LTD
    Inventors: Choon Meng Chua, Lian Ser Koh, Wah Pheng Chua, Chee Hong Jacob Phang, Soon Huat Tan
  • Publication number: 20130207680
    Abstract: The invention relates to a device for the electromagnetic testing of an object, comprising a network of electromagnetic probes (2), a structure (3) for supporting the network of probes (2) and a support (4) for supporting the object being tested. According to the invention, the structure (3) is closed in the three dimensions of space all around the support (4) for the object being tested by at least one conductive wall (31) forming a Faraday cage which is fitted on its inner side by anechoic electromagnetic absorbers (5) located in the intervals between the probes (2).
    Type: Application
    Filed: October 7, 2011
    Publication date: August 15, 2013
    Applicant: SATIMO INDUSTRIES
    Inventors: Philippe Garreau, Luc Duchesne, Raphaël Laporte, Ludovic Durand
  • Patent number: 8508246
    Abstract: A substrate surface inspection apparatus and method enabling judgment and analysis of the state of even portions of a substrate supported by supports using a captured image are provided. A support mechanism 20 is used where positions of arrangement of substrate support positions along the direction perpendicular to a scan direction by a plurality of first supports 23a to 23d are set outside the image capturing ranges of the substrate 10 by the imaging units 30a, 30b at the first relative position and inside the common image capturing range and where positions of arrangement of substrate support positions along the direction perpendicular to the scan direction by the plurality of second supports 24a to 24d are set outside the image capturing ranges of the substrate by the imaging units at the second relative position and inside the common image capturing range.
    Type: Grant
    Filed: November 18, 2008
    Date of Patent: August 13, 2013
    Assignee: Shibaura Mechatronics Corporation
    Inventors: Hiroshi Wakaba, Yoshinori Hayashi, Koichi Miyazono, Yoko Ono, Hideki Mori, Shozo Kawasaki
  • Patent number: 8461857
    Abstract: The present invention relates to a distance adjustment system and a solar wafer inspection machine provided with the system. The inspection machine has a conveyer for carrying a solar wafer, an optical inspection system for inspecting the surface and color appearance of the wafer and an illumination inspection system. A holder is provided in the inspection position where the wafer is clamped along its width direction to prevent the wafer from offset. During the opto-electrical inspection, probes are brought into contact with conductive buses of the wafer and light is applied to the wafer to allow the probing of electric energy thus generated. An adjusting device is employed to adjust the clamping gap of the holder and the distance of the probes in accordance with the size of the solar wafer. The data are collected and transmitted to a sorting system for sorting the wafer.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: June 11, 2013
    Assignee: Chroma Ate Inc.
    Inventor: Chia-Hung Lai
  • Patent number: 8456185
    Abstract: Independent assemblies are compliantly mounted to a force transfer mechanism to optically align and thermally couple a device under test (DUT) to a test apparatus. A first assembly includes an optical connector. The first assembly has an alignment feature and a first compliant interface. A second assembly includes a thermal control member and force transfer members coupled to a structure. A passage permits a portion of the arm of the first assembly to extend through the structure. The force transfer members provide respective seats for an additional compliant interface. The alignment feature engages a corresponding feature to align the optical connector with the DUT before the compliant interfaces compress under an external force. Compliant mounting of the assemblies accommodates manufacturing tolerances in the DUT so that contact forces on the DUT are relatively consistent and thereby enable consistent optical and thermal coupling between the test apparatus and the DUT.
    Type: Grant
    Filed: August 17, 2010
    Date of Patent: June 4, 2013
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Frank Yashar, David J. K. Meadowcroft, Seng-Kum Chan
  • Patent number: 8452563
    Abstract: Provided is an error measurement and correction device of a stage of a wafer prober. The error measurement and correction device includes a jig member, a vision module, a central processing unit, and an interface unit. The jig member is disposed on a chuck on the stage, and the vision module is disposed on an upper plate of the wafer prober disposed at a position facing the jig member to enable the camera of the vision module to acquire images of the patterns of the jig member and transmits the acquired images to the central processing unit. The central processing unit acquires images of the patterns of the jig member disposed on the chuck by using the vision module to extract reference position information, moves the stage at a unit interval of the pattern, acquires images of the patterns of the jig member again to extract measured position information, and generates and stores mapping data by calculating difference between the measured position information and the reference position information.
    Type: Grant
    Filed: June 11, 2008
    Date of Patent: May 28, 2013
    Assignee: Semics Inc.
    Inventor: Jong-Guk Lee
  • Patent number: 8305100
    Abstract: The apparatus (1) for checking the operational condition of an electronic sensor element (3) which measures a physical quantity comprises testing means for providing a test deflection, corresponding to a specific change in the measured physical quantity, in the measurement signal produced by the sensor element and by a measuring circuit (2) connected thereto. According to the invention, the testing means comprise a testing circuit (4) which is galvanically separated from the measuring circuit and includes a light source (5a, 5b), and a light-sensitive component (6a, 6b) connected to the measuring circuit for receiving a light signal (7a, 7b) emitted by the light source and for further providing in the measurement signal a test deflection proportional to the light signal.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: November 6, 2012
    Inventor: Risto Hedman
  • Patent number: 8294480
    Abstract: An inspection apparatus includes a mounting table movable in X and Y directions and an alignment mechanism which performs an alignment of a target object placed on the mounting table. Further, the alignment mechanism includes an image pickup device which is movable in either one of the X and Y directions and is capable of being stopped at a desired position and a controller for performing a preliminary alignment of the target object by moving the image pickup device and the mounting table in respectively movable directions.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: October 23, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Masaru Suzuki, Yasuhito Yamamoto
  • Patent number: 8159243
    Abstract: A method of performing alignment of an array of probe tips of a probe card to corresponding contact pads for wafer probing applications by performing the steps of: obtaining a backside image of the wafer; overlaying a mapping of the contact pads over the backside image; selecting contact pads as landing points; obtaining an image of the probe tips array; comparing the landing points to corresponding positions of probe tips; and, if the positions of probe tips are not aligned with the landing point, rotating the probe card to align the positions of probe tips to the landing points.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: April 17, 2012
    Assignee: DCG Systems, Inc.
    Inventor: Richard Alan Portune
  • Publication number: 20110279136
    Abstract: An electronic component testing device includes a first imaging device for imaging an upper-surface electrode of an electronic component before the electronic component is held by a holding part, a second imaging device for imaging a contact terminal provided to a testing head, a third imaging device for imaging a lower-surface electrode of the electronic component held by the holding part, and a fourth imaging device for imaging a testing socket. A control device controls the position adjustment part of the testing head to adjust the position of the holding part, and thereby controlling, based on images captured by the first and second imaging devices, a holding orientation when the holding part holds the electronic component, and controlling, based on the images captured by the third and fourth imaging devices, a holding orientation of the holding part in relation to the testing socket.
    Type: Application
    Filed: May 13, 2011
    Publication date: November 17, 2011
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Masakuni SHIOZAWA
  • Publication number: 20110254574
    Abstract: A prober includes a probe card provided with a support board and a probe attached to the support board, a stage on which a measurement wafer is mounted, a camera provided over the probe card to observe an electrode pad of a first semiconductor chip formed on the measurement wafer, and a stage moving unit for moving the position of the stage relative to the probe card.
    Type: Application
    Filed: June 24, 2011
    Publication date: October 20, 2011
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Kazuhiro Tashiro
  • Patent number: 8011092
    Abstract: The invention includes methods of utilizing removable mechanical precising mechanisms and/or optical-based precising mechanisms to align chips within sockets. The sockets can be configured so that compression of the sockets opens a clamping mechanism. A chip can be placed within a socket with a manipulator and aligned during compression of the socket. Subsequently, the compression of the socket can be released while the manipulator remains in contact with the chip to hold the chip in place until the clamping mechanism is retaining the chip in the socket. The chip can then be released from the manipulator. The invention also includes systems for utilizing removable nests to align various chip geometries within generic socket designs.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: September 6, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Daniel P. Cram, A. Jay Stutzman
  • Patent number: 8013621
    Abstract: Disclosed is an inspection method capable of performing an inspection of high reliability even for very fine and thin-film electrode pads of a target object, by using needle traces formed on the electrode pads and making the electrode pads repeatedly contact the probes at high accuracy. In the inspection method, under the control of a control unit 15 of an inspection apparatus 10, by using old needle traces formed on the respective pads P of the target object such as a semiconductor wafer W, contactable regions S for the probes 12A in preparation for a present inspection, so that each of the probes 12A contact each of the electrode pad P in the contactable region S and within an empty area with no needle trace.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: September 6, 2011
    Assignee: Tokyo Electron Limited
    Inventors: Satoshi Sano, Daiki Kurihara
  • Patent number: 7977957
    Abstract: A contact-making apparatus for electrical connection of a unit under test to an electrical test device, having a plurality of electrical contacts which are associated with at least one holding element. The contact-making apparatus and preferably the holding element thereof, is provided with at least one marking which is in a defined position with respect to at least one of the contacts. The marking is detected for alignment of the apparatus and the unit. A corresponding method of use and a method of manufacture are also disclosed.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: July 12, 2011
    Assignee: Feinmetall GmbH
    Inventor: Gunther Böhm
  • Patent number: 7960981
    Abstract: A system and method of mitigating the effects of component deflections in a probe card analyzer system may implement three-dimensional comparative optical metrology techniques to model deflection characteristics. An exemplary system and method combine non-bussed electrical planarity measurements with fast optical planarity measurements to produce “effectively loaded” planarity measurements.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: June 14, 2011
    Assignee: Rudolph Technologies, Inc.
    Inventors: John T. Strom, Raymond H. Kraft
  • Patent number: 7924038
    Abstract: A probe having an alignment mark that is hardly influenced by scraps of an electrode scraped by a probe tip is provided. A probe according to the present invention comprises a base portion having an attaching end and extending in a direction distanced from the attaching end, an arm portion extending from the base portion laterally with a space in the extending direction of the base portion from the attaching end, a probe tip portion protruded from the arm portion and having a probe tip formed on its protruding end, and an alignment mark for alignment of the probe tip. The arm portion has a flat surface area on the opposite side of a side where the attaching end of the base portion is located when seen along the extending direction of the arm portion. The probe tip portion is formed to be protruded from the flat surface area, and the alignment mark is constituted by at least a part of the flat surface area.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: April 12, 2011
    Assignee: Kabushiki Kaisha Nihon Micronics
    Inventors: Shinji Kuniyoshi, Yuji Miyagi