By Mechanical Means Patents (Class 324/750.25)
  • Patent number: 12117484
    Abstract: A test device for testing an object under test is provided. The test device includes a plurality of probe assemblies, a lower substrate, an upper substrate, a plurality of spacers, and a plurality of shielding structures. The lower substrate is used for being coupled to first contact ends of the plurality of probe assemblies. The upper substrate has a plurality of through holes. Second contact ends of the plurality of probe assemblies protrude from the upper substrate through these through holes, so as to be electrically connected to the object under test. The plurality of shielding structures is disposed between the lower substrate and the upper substrate. The plurality of shielding structures is resilient. The upper substrate, the lower substrate and the shielding structure define a plurality of accommodating regions, and each accommodating region is used for accommodating at least one of the probe assemblies.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: October 15, 2024
    Assignee: teCat Technologies (Suzhou) Limited
    Inventor: Choon Leong Lou
  • Patent number: 12072176
    Abstract: Embodiments of the present application provide a measuring apparatus and method of a wafer geometry. The measuring apparatus of the wafer geometry includes: an air-bearing chuck, configured to generate an air cushion to keep a wafer to be measured floating up on a top surface of the air-bearing chuck; and an interferometer, disposed on one side, away from the air-bearing chuck, of the wafer, and configured to obtain an interference fringe image of a front surface of the wafer to measure a geometry of the wafer based on the interference fringe image. An air cushion is generated by utilizing an air-bearing chuck to keep a wafer to be measured floating up on a top surface of the air-bearing chuck, thereby avoiding damage of the original shape of the wafer or contamination of the wafer by a clamping tool, and further reducing errors during measurement.
    Type: Grant
    Filed: December 24, 2021
    Date of Patent: August 27, 2024
    Assignee: Nanjing ZhongAn Semiconductor Equipment Ltd
    Inventor: An Andrew Zeng
  • Patent number: 12044703
    Abstract: A contact probe having a first end portion and a second end portion, a probe body extended along a longitudinal development direction between the first end portion and the second end portion is disclosed. The probe body has a pair of arms separated by a slot and extending according to the longitudinal development direction and a conductive insert extended along the longitudinal development direction, in a bending plane of the contact probe. The conductive insert is made of a first material and the contact probe is made of a second material and the first material has a lower electrical resistivity than an electrical resistivity of the second material. The conductive insert is a power transmission element of the contact probe and the arms are structural support elements of the contact probe during a deformation of the probe body.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: July 23, 2024
    Assignee: TECHNOPROBE S.P.A.
    Inventors: Raffaele Vallauri, Fabio Morgana
  • Patent number: 11977112
    Abstract: The present invention is directed to a system for testing printed circuit boards. The system is configured to test the simultaneously test a multiplicity of printed circuit boards. The system examines the electrical characteristics of a printed circuit board and is operable to identify if a printed circuit board meets a desired characteristic.
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: May 7, 2024
    Assignee: LAT Enterprises Inc.
    Inventors: Laura Thiel, Carlos Cid, Michael Tran, Giancarlo Urzi
  • Patent number: 11973173
    Abstract: A display device includes a substrate including a display region and a pad region, a driving integrated circuit contacting the substrate at the pad region and including first to third test bumps receiving test signals and a circuit wire connected to each of the first to third test bumps, test pads in the pad region, through which the test signals are provided to the driving integrated circuit and including first to tenth test pads, and connection wires in the pad region, through which the test signals are provided to the test bumps from the test pads and including a first connection wire connecting the first test pad to the first test bump, second and third connection wires connecting the second and third test pads, respectively, to the second test bump, and fourth and fifth connection wires connecting the fourth and fifth test pads, respectively, to the third test bump.
    Type: Grant
    Filed: July 12, 2021
    Date of Patent: April 30, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jinsic Min, Changsub Jung
  • Patent number: 11953522
    Abstract: A probe head for a testing apparatus integrated on a semiconductor wafer is disclosed having a first plurality of contact probes having a first transversal diameter, a second plurality of micro contact probes having a second transversal diameter, smaller than the first transversal diameter, and a flexible membrane having conductive tracks for connecting a first plurality contact probe with a corresponding second plurality micro contact probe. The second plurality contact probes are arranged between the testing apparatus and the flexible membrane, and the second plurality micro contact probes are arranged between the flexible membrane and a semiconductor wafer.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 9, 2024
    Assignee: TECHNOPROBE S.P.A.
    Inventors: Roberto Crippa, Stefano Felici
  • Patent number: 11933837
    Abstract: In various examples, an inspection jig includes a plate-shaped insulating member having a recess; a first board having a first electrode; and a conducting wire electrically connected to a contact terminal. The insulating member is provided with a through hole penetrating a bottom portion of the recess. One end portion of the conducting wire is disposed in the through hole. The other end of the conducting wire is connected to the first electrode.
    Type: Grant
    Filed: March 27, 2020
    Date of Patent: March 19, 2024
    Assignee: NIDEC READ CORPORATION
    Inventors: Minoru Kato, Makoto Fujino
  • Patent number: 11892472
    Abstract: Disclosed is a test device for testing an electric characteristic of an object to be tested. The test device includes a block comprising a probe hole, a probe supported in the probe hole and retractably configured to connect a first contact point and a second contact point, and a coaxial cable comprising an insulated sheath, a main core surrounded with the insulated sheath, and a probe contact portion exposed from the insulated sheath and extended from the main core so as to be in contact with the probe. An axis of the probe is spaced apart from an axis of the coaxial cable, and the probe contact portion is extended from the main core toward the axis of the probe.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: February 6, 2024
    Assignee: LEENO INDUSTRIAL INC.
    Inventors: Chang-hyun Song, Jae-hwan Jeong
  • Patent number: 11860192
    Abstract: Proposed are a probe head and a probe card having the same. According to the present disclosure, the probe head of the probe card includes: an upper guide plate having an upper guide hole; a lower guide plate having a lower guide hole; and an intermediate guide plate having an intermediate guide hole and provided between the upper guide plate and the lower guide plate, wherein each of a plurality of probes sequentially passes through the upper guide hole, the intermediate guide hole, and the lower guide hole, and the intermediate guide plate is made of an anodic oxide film.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: January 2, 2024
    Assignee: POINT ENGINEERING CO., LTD.
    Inventors: Bum Mo Ahn, Seung Ho Park, Sung Hyun Byun
  • Patent number: 11845185
    Abstract: A device and method for electrical testing of a component, the component including a contact point, wherein the device includes: an interface to provide the component; a robot manipulator having an effector configured to pick up, handle, and release the component; a receiving interface into which the component is insertable; a contacting device having a counter contact, the contacting device positioned in a first state so that the robot manipulator is able to insert/remove the component into/from the receiving interface, and positioned in a second state so that the counter contact is connected to the contact point of the component inserted into the receiving interface; an analysis unit connected to the counter contact and configured to perform electrical testing of the component using connection of the counter contact and the contact point in the second state; and a control unit to control the robot manipulator and the contacting device.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: December 19, 2023
    Assignee: Franka Emika GmbH
    Inventors: Tobias Ende, Michael Haas, Saskia Golz, Sven Parusel, Simon Haddadin
  • Patent number: 11842475
    Abstract: According to one embodiment, a holding apparatus holds a moving body and changes a position of the moving body in a second direction perpendicular to a surface of a columnar body. The surface of the columnar body extends in the first direction. The moving body is movable along the first direction. The apparatus includes first and second holders separated from each other. The first holder includes first and second portions separated from each other, and a third portion. The second holder includes fourth and fifth portions separated from each other, and a sixth portion. The moving body is held by the first and second holders in a state in which the moving body is at a hold position. The hold position is where the moving body opposes the third and sixth portions and is between the first and second portions and between the fourth and fifth portions.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: December 12, 2023
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION
    Inventor: Hiroaki Kuwahara
  • Patent number: 11818842
    Abstract: A circuit board can be configured to access features and controls associated with a third-party circuit board. One or more spring-loaded pins or other connectors can contact one or more interaction points of the third-party circuit boards and form a connection. The circuit board can include a common or generic interface that the connections with the third-party circuit board are routed through by the circuit board. The generic interface can then connect the circuit board and third-party circuit board to external power sources, telecommunication devices, and connection ports. Based on the connection between the circuit board and the third-party circuit board, a user device can be assigned to and remotely access the features and controls of the third-party circuit board.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: November 14, 2023
    Assignee: Amazon Technologies, Inc.
    Inventors: David E. Carrillo, Jin Li, Xingang Guo
  • Patent number: 11796566
    Abstract: A wafer probe device is provided, including a holder and a probe card. The holder is configured to hold a wafer. The probe card is disposed on the ground, between the holder and the ground, and under the holder. The probing side of the probe card faces away from the ground. The holder moves the wafer toward the probe card, and a probed surface of the wafer contacts the probe card.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: October 24, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventor: Ting-Ming Fu
  • Patent number: 11656271
    Abstract: A wafer inspection system includes a supporting device having electrically connected supporting and contact portions for supporting a wafer's back, and a probe device having a probe and elastic contact members. When a probe tip of the probe contacts the wafer's front, a contact tip of the elastic contact member is abutted against a contact surface of the contact portion. The contact tip is higher than the probe tip. The contact surface is higher than the wafer's front. Alternatively, the contact surface having a radius larger than or equal to twice the wafer's radius. The horizontal distance between the probe tip and the contact tip is larger than or equal to twice the wafer's radius. This satisfies the test requirement of short-pulse test signal and prevents the structural design and transmitting stability of the elastic contact members from being affected by the inspection temperature.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: May 23, 2023
    Assignee: MPI CORPORATION
    Inventors: Yi-Hsuan Cheng, Hung-I Lin, Po-Han Peng
  • Patent number: 11630147
    Abstract: The present invention relates to a low-thermal resistance pressing device for a socket, which mainly comprises a housing, an inner collar, a heat conductive pressing block, a bearing collar and a locking member. The locking member on the housing is used to lock the socket. The inner collar is threadedly engaged with the housing. The bearing collar is located between the inner collar and the heat conductive pressing block. In the case of rotating the inner collar in the housing, the bearing collar drives the heat conductive pressing block to move axially so as to exert an axial force to a device to be tested. Because the heat conductive pressing block protrudes from the upper and lower surfaces of the housing, one end thereof can be in contact with a temperature control module, and the other end thereof can be in contact with the device to be tested.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: April 18, 2023
    Assignee: CHROMA ATE INC.
    Inventors: Ming Cheng Huang, Tsung-I Lin, Hui-Jung Wu, Chien-Ming Chen
  • Patent number: 11604220
    Abstract: A test apparatus includes a first module configured to structurally support a target semiconductor device, and a second module reversibly attachable to the first module. The first module includes a first housing including one or more inner surfaces at least partially defining an inner space, a volume control unit configured to control a volume of the inner space, a mounting unit at least partially exposed to the inner space and configured to be exposed to the target semiconductor device, and a magnetic force control unit in the first housing. The second module includes a second housing, a test board in the second housing, and an attachable/detachable member in the second housing. The test board may be electrically connected to the target semiconductor device. The magnetic force control unit may control a magnetic property of the attachable/detachable member to cause the attachable/detachable member to attach/detach to/from the magnetic force control unit.
    Type: Grant
    Filed: November 2, 2021
    Date of Patent: March 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyung Il Kim, Se-Hyun Seo, Byeong Min Yu, Jae Hong Kim, Sang Jae Rhee, Young Chyel Lee
  • Patent number: 11561240
    Abstract: An intermediate connecting member according to one aspect of the present disclosure is provided between a first member including multiple first terminals and a second member including multiple second terminals. The intermediate connecting member includes multiple connection parts configured to electrically connect the first terminals to the second terminals, and a retainer holding the multiple connection parts. Each of the multiple connection parts is formed of an elastic member to which an electrically conductive property is given at least on a surface of the elastic member.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: January 24, 2023
    Assignee: Tokyo Electron Limited
    Inventor: Jun Mochizuki
  • Patent number: 11551984
    Abstract: A package has a package body formed by stacked insulating layers and having a front surface including a mounting area, a back surface and a side surface; a plurality of hollow portions arranged so as to be adjacent to each other on the front surface of the package body; a plurality of electrode pads individually placed on respective bottom surfaces of the hollow portions; and a partition wall formed by at least one insulating layer that forms the package body and having protruding banks at its both edge sides. Surfaces of the electrode pads are located at a lower position with respect to the front surface of the package body. The hollow portions are arranged at opposite sides of the partition wall. The electrode pads are electrically connected to respective conductor layers that are formed on the back surface and/or the side surface of the package body.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 10, 2023
    Assignee: NGK SPARK PLUG CO., LTD.
    Inventor: Takayuki Miyaji
  • Patent number: 11543432
    Abstract: Proposed are a probe head and a probe card having the same. The probe head includes: an upper guide plate having an upper guide hole; a lower guide plate having a lower guide hole; an intermediate guide plate having an intermediate guide hole, and provided between the upper guide plate and the lower guide plate; and a guide member provided at a side of the intermediate guide plate, wherein the intermediate guide plate is limited in movement by the guide member.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: January 3, 2023
    Inventors: Bum Mo Ahn, Seung Ho Park, Sung Hyun Byun
  • Patent number: 11360118
    Abstract: The contact probe comprises a barrel 50, an inspection device side terminal 60, a test board side terminal 70, and a spring 80 disposed in a state of being in contact with the test board side terminal 70 and the inspection device side terminal 60, the test board side terminal 70 includes a stop portion 74 that can abut on the caulked portion 52 in the barrel 50 and a terminal body that projects from the other end 56 of the barrel 50, and the terminal body includes, in order from a tip end, a first shaft section 71, a second shaft section 72 having a diameter larger than a diameter of the first shaft section 71, and a third shaft section 73 having a diameter smaller than the diameter of the second shaft section 72 and having at least a part that can be housed in the barrel 50.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: June 14, 2022
    Assignee: Yamaichi Electronics Co., Ltd.
    Inventors: Katsumi Suzuki, Seiya Yamamoto
  • Patent number: 11360117
    Abstract: A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.
    Type: Grant
    Filed: June 24, 2020
    Date of Patent: June 14, 2022
    Assignee: Johnstech International Corporation
    Inventors: Jeffrey Sherry, Cory Kostuchowski
  • Patent number: 11289785
    Abstract: Systems and methods for phasing line holders are described herein. In certain embodiments, an apparatus includes a groove in a conductive body. Additionally, the apparatus includes a phasing line for electrically coupling a plurality of components, the phasing line extending through the groove. Further, the apparatus includes a holder inserted into the groove, the holder maintaining the phasing line at a specific position in relation to a plurality of groove surfaces, wherein a plurality of holder surfaces apply sufficient pressure to the plurality of groove surfaces to secure the holder within the groove.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: March 29, 2022
    Assignee: CommScope Technologies LLC
    Inventors: Katarina Potocná, Frantisek Ondrácek, Libor Strachon, Tomás Thér
  • Patent number: 11241839
    Abstract: Embodiments disclosed herein provide methods of forming bond pad redistribution layers (RDLs) in a fan-out wafer level packaging (FOWLP) scheme using an additive manufacturing process. In one embodiment, a method of forming a redistribution layer includes positioning a carrier substrate on a manufacturing support of an additive manufacturing system, the carrier substrate including a plurality of singulated devices, detecting one or more fiducial features corresponding to each of the plurality of singulated devices, determining actual positions of each of the plurality of singulated devices relative to one or more components of the additive manufacturing system, generating printing instructions for forming a patterned dielectric layer based on the actual positions of each of the plurality of singulated devices, and forming the patterned dielectric layer using the printing instructions.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: February 8, 2022
    Assignee: APPLIED MATERIALS, INC.
    Inventors: William H. McClintock, Rajeev Bajaj, Jason G. Fung, Daniel Redfield
  • Patent number: 11237207
    Abstract: A test socket assembly for a semiconductor device used for burn-in testing comprising a base assembly, a floating plate coupled to the base assembly, and a latch assembly mounted on the floating plate for the retention and movement of the semiconductor device. The base assembly further includes a pin assembly for electrically coupling to the semiconductor device for burn-in testing and at least two upstanding flex arms. In addition, the floating plate and the latch assembly move to a test position for accommodating a varying height of the semiconductor device when mating with a test fixture while the latch still effectively retains the semiconductor device. Lastly, the floating plate is held in a fixed load position due to the support provided by the upstanding flex arms when inserting the semiconductor device into the test socket.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: February 1, 2022
    Assignee: Sensata Technologies, Inc.
    Inventor: Hideharu Furukawa
  • Patent number: 11231458
    Abstract: The present disclosure relates to a system for aligning a measurement system suitable for radio frequency measurement of a device under test. The system includes an alignment device, a measurement module and an indication module. The alignment device includes at least two alignment antennas configured to receive a signal over-the-air from a measurement antenna of the measurement system. The measurement module is configured to measure a phase difference between the at least two alignment antennas receiving the signal. The indication module is configured to indicate the measured phase difference between the at least two alignment antennas or a reference quantity associated with the measured phase difference. Further, a method of aligning a measurement system used for radio frequency measurement of a device under test is described.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: January 25, 2022
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventors: Steffen Neidhardt, Josef Schmoeller, Corbett Rowell, Daniel Markert
  • Patent number: 11200660
    Abstract: According to one embodiment, a holding apparatus holds a moving body and changes a position of the moving body in a second direction perpendicular to a surface of a columnar body. The surface of the columnar body extends in the first direction. The moving body is movable along the first direction. The apparatus includes first and second holders separated from each other. The first holder includes first and second portions separated from each other, and a third portion. The second holder includes fourth and fifth portions separated from each other, and a sixth portion. The moving body is held by the first and second holders in a state in which the moving body is at a hold position. The hold position is where the moving body opposes the third and sixth portions and is between the first and second portions and between the fourth and fifth portions.
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: December 14, 2021
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ENERGY SYSTEMS & SOLUTIONS CORPORATION :
    Inventor: Hiroaki Kuwahara
  • Patent number: 11150275
    Abstract: A sensing apparatus for characterizing current flow through a conductor includes a plurality of magnetic sensors. In some embodiments, the sensors are grouped in pairs to achieve common mode rejection of signals generated in response to magnetic fields not resulting from current flow through the conductor. Sensors having different levels of sensitivity are used to collect information regarding the magnetic field generated by the current flowing through the conductor, where such information is processed in order to characterize the magnetic field. In some cases the sensors are included on or in flexible material that can be wrapped around the conductor.
    Type: Grant
    Filed: November 13, 2019
    Date of Patent: October 19, 2021
    Assignee: Everspin Technologies, Inc.
    Inventors: Angelo Ugge, Markus Schwickert, David Hayner
  • Patent number: 11114597
    Abstract: A display device is provided. The display device includes a substrate and a first metal line and a second metal line disposed on the substrate. The display device includes a first pad and a second pad disposed on the substrate and electrically connected to the first metal line and the second metal line respectively. The display device further includes an electronic device disposed on the first pad and the second pad. The electronic device includes a first connecting post and a second connecting post, wherein a distance between the first connecting post and the second connecting post is in a range from 1 um to 200 um. A portion of the first connecting post is embedded in the first pad and a portion of the second connecting post is embedded in the second pad.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: September 7, 2021
    Assignee: INNOLUX CORPORATION
    Inventors: Jia-Yuan Chen, Tsung-Han Tsai, Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11085949
    Abstract: A probe card assembly for nondestructive integrated circuit testing is disclosed. The probe card assembly includes an outer gimbal bearing with a tapered bearing surface being mounted on a top surface of a printed circuit board. The probe card assembly further includes an inner gimbal bearing with a spherical bearing surface which contacts the tapered bearing surface of the outer gimbal bearing at a single point of contact about a circumference thereof. The probe card assembly further includes a spring plate mounted to the outer gimbal bearing, providing a downward force to a substrate.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: August 10, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: David M. Audette, Dustin Fregeau, David L. Gardell, Peter W. Neff, Frederick H. Roy, III, Grant W. Wagner
  • Patent number: 11071212
    Abstract: A pressing area set on a main surface of a plate-shaped holding jig is arranged on contact parts. The contact parts are pressed against a multilayer board while heating the multilayer board and the pressing area of the holding jig is inclined with a warp of the multilayer board. In this way, when pressing for bonding the contact parts is performed, even if the multilayer board is warped by the heating and the contact parts are shifted, the contact parts are pressed against the multilayer board without fail.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: July 20, 2021
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Bin Wan Mat Wan Azha, Takeshi Yokoyama
  • Patent number: 11041879
    Abstract: A semiconductor die is aligned to a test probe by placing the semiconductor die onto a flat upper surface of a test stage with solder balls of the die facing upward, fluidizing motion of the die with reference to the test stage by pulsing gas between the die and the upper surface of the test stage, and coarse aligning the die with reference to the test stage by moving the die until adjacent edges of the die contact corner guides that are disposed on the test stage. Further, the method includes raising the test stage toward the test probe until an alignment feature of the test probe engages a first solder ball of the die, and fine aligning the die with reference to the test probe by continuing to raise the test stage until a second solder ball of the die fits into a test cup of the test probe.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: June 22, 2021
    Assignee: International Business Machines Corporation
    Inventors: Eugene Atwood, David Audette, Grant Wagner
  • Patent number: 11002760
    Abstract: A system and method for reducing inductance and capacitance and shielding signals in an integrated circuit test for devices under test (DUT) is disclosed. Inductance and capacitance are reduced in two ways. First, by recessing the contact pin housing 22 directly into the load board 20 thereby eliminating much of distance between the load board and DUT. Second, surrounding the slot/well 50 in which each RF contact pin resides in the housing with a ground isolation cage 46,46a, 48, 47 of electrically conductive strips or rings at the top and bottom of the housing adjacent the slot with connecting vias thereby creating an isolation cage against RF cross talk transmission and further lowering inductance and capacitance.
    Type: Grant
    Filed: February 6, 2018
    Date of Patent: May 11, 2021
    Inventors: Jeffrey Sherry, Dennis Wagner
  • Patent number: 10999683
    Abstract: A microphone assembly comprising a microphone unit secured to a mounting element. The microphone unit has a first side comprising an audio port, and the mounting element comprises a rigid body having a mounting side. The first side of the microphone unit is arranged at a right angle to the mounting side of the mounting element. The microphone unit may comprise a micro electromechanical systems (MEMS) microphone package holding a MEMS microphone die, and the mounting side of the mounting element may be configured for being mounted or soldered to a printed circuit board. The microphone assembly may be mounted to a device printed circuit board.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: May 4, 2021
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Jouni Tapio Mäki, Juuso Heiskanen
  • Patent number: 10971835
    Abstract: An electrical connector is mounted on a circuit board and used to mate with a mating member. The electrical connector includes: a body made of a wave-absorbing material, the body having an upper surface, a lower surface and at least one first accommodating groove; and at least one ground terminal accommodated in the first accommodating groove. An upper end of the ground terminal is exposed to the upper surface and is in electrical contact with the mating member, and a lower end of the ground terminal is exposed to the lower surface and is electrically connected with the circuit board.
    Type: Grant
    Filed: July 25, 2019
    Date of Patent: April 6, 2021
    Assignee: LOTES CO., LTD
    Inventor: Zhi Jun Feng
  • Patent number: 10935592
    Abstract: A circuit includes a field effect transistor having a gate driven via a drive signal. The field effect transistor has a drain-source voltage drop indicative of the intensity of a current flowing in the current path through the field effect transistor. The circuit also includes a pair of sensing transistors that include a first sensing field effect transistor arranged with its drain and gate coupled with the drain and the gate of the field effect transistor, respectively, and a second sensing field effect transistor having a gate configured for receiving a replica of the drive signal. The second sensing field effect transistor is arranged with its current path in series with the current path of the first sensing field effect transistor. A sensing signal at a sensing node is indicative of the current intensity flowing in the current path of the field effect transistor.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: March 2, 2021
    Assignees: STMICROELECTRONICS S.R.L., STMICROELECTRONICS (SHENZHEN) R&D CO, LTD.
    Inventors: Edoardo Botti, Davide Luigi Brambilla, Hong Wu Lin
  • Patent number: 10928423
    Abstract: The test system provides an array of test probes. The probes pass through a first or upper probe guide retainer which has a plurality of slot sized to receive the probes in a way that they cannot rotate. A plurality of flex circuits at the different heights engage bottom probe ends at their respective height levels and flex circuits continue the electrical connection from the probes to a load board. The test probes are bonded to the flex circuits by ring shaped flowable conductive material. The flex circuits are biased against a load board by an elastomeric pad of spaced part conical projections.
    Type: Grant
    Filed: September 4, 2018
    Date of Patent: February 23, 2021
    Assignee: Johnstech International Corporation
    Inventors: John DeBauche, Dan Campion, Michael Andres, Steve Rott, Jeffrey Sherry, Brian Halvorson, Brian Eshult
  • Patent number: 10911841
    Abstract: A telemetry unit for high speed shafts includes a metallic annular carrier having an inner circumferential surface defining a bore, for receiving a shaft or sleeve to rotatably couple the telemetry unit with the shaft, an outer circumferential surface, opposing axial ends, and interior cavities. An annular insulator formed of an electrically insulative material has an inner circumferential surface disposed about the carrier outer surface, an outer circumferential surface, and opposing axial ends. A generally circular antenna is disposed circumferentially about the insulator outer surface and an annular retainer is disposed about the insulator outer surface such that the antenna is generally sandwiched between the retainer and the insulator to generally fix the antenna relative to the carrier. The carrier engages a portion of the insulator outer surface to prevent radially-outward displacement of the insulator when the telemetry unit rotates about the axis.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: February 2, 2021
    Assignee: KAYDON RING & SEAL, INC.
    Inventors: Sanjay Baheti, Jared Manry
  • Patent number: 10884023
    Abstract: The illustrative embodiments pertain to a test fixture having low insertion inductance for large bandwidth monitoring of current signals. In one exemplary embodiment, the test fixture includes a baseplate with each resistor of a set of resistors embedded inside a respective non-plated through slot in the baseplate. A first terminal of each resistor is soldered to a top metallic zone of the baseplate and a second terminal soldered to a first of two bottom metallic zones of the baseplate. The top metallic zone is connected by plated-through holes to a second of the two bottom metallic zones. When mounted upon a PCB, the test fixture allows current flow from the first bottom metallic zone, upwards through the set of resistors to the top metallic zone, and downwards to the second bottom metallic zone. An observation instrument may be coupled to a coaxial connector that is mounted on the baseplate.
    Type: Grant
    Filed: May 1, 2020
    Date of Patent: January 5, 2021
    Assignee: Keysight Technologies, Inc.
    Inventors: Edward Vernon Brush, IV, Neil Martin Forcier, Fei Fred Wang, Zheyu Zhang, Wen Zhang
  • Patent number: 10866118
    Abstract: A magnetic field sensor includes a plurality of magnetic field sensing elements configured to generate at least two measured magnetic field signals indicative of a magnetic field affected by an object and having a first predetermined phase difference with respect to each other and a controller responsive to the at least two measured magnetic field signals. The controller is configured to generate an angle signal and to compare the angle signal to at least one angle signal threshold. The angle signal can be compared to a plurality of angle signal thresholds to generate a plurality of output transitions, each output transitions indicative of the angle signal crossing the corresponding angle signal threshold. The number of angle signal thresholds can be dependent upon a desired number of output transitions per pole-pair of the angle signal.
    Type: Grant
    Filed: November 18, 2019
    Date of Patent: December 15, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Andrea Foletto, Zachary Richards
  • Patent number: 10801982
    Abstract: A sensor includes a substrate, a first electrode, a second electrode spaced from the first electrode, and a sensing medium on the substrate between the first electrode and the second electrode. The sensor medium includes a functionalized graphitic material and an uncondensed graphitic carbon nitride disposed upon the functionalized graphitic material. The sensor further includes a system for applying electromagnetic energy to the sensing medium to increase the conductance of the sensing medium, and circuitry including at least one measurement system in operative connection with the sensor to measure a variable relatable to the conductance of the sensing medium which is dependent upon the presence of an analyte to be detected.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: October 13, 2020
    Assignee: University of Pittsburgh—Of the Commonwealth System of Higher Education
    Inventors: James Edward Ellis, Alexander Star
  • Patent number: 10791628
    Abstract: A method of forming an multi-chip carrier that includes providing a trace structure using an additive forming method. The method includes forming a metal layer on a trace structure to provide electrically conductive lines. A dielectric material may then be formed on the electrically conductive lines to encapsulate a majority of the electrically conductive lines. The ends of the electrically conductive lines that are exposed through the upper surface of the dielectric material provide a top processor mount location and the ends of the electrically conductive lines that are exposed through the sidewalls of the dielectric material provide a sidewall processor mount location.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: September 29, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Chad M. Albertson, Eric J. Campbell, Nicholas J. Ollerich, Christopher W. Steffen
  • Patent number: 10775414
    Abstract: Planar error between a probe card and a semiconductor wafer may be reduced with a low-profile gimbal platform. The low-profile gimbal platform may be coupled between a probe card and a tester head. The low-profiled gimbal platform includes a number of linear actuators and pistons that are used to perform high-precision in situ planarity adjustments to the probe card to achieve co-planarity between the probe card and the semiconductor wafer. The in situ planarity adjustments may reduce the likelihood of malfunctions due to misalignment of the probe card.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventors: Paul J. Diglio, Joseph F. Walczyk
  • Patent number: 10753973
    Abstract: A test apparatus includes a first insulation housing, a second insulation housing configured to be coupled to the first insulation housing, and a test board including a first portion and a second portion. The first insulation housing and the second insulation housing are configured to cover the first portion of the test board and to expose the second portion of the test board.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: August 25, 2020
    Assignee: ASE TEST, INC.
    Inventor: Zi-Ning Mao
  • Patent number: 10718792
    Abstract: Provided is a multifunctional substrate inspection apparatus capable of selectively bringing probes into contact.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: July 21, 2020
    Assignee: WIT CO., LTD.
    Inventor: Masato Utsumi
  • Patent number: 10718790
    Abstract: A testing apparatus with reduced warping of the probe card and a method of reducing warping of a probe card of a testing apparatus are disclosed. The testing apparatus can include a testing head and a platform opposite the testing head, where the testing head and platform move relative to one another to bring a sample into contact with probing tips of the testing apparatus. The testing head can include a probe card printed circuit board, a stiffener, a discontinuous backer and a plurality of probing tips. The stiffener can be coupled to and reinforcing the probe card. The discontinuous backer can extend from the probe card to the stiffener, and can include at least one unfilled void extending from the stiffener to the probe card. The plurality of probing tips can extend from a distal end of the testing head.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: July 21, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Mill-Jer Wang, Ching-Nen Peng, Hung-Chih Lin, Wei-Hsun Lin, Sen-Kuei Hsu, De-Jian Liu
  • Patent number: 10698000
    Abstract: A structure and method for providing a housing which includes a high frequency (HF) connection between a device under test (DUT) having a wave port 20 and a load board via a waveguide structure. The waveguide includes a wave insert 42, a waveguide adapter 24 and a conductive compliant member 40 which maintains bias between the adapter 24 and the DUT HF port 20 while also maintaining an RF shield despite the variable height of the DUT wave port. The adapter may also include a projection 64 which is received in a recess in the waveguide so that the shielding between the waveguide and adapter has full integrity.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: June 30, 2020
    Assignee: Johnstech International Corporation
    Inventors: Jeffrey Sherry, Cory Kostuchowski
  • Patent number: 10687425
    Abstract: An electro-optical module assembly is provided that includes a flexible substrate having a first surface and a second surface opposite the first surface, wherein the flexible substrate contains an opening located therein that extends from the first surface to the second surface. An optical component is located on the second surface of the flexible substrate and is positioned to have a surface exposed by the opening. At least one electronic component is located on a first portion of the first surface of the flexible substrate, and at least one micro-energy source is located on a second portion of the first surface of the flexible substrate.
    Type: Grant
    Filed: November 22, 2017
    Date of Patent: June 16, 2020
    Assignee: International Business Machines Corporation
    Inventors: Paul S. Andry, Qianwen Chen, Bing Dang, John U. Knickerbocker, Minhua Lu, Robert J. Polastre, Bucknell C. Webb
  • Patent number: 10670654
    Abstract: A probe card, a wafer testing system and a wafer testing method are provided. The wafer testing system includes a wafer holder and a probe card. A wafer is held on the wafer holder, and testing pads are formed on the wafer, in which the testing pads are arranged along a test straight line. The probe card includes probes each of which includes an arm portion and a tip portion. An included angle between the test straight line and an extension of a projection line of the arm portion onto the wafer ranges from about 40 degrees to about 55 degrees.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: June 2, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yuan-Chun Wu, Chang-Chun Xu, Ni Shen
  • Patent number: 10674611
    Abstract: Disclosed is a method of reducing the thickness of an electronic circuit comprising a printed circuit and electronic components. The method includes the following operations: mounting electronic components in die form on the printed circuit, putting an insulating layer into place on the electronic components, and putting a conductive layer on the insulating layer. Various embodiments include an electronic circuit obtained by such a method; a thin plastic card, such as in a credit card format, including such an electronic circuit; and a bank card including such an electronic circuit.
    Type: Grant
    Filed: June 29, 2015
    Date of Patent: June 2, 2020
    Assignee: NAGRAID SECURITY
    Inventor: Philippe Guillaud
  • Patent number: 10670627
    Abstract: An electrical probe structure includes a conductive cylinder, a first electrical connecting port and a probe assembly. The conductive cylinder for being fixed to the base plate has thereinside a sliding tunnel. The first electrical connecting port is electrically connected to the conductive cylinder. The at least one flexible conductive tube is furnished inside the sliding tunnel. The at least one probe assembly includes a first needle cylinder and a first probe. The first needle cylinder, slidably penetrating the conductive cylinder, electrically contacts the at least one flexible conductive tube so as to have the first needle cylinder to electrically connect the first electrical connecting port via the at least one flexible conductive tube and the conductive cylinder. The first probe is mounted and electrically connected to the first needle cylinder.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: June 2, 2020
    Assignee: CHROMA ATE INC.
    Inventors: Mao-Sheng Liu, Peng-Fei Chen