Abstract: A system comprises a temperature sensor generate multiple base-emitter voltage signals by sequentially providing various currents to a transistor, and a system controller to determine a differential voltage signal according to the multiple base-emitter voltage signals, the differential voltage signal proportional to an environmental temperature associated with the transistor.
Type:
Grant
Filed:
October 1, 2007
Date of Patent:
January 10, 2012
Assignee:
Cypress Semiconductor Corporation
Inventors:
Garthik Venkataraman, Harold Kutz, Monte Mar
Abstract: A semiconductor device for measuring ultra low currents down to the level of single electrons or low voltages comprises a first and a second voltage supply terminal, an input terminal for receiving an electrical current or being supplied with a voltage to be measured, a bipolar transistor having a base, an emitter and a collector, wherein a first PN junction is formed between the base and the collector and a second PN junction is formed between the base and the emitter, wherein the emitter is coupled to the input terminal and the base is coupled to the second voltage supply terminal, and wherein the first PN junction is designed for reverse biased operation as an avalanche diode, and a quenching and recharging circuit having a first terminal coupled to the first voltage supply terminal and a second terminal coupled to the collector of the bipolar transistors, the quenching and recharging circuit permitting operation of the first PN junction reverse biased above the breakdown voltage of the first PN junction.
Type:
Grant
Filed:
December 17, 2007
Date of Patent:
November 29, 2011
Assignee:
Ecole Polytechnique Federale De Lausanne
Abstract: An AC stress test circuit for HCI degradation evaluation in semiconductor devices includes a ring oscillator circuit, first and second pads, and first and second isolating switches. The ring oscillator circuit has a plurality of stages connected in series to form a loop. Each of the stages comprises a first node and a second node. The first and second isolating switches respectively connect the first and second pads to the first and second nodes of a designated stage and both are switched-off during ring oscillator stressing of the designated stage. The present invention also provides a method of evaluating AC stress induced HCI degradation, and a test structure.