Abstract: There is disclosed a semiconductor integrated circuit comprising pass transistor circuits (PT3, PT4) for producing logically complementary signals. The output of the pass transistor circuit (PT3) is connected to the base electrode of an NPN bipolar transistor (BN1), and the output of the pass transistor circuit (PT4) is connected to the gate electrode of an NMOS transistor (MN9). PMOS transistors (MP15, MP16) are connected between the outputs of the pass transistor circuits (PT3, PT4) and a first potential (VDD). The gate electrodes of the PMOS transistors (MP15, MP16) are connected to the outputs of the pass transistor circuits (PT3, PT4). The bipolar transistor (BN1) having a large driving force charges and discharges a load capacity (CL1) connected to an output terminal in response to the output signal of the pass transistor circuit (PT3). This provides for a logic circuit which operates at high speeds in the semiconductor integrated circuit.

Abstract: A BiMIS logic circuit includes a first bipolar junction transistor (BJT), a second BJT, a P-channel MIS transistor (PMIS), and an N-channel NMIS transistor (NMIS). A node between the first and second BJTs is connected to a first output terminal, and a node between the PMIS and the NMIS is connected to a second output terminal. When the potentials which cause the PMIS to turn ON and the NMIS to turn OFF are applied, a potential at the second output terminal rises to the power supply potential. The potential at the first output terminal assumes a potential lower than the power supply potential by a turn-on voltage (V.sub.F) of the BJT. When the potentials which cause the NMIS to turn ON and the PMIS to turn OFF are applied, the second output terminal and a node between the NMIS and the second BJT are caused to become conductive whereby the potential at the second output terminal falls and the potential at the node rises and both the potentials are equalized.

Abstract: A tri-state capable driver circuit or totem pole circuit is formed in BiCMOS technology and includes a selection circuit, first and second drive circuits, and first and second bipolar transistors. A short circuit unit is connected between the base and the emitter of the first bipolar transistor to prevent excessively high inhibit voltages across the base-emitter junction of the first bipolar transistor. The operation of the short circuit unit depends upon signals received at the tri-state activation input.

Abstract: A novel, high-performance BiCMOS Output Driver. The Output Driver comprises a first pull-up circuit for pulling high the output of the Output Driver and a pull-down circuit for pulling low the output of the Output Driver. The first pull-up means includes a bipolar transistor. Coupled in parallel with the first pull-up circuit is a MOS transistor wherein the gate of the MOS transistor is electrically isolated from the base of the bipolar transistor.