Abstract: The present invention provides a method and apparatus for detecting a continuous current of a switching current. A current signal is produced in response to a switching current of the magnetic device. By sampling the waveform of the current signal in response to the enabling of a switching signal, a first current signal and a second current signal are generated. A continuous current signal is produced according to the first current signal and the second current signal. The continuous current signal is corrected to the continuous current of the switching current.

Abstract: The present invention inexpensively controls a turn-on and turn-off switching speed for MOS transistors made in accordance with various specifications. According to the present invention, during an output voltage rise period for a turn-on operation of the MOS transistor, a fixed current determined by a first clip circuit and a resistor is input to a gate terminal of the MOS transistor to obtain a linear rise slew rate. During an output voltage drop period for a turn-off operation of the MOS transistor, a fixed current determined by a second clip circuit 38 and a resistor is input to the gate terminal of the MOS transistor to obtain a linear drop slew rate.

Abstract: A driver (1) supplies an output voltage (VL) to an inductive load (30). The driver comprises an input to receive a pulse width modulated control signal (CS) having a controllable duty cycle within a predetermined range. A first switch circuit (10) receives a first switch signal (CS; ICS) to supply a first voltage (V1), a second switch circuit (13) receives a second switch signal (DCS; CSD) to supply a second voltage (V2), and the output voltage (VL) is the difference between the first voltage (V1) and the second voltage (V2). An inverter (11; 15) and delay circuit (12; 16) receives the control signal (CS) to supply the first switch signal (CS; ICS) and the second switch signal (DCS; CSD) being inverted and delayed with respect to each other. The delay (dT) of the delay circuit (12; 16) is selected to obtain an output voltage having a single polarity for each one of said controllable duty cycles within the predetermined range.

Abstract: A gate drive circuit for driving the gate of a power transistor switch comprising a gate drive sourcing circuit supplying gate drive current to the power transistor switch, the gate drive sourcing circuit initially providing a first current to the gate of the power transistor switch and then providing a second current to the gate of the power transistor switch; a circuit for driving the gate drive sourcing circuit, the circuit having a first input for driving the gate drive sourcing circuit to turn on the power transistor switch by providing the first current, the circuit further having a second input coupled to a voltage across the power transistor switch and being controlled by the second input to cause the gate drive sourcing circuit to provide the second current when the voltage across the power transistor switch begins to drop as the power transistor switch begins to turn on.

Abstract: An H-bridge drive circuit for reducing switching noises while preventing shoot-through current from flowing in the H-bridge circuit. The H-bridge drive circuit includes an H-bridge circuit for driving a load with a first power supply and a lower voltage second power supply. The H-bridge circuit includes first to fourth transistors. The first and third transistors are connected to the first power supply. The second transistor is connected between the first transistor and the second power supply, and the fourth transistor is connected between the third transistor and the second power supply. The load is connected to a node between the first and the second transistors and a node between the third and the fourth transistors. A control circuit switches the activation and inactivation of the first to fourth transistors so as to maintain at least either one of the second and fourth transistor in an activated state.

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: A load drive device for driving an electrical load includes high-side and low-side transistors, and a switch. When the load is driven, each of the high-side and low-side transistors operates in a first mode where each of the high-side and low-side transistors is fully tuned on or in a second mode where each of the high-side and low-side transistors is controlled so that a load current flowing through the load is constant. When the load is driven, there is a first state where the high-side transistor operates in the second mode and the low-side transistor operates in the first mode and a second state where the high-side transistor operates in the first mode and the low-side transistor operates in the second mode. The switch switches between the first and second states to distribute heat generation between the high-side and low-side transistors.

Abstract: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of the MOSFET device. The inadvertent turning on of the MOSFET may occur when a large voltage transient occurs at the drain of the MOSFET device. By connecting the gate of the shunt FET to the drain of the MOSFET device, a low impedance path is provided at the right point of time during the circuit operation to shunt the current without requiring any external circuitry.

Abstract: A signal detecting device detects, as analog voltage signals, a current flowing through an exciting coil of an electric power generator, a source voltage and a temperature of a regulator that change as a current is fed to the exciting coil by an FET. These analog voltage signals are subjected to A/D conversion by a single A/D converter circuit. The detected current is subjected to A/D conversion in a period during which the FET is ON, while the detected source voltage and the detected temperature are subjected to A/D conversion in a period during which the FET is OFF.

Abstract: A level-shift circuit for use with a half bridge in accordance with an embodiment of the present application includes an oscillator operable to provide a timing signal, a level-shift switch controlled by the timing signal of the oscillator, a high side control circuit operable to provide a high side control signal to a high side switch of the half bridge to control the high side switch and a low side control circuit operable to provide a low side control signal to a low side switch of the half bridge to control the low side switch. The level-shift switch is turned ON when the timing signal is high such that the level-shift switch connects the high side control circuit to ground and the high side control signal stays low to keep the high side switch OFF when the timing signal is high. The low side control circuit provides the low side control signal to turn the low side switch ON a predetermined period of time after the timing signal goes high.

Abstract: A gate driving circuit and method which increases the switching frequency by use of a switching control circuit which controls operations of a first, second, third, and fourth switches. The switching control circuit performs switching control of a power MOSFET when the MOSFET is to be turned on, so that a period exists when the first and fourth switches are simultaneously ON. The switching circuit also performs switching control when a MOSFET is to be turned off, so that a period exists when the second and third switches are simultaneously ON.

Abstract: This invention relates to a resonant gate drive circuit for a power switching device, such as a MOSFET, that uses a center-tapped transformer to increase the driving gate voltage approximately twice as high as the supply voltage. The gate capacitance of the power switching device is charged and discharged by a constant current source, which increases the switching transition speed of the power switch. The circuit is suitable for driving a pair of low side switches with 50% duty cycle or less, such as in a variable frequency resonant converter, push-pull converter, or the like.

Abstract: System and method for write current drivers for inductive heads used in mass storage drives. A preferred embodiment comprises a write current circuit coupled to an inductive write head, a MOS transistor boost circuit and a matching circuit, both coupled to the write current circuit. The write current circuit provides a first current to the inductive write head, while the MOS transistor boost circuit provides a second current for a specified duration to the inductive write head when the MOS transistor boost circuit receives a control signal. The matching circuit selectively decouples a resistive element from the inductive write head when it receives the control signal. The MOS transistor boost circuit can accelerate the transition in a switching of the polarity of the write current and the matching circuit helps to reduce ringing without negatively affecting the speed of the polarity switching by decoupling when the second current is provided.

Abstract: Transmitter and transmission circuit. For realizing a differential transmitter, a switch circuit is connected between two load transistors of two complementary MOS pairs. The switch circuit can have two inductors. When the two complementary MOS pairs are conducting current to drive signal transition at output nodes, the inductors open to make the load transistors stop draining current. Also, the switch circuit can have switch transistor controlled by an edge detector for detecting raising and falling edges of the input signals, such that the switch circuit can make the load transistors stop draining current accordingly. In this way, raising and falling edges of the output signals are emphasized to improve signal propagation.

Abstract: A method drives a transistor half-bridge. The method includes measuring a delay time between an edge of an input signal and an corresponding edge of a phase signal, and saving the delay time as a saved delay time value. The phase signal is the output of the transistor half-bridge. In the method, the following steps are repeated until the saved delay time value differs from the delay time by more than a given threshold: decrementing the delay-value of a programmable delay circuit and the saved delay time value by a given decrement, the programmable delay circuit coupled to a control terminal of a first transistor of the half-bridge, and measuring the delay time between an edge of the input signal and an corresponding edge of the phase signal.

Abstract: A write driver circuit for a magnetic storage medium includes a first write driver sub-circuit that has an output that communicates with a first node of a write head. The first write driver circuit includes a first driver circuit and a first feedback path between the input and the output of the first driver circuit. A second write driver sub-circuit has an output that communicates with a second node of the write head. The second write driver sub-circuit includes a second driver circuit and a second feedback path between the input and the output of the second driver circuit. The write driver circuit has a substantially constant output impedance during operation, balanced differential and common mode resistances, and a substantially constant common mode voltage across the write head during operation.

Abstract: There are provided a switching power supply device performing a stable operation with fast response, a semiconductor integrated circuit device, and a power supply device. A capacitor is provided between the output side of an inductor and a ground potential. A first power MOSFET supplies an electric current from an input voltage to the input side of the inductor. A second power MOSFET turned on when the first power MOSFET is off allows the input side of the inductor to be of a predetermined potential. A first feedback signal corresponding to an output voltage obtained from the output side of the inductor and a second feedback signal corresponding to an electric current flowed to the first power MOSFET are used to form a PWM signal. The first power MOSFET has plural cells of a vertical type MOS-construction. The number of cells is 1/N. A detection MOSFET in which the gains and the drains are shared over the same semiconductor substrate with the first power MOSFET is provided to form a second feedback signal.

Abstract: A circuit is adapted to activate a writer head of a data storage media drive during both the boost periods as well as the steady state periods. The current supplied to the writer head during the boost periods exceeds the steady state current and flows between positive and negative voltage supplies so as to provide the required magnetic flux change in the inductor disposed in the write head. During the steady state periods, a switch circuit is turned on to provide a second current path across the writer head. During the steady state periods, the current flows between the positive voltage supply and the ground to reduce power consumption. The switch circuit is turned off during the boost periods.

Abstract: An ignition coil includes a coil portion and an igniter. The coil portion has a primary coil, a secondary coil, and a coil case. The primary coil and the secondary coil are disposed in the coil case. The igniter is disposed on one end side of the coil portion. The igniter includes a metallic frame connected to a voltage source at a constant potential, and a semiconductor integrated chip disposed on the metallic frame. The semiconductor integrated chip has a control circuit for controlling a switching element. The control circuit is formed by a dielectric isolation method. A surface of the semiconductor integrated chip on a silicon substrate-side is opposed to the metallic frame.

Abstract: The present invention relates to an oscillator outputting two triangle waves having the same amplitude and whose phases are inverted; and a pulse width modulator using the oscillator. A capacitor 3 is charged or discharged by a charge pump circuit 2 controlled by a Schmitt circuit 1, and a voltage integrated by a two-output differential amplification circuit 6 is positively fed back to the input of the Schmitt circuit 1 to output two triangle waves having the same amplitude and whose phases are inverted. Since the output stage is composed of a differential amplification circuit, the circuit has low output impedance and is protected from wiring capacity and connected input capacity, and since integral operation is caused to be performed by the differential amplification circuit, the distortion in the waveform of the triangle waves can be prevented.

Abstract: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of the MOSFET device. The inadvertent turning on of the MOSFET may occur when a large voltage transient occurs at the drain of the MOSFET device. By connecting the gate of the shunt FET to the drain of the MOSFET device, a low impedance path is provided at the right point of time during the circuit operation to shunt the current without requiring any external circuitry.

Abstract: An apparatus for use in applying write signals for driving a write head to effect writing information to a memory device; the write signals including a first write signal and a second write signal; includes: (a) a directing circuit receiving the write signals, directing a current to establish a voltage across the write head in a first excursion toward a first polarity in response to the first write signal and directing the current to establish the voltage across the write head in a second excursion toward a second polarity substantially opposite the first polarity in response to the second write signal; (b) a first boost system coupled with the directing circuit and boosting the write voltage toward the first polarity during the first excursion; and (c) a second boost system coupled with the directing circuit and boosting the write voltage toward the second polarity during the second excursion.

Abstract: A voice coil type driving device includes: a voice coil for securing a driving force depending on applied electric current; a position level generator for generating control signals so as to control the electric current applied to the voice coil in multiple levels; and a driving circuit for controlling the electric current applied to the voice coil according to the control signals generated in the position level generator, and a method for applying electric current in a voice coil type driving device, wherein electric current is applied in multiple steps.

Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.

Abstract: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises a transistor (210) including an inductive load (230) coupled to the transistor, a plurality of current sources (222, 224) coupled to the gate of the transistor, and a clamp (250) coupled to either the gate and the drain of the transistor, or to the gate and to ground depending on the location of the inductive load, wherein the clamp comprises a resistive element (260) to increase the voltage of the clamp when current flows through the clamp, and wherein the increased voltage causes the apparatus to include a different slew rate.

Abstract: A control device for controlling a load drive semiconductor element for driving a load has a test operation mode for measuring a leak current of the load drive semiconductor element. In the test operation mode, a control terminal of the load drive semiconductor element is electrically separated from a power source or a ground by turning off another semiconductor element. Therefore, no electric current flows from the power source to the control terminal or from the control terminal to the ground. Therefore, the leak current of the load drive semiconductor element can be easily measured, even after the load drive semiconductor element is electrically connected to the control device for fabricating one-packaged IC.

Abstract: A differential transmission line driver with supplemental current sources that overcome switching anomalies and EMU issues when the logic state of the driver is switching. During a logic transition, a current source, that is directed to the output of the driver, may be prevented from delivering its current. The present invention provides a supplemental current that is active during this transition period to supply the missing current. The present disclosure also details a common mode circuit that maintains a stable common mode output level to help control EMI issues when the power supply for the driver changes.

Abstract: Disclosed is a motor drive control device which uses mechanical switches configured in an H-bridge shape and can protect the mechanical switches from being damaged and minimize a voltage chattering problem occurring upon switching on and off The motor drive control device includes: two relay switching units which are coupled to both sides of a motor and each of which is formed in an H-bridge shape and is connected to an output terminal of a bridge circuit; a switching unit which controls a voltage source applied to the relay switching units; and an inverter controller which first controls any one of the relay switching units and then controls the switching unit so that the motor starts to operate, and first controls the switching unit and then controls the one of the relay switching units so that the motor comes to a halt.

Abstract: A signaling circuit having reduced parasitic capacitance. The signaling circuit includes a plurality of driver circuits each having an output coupled to a first output node, and a plurality of select circuits each having an output coupled to a control input of a corresponding one of the driver circuits. Each of the select circuits includes a control input to receive a respective select signal and a plurality of data inputs to receive a plurality of data signals. Each of the select circuits is adapted to select, according to the respective select signal, one of the plurality of data signals to be output to the control input of the corresponding one of the driver circuits.

Abstract: A power switching control device for electric systems such as an ignition device for internal combustion engines has a control circuit IC and a switching IC. A temperature sensor is provided in the switching IC. The control circuit IC is joined to a grounding terminal through a conductive layer provided therebetween. Thus, the substrate potential of the control circuit IC is stabilized to the ground potential so that the temperature sensor is prohibited to operate erroneously due to electromagnetic noise.

Abstract: A load driving device includes a driver that supplies drive current to a load having an inductance component, a current sensing resistor that generates sensed voltage corresponding to switching current that flows in the driver, a switch circuit that delivers one of the sensed voltage and a predetermined bias voltage selectively, a comparator that compares a selected voltage of the switch circuit with a predetermined reference voltage, and a logic circuit that generates a drive control signal for the driver based on a comparison output signal of the comparator, so as to perform constant-current chopping control of the drive current with improved stability of the constant-current chopping control while avoiding malfunction due to noise.

Abstract: High-performance low-power isolated bootstrapped gate drive apparatus and methods are disclosed for driving high-side and floating transistors. The gate drivers use edge-triggered capacitive-coupled inputs. The gate drivers may include detection and delay circuitry to facilitate zero-voltage-switching of the high side or floating transistor and providing more robust rejection of false triggering. A capacitively coupled differential input edge triggered gate driver provides exceptional immunity to false triggering. The gate drivers may be used in transformer coupled drive circuits using transformers that need only support coupled pulses wide enough to be recognized as an edge by the input circuit.

Abstract: To provide an output MOS transistor from breaking due to dump surge and counter electromotive, a semiconductor integrated circuit according to an embodiment of the invention includes an output MOS transistor controlling current flowing through a load, a dynamic clamp circuit clamping an overvoltage applied to the output MOS transistor, a delay circuit generating a reference signal by adjusting a level of a gate voltage of the output MOS transistor, and a clamp controlling circuit making the dynamic clamp circuit operate based on the reference signal when a counter electromotive force is applied to the output MOS transistor.

Abstract: Apparatus and methods that reduce the amount of conducted/radiated emissions from a power switch (200) when a transistor (210) is switched OFF are disclosed. In addition, apparatus and methods that reduce the slew rate in a power switch when the power switch is switched off are disclosed. The apparatus comprises a transistor (210) including an inductive load (230) coupled to the transistor, a plurality of current sources (222, 224) coupled to the gate of the transistor, and a clamp (250) coupled to either the gate and the drain of the transistor, or to the gate and to ground depending on the location of the inductive load, wherein the clamp comprises a resistive element (260) to increase the voltage of the clamp when current flows through the clamp, and wherein the increased voltage causes the apparatus to include a different slew rate.

Abstract: An apparatus includes an integrated circuit that includes low side power supply circuitry that provides an output voltage for H-bridge circuitry. The low side power supply circuitry includes one transistor that provides one current to the output of the low side power supply circuitry in response to the output voltage of the low side power supply circuitry dropping below a quiescent level. The low side power supply circuitry also includes a second transistor that controls the conduction state of a third transistor, based at least in part, upon the first transistor providing the first current to the output of the low side power supply circuitry. The third transistor provides a second current to the output of the low side power supply circuitry.

Abstract: The present invention describes a voltage-mode boosting write driver circuit (160), comprising a plurality of inputs (WDP, WDN), a plurality of outputs (HWX, HWY), a transducer (L2), a flex interconnection (T1) coupled to the outputs (HWX, HWY) and to the transducer (L2), a first resistor (R15) and a second resistor (R43) coupled to the outputs (HWX, HWY) and to the transducer (L2), an H-switch (Q15, Q60, Q11, Q22) coupled to the resistors (R15, R43), and a plurality of top boosting circuits (Q42, Q47, R36, and Q43, Q48, R37) coupled to the outputs (HWX, HWY).

Abstract: A buffer circuit includes an input terminal operable to receive an input signal and an output terminal at which an output signal for the buffer circuit is provided. In the buffer circuit, three transistors at most provide signal currents. Two of the three transistors can be matched. Means are provided for feeding back the output signal so that the two matched transistors are balanced in response to a change in the input signal appearing at the input terminal.

Abstract: A semiconductor device for controlling a switching power supply is provided, which can reduce power consumption at a light load of the switching power supply and improve the efficiency of the power supply. During the intermittent switching operation of a switching element, when a return signal is outputted from a light load detection circuit within the set time of a transformer reset detection time setting circuit during intermittent stop, the switching operation of the switching element is restarted in response to a transformer reset signal from the transformer reset detection circuit after the return signal is outputted. When the return signal is outputted from the light load detection circuit during the intermittent stop after the set time of the transformer reset detection time setting circuit, the switching operation of the switching element is restarted regardless of the transformer reset signal only in response to the output of the return signal.

Abstract: A write driver circuit for a magnetic storage medium that communicates with a write head having first and second nodes comprises a first driver circuit with an input and an output that communicates with the first node of the write head. A first charge pump communicates with said input and said output of said first driver circuit and provides additional current to said input of said first driver circuit during a first transition period between current flowing through the write head in a first direction and current flowing through the write head in a second direction. A second driver circuit with an input and an output communicates with the second node of the write head. A second charge pump communicates with said input and said output of said second driver circuit and provides additional current to said input of said second driver circuit during a second transition period between current flowing through the write head in said second direction and current flowing through the write head in said first direction.

Abstract: A driver for a switching device has a plurality of driver circuits for driving the switching device and a control circuit. The control circuit selectively operates the driver circuits in response to a plurality of predetermined drive modes. Alternatively, a driver for a switching device has a driver circuit and a control circuit. The driver circuit is connected to a plurality of power sources. Each of the power sources has a different voltage. The control circuit selects one of the power sources for operating the driver circuit in response to a plurality of predetermined drive modes.

Abstract: A CMOS driver with minimum shoot-through current is disclosed. The potential for shoot-through current may be eliminated or reduced with a break-before-make circuit driving an output stage. The break-before-make circuit may include a first logic element followed by a first inverter and a second logic element followed by a second inverter. The inverters may be cross-coupled to one another and/or the internal transistors may be configured with different strengths. The logic elements may be configured to eliminate or reduce potential shoot-through current paths, and the signal inputs may be controlled within a certain voltage range.

Abstract: A gate driving circuit for a voltage-driven power semiconductor switching device has (a) the voltage-driven power semiconductor switching device, (b) a driving circuit for supplying a drive signal to the gate electrode of the switching device, and (c) an inductance between the emitter control terminal or source control terminal of the switching device and the emitter main terminal or source main terminal of a semiconductor module. A voltage produced across the inductance is detected. The gate-driving voltage or gate drive resistance is made variable based on the detected value.

Abstract: The apparatus includes a series active continuous time voltage regulator operating in conjunction with a alternating current power source and one or more loads. The alternating current power source is a voltage source that induces currents at a first end of the apparatus. At a second end of the apparatus one or more loads consume power from the apparatus. The series buck-boost regulator is composed of a pure monochromatic voltage source of frequency equal to that of the alternating current power source, and of constant phase with respect to the alternating current power source. The regulator is further composed of a sampling network that provides a scaled continuous time sample of the voltage delivered by the power conditioner to the loads. Finally, the regulator is composed of a high gain differential amplifier.

Abstract: The invention provides a semiconductor device which performs a write operation of a signal current rapidly to a current input type pixel. Before inputting a signal current, a precharge operation is performed by flowing a large current. After that, a signal current is inputted to perform the set operation. A predetermined potential can be obtained rapidly as the precharge operation is performed before the set operation. The predetermined potential is approximately equal to a potential after completing the set operation. Therefore, the set operation can be rapidly performed and a write operation of a signal current can be rapidly performed. By using two transistors, a gate width W can be long or a gate length L can be short in the precharge operation or the gate width W can be short and the gate length L can be long in the set operation.

Abstract: A semiconductor device controller includes a current supply control unit for controlling a conduction state of a semiconductor device connected to a load in response to a control signal to supply current to the load, a current level judging unit for comparing one or more switching judgment values set in an area smaller than an overcurrent judgment value with current detected by a current detecting unit to carry out a current level judgment and a time constant changing unit for changing the circuit time constant of the input signal processing circuit in accordance with a judgment result by the current level judging unit.

Abstract: A circuit for a high speed digital buffer has an active load circuit connected to an output of the digital buffer. The active load circuit loads the buffer output with an active inductance to reduce the RC time constant at the buffer output. The active load circuit may be based on two active devices connected to the buffer output so as to form a differential cascode circuit.

Abstract: Embodiments of isolated gate driver circuits are disclosed for driving high- and low-side switching devices for half- and full-bridge power converter topology. Disclosed circuits provide sufficient dead-time, operate over a wide range of duty cycles, and require a single power supply (Vcc). Typical applications for such circuits include cold cathode fluorescent lamp (CCFL) inverters that are powered by a high voltage DC rail.

Abstract: A method for driving a motor by imposing the current in the motor by means of power current mirrors is presented. This allows driving the motor in current with higher accuracy and lower electrical noise. The Hard Disk Drive application is an example where higher resolution is required for the VCM motor. Furthermore this method reduces the complexity of the system eliminating components and high performance circuits. Moreover this approach reduces the development and manufacturing cost by simplifying the testability and the analysis of the system. The intrinsic elimination of DC offset also takes out the need for the system offset calibration phase and significantly improves on the harmonic distortion of the transfer function. Furthermore this method offers the advantage of faster overall response of the system and higher efficiency.

Abstract: This invention discloses a new MOSFET device. The MOSFET device has an improved operation characteristic achieved by connecting a shunt FET of low impedance to the MOSFET device. The shunt FET is to shunt a transient current therethrough. The shunt FET is employed for preventing an inadvertent turning on of the MOSFET device. The inadvertent turning on of the MOSFET may occur when a large voltage transient occurs at the drain of the MOSFET device. By connecting the gate of the shunt FET to the drain of the MOSFET device, a low impedance path is provided at the right point of time during the circuit operation to shunt the current without requiring any external circuitry.

Abstract: In a semiconductor device for controlling switching power supply of this invention, having a switching element and switching operation control circuit, after receiving a current detection signal when switching is turned off, a fixed delay time is applied to the current detection signal by a delay circuit so that switching turn-on control by a transformer reset pulse signal obtained based on a signal from the tertiary windings of the transformer is not accepted within a blanking time corresponding to the delay time. Thus, the switching by the switching element is halted.