Abstract: A source-voltage-operated circuit having: an electric power source; an operated circuit section operated according to a voltage supplied by the electric power source; a control-voltage-supplying circuit section for deriving a voltage higher than the voltage supplied by the electric power source from the operated circuit section to rectify the derived voltage and output the resultant voltage as an operating voltage; and a control circuit section operated according to the operating voltage for controlling the operation of the operated circuit section and stopping the operation of the operated circuit section when the operating voltage is decreased to a given reset voltage or below.

Abstract: Hot swappable pulse width modulation power supply circuits preferably realized in integrated circuit form. The hot swap circuits provide for de-bouncing, controlled charging of the input capacitor of the power supply circuit and soft-start of the pulse width modulator after charging the input capacitor. Other features include a low voltage lockout, and an output for coupling to a synchronous rectifier driver to synchronize synchronous rectifiers on the secondary side of a coupling transformer in isolated systems. The hot swap capability may be disabled through an enable pin, or not implemented by not connecting the integrated circuit in a manner to use the hot swap capability.

Abstract: In an active hybrid transformer circuit connected to both transmit and receive sides, a current driver is connected to a transmission path circuit through a common connection point of a load resistor and a replica resistor while a replica driver is connected to the replica resistor of which another connection point is directly connected to the receive side. The replica driver may be formed by a DAC of a current output type. A current ratio of the replica driver and the current driver is selected at a predetermined value so as to prevent a transmit signal from leaking into the receive side.

Abstract: An apparatus for driving a write head in response to a data signal includes: (a) a first drive unit coupled with the write head; (b) a second drive unit coupled with the write head; and (c) a control unit coupled with the first and second drive units. The control unit receives the data signal and generates control signals to the first drive and second drive units in response to the data signal. The control signals control the first drive unit to apply a first drive signal to a first write head side in a first signal polarity and control the second drive unit to apply a second drive signal to the a second write head side in a second signal polarity opposite to the first signal polarity when the data signal effects a signal excursion. The first drive signal and the second drive signal are equal in magnitude time coincident.

Abstract: A gate discharge resistor part is connected to the gate of an IGBT (Insulated Gate Bipolar Transistor). A timer circuit has its output connected to the input of the gate discharge resistor part and the input of a gate driving circuit. When an ON signal for driving the IGBT into an ON state stays input over a predetermined time period, the timer circuit outputs an H-level signal to the gate discharge resistor part and gate driving circuit. The gate driving circuit drives the IGBT into the OFF state based on the signal from the timer circuit. The gate discharge resistor part changes its resistance from a value given by a first resistor to a value given by a composite resistance of the first and second resistors.

Abstract: In one embodiment, a self-gated transistor includes a sensing portion that generates a sense signal that is used to drive the self-gated transistor.

Abstract: A HDD write driver circuit (10) having a boost current overshoot programmed by a plurality of pull-up devices (MP35, MP36, MP39, MP45). The pull-up strength of an inverter (20) is adjustably selected by programming pull-up PMOS devices, and less power is dropped across a resistor (R41) such that there is less boost current overshoot when an overshoot MSB is low.

Abstract: A write driver includes two field-effect/bipolar transistors with feedbacks between the drains/collectors and gates/bases, a write/read switch connected between the drains/collectors and a positive power supply, an impedance matching circuit connected to the drains/collectors to match both differential and common mode output impedance of the write driver to an input impedance of a flex circuit, a common mode output voltage control circuit coupled to the transistors, and a differential mode output voltage control circuit coupled to the transistors.

Abstract: A circuit for controlling a triac, comprising: a bidirectional current-limiting active element connecting the triac gate to its opposite power electrode; and a switch connecting the gate to the other power electrode of the triac.

Abstract: The power IC includes an output transistor M0 which controls a current flowing into an L load, a dynamic clamp circuit which clamps an overvoltage, and a clamp control circuit which controls the operation of the dynamic clamp circuit. The clamp control circuit activates the dynamic clamp circuit, which is normally inactive, upon detection of a back EMF by the L load.

Abstract: In a load driving circuit, a detection current Is (=Io/N), 1/N of a driving current Io, flows in a detection resistor, where N indicates a shunt ratio between a current (=driving current Io) that flows in an output source (S1) and a current (=detection current Is) that flows in a detection source (S2). The shunt ratio is determined by a cell ratio between the output source (S1) and the detection source (S2).

Abstract: Disclosed are methods and circuits for impedance-controlled write drivers using matched impedance control circuits coupled in parallel with a magnetic write head.

Abstract: The present invention achieves technical advantages as an improved Parallel Damping scheme suitable for very-low-supply preamp operation. The improved Parallel Damping Scheme accurately generates a programmable Iw flowing through the write head while compensating for a leakage current path through a Parallel Damping resistor.

Abstract: A demagnetizer for an inductive load having a driver circuit including at least one transistor and a ramp-down voltage source switchably connected to the driver circuit, so that when the ramp-down voltage source is connected to the transistor, it drives the voltage of the transistor below its threshold voltage.

Abstract: An electronic logic driver circuit, for driving a capacitive load between supply potentials for example for use in driving logic circuit elements on or off a chip, is disclosed. The driver circuit comprises switching devices to switch current either to or from two main voltage supply sources and two coupled inductors that act to store energy derived from the voltage sources. In operation, the coupled inductors form an LC resonator with the load such that energy stored in the inductors can be transferred to or from the load to drive a change in the voltage of the load.

Abstract: A technique for simplifying the control of a switch is presented. In one embodiment, a method of controlling a switch as a function of the voltage across the switch is presented. In one embodiment a method of controlling a switch as a function of the slope of the voltage across the switch is present. In one embodiment a switching is switched on for an on time period that is substantially fixed in response to a voltage across the switch while the switch is off. In one embodiment a switch is switched on for an on time period that is substantially fixed in response to the slope of the voltage across the switch while the switch is off.

Abstract: The invention relates to a line driver arrangement for driving signals via at least one subscriber line, provided with: an input for injecting an input signal and having an output at which a signal which is to be driven via the subscriber line can be tapped off, a digital amplifier which produces a pulse-width-modulated signal on the output side from the input signal or from a signal derived from it, an analog amplifier, which produces an analog signal on the output side from the input signal or from a signal derived from it, with the outputs of the amplifiers being coupled such that the signal to be driven results from superimposition of the analog signal and the digital signal, with the gain of the analog amplifier being matched to the gain of the digital amplifier such that scatter and/or overshoot on the digital signal are at least reduced after the superimposition.

Abstract: A system and method for measuring in real-time the current of a current mode driver circuit for writing data through a write head in tape or disk drive storage devices, the current mode driver circuit including one or more current mirror circuits for providing a current output in proportion to current through the write head during a write operation, the system comprising: device for converting the current mirror circuit current output into a first voltage; device for generating a second voltage representing a reference current; and, a device for comparing the first voltage value to the second voltage and generating an output signal indicating a ratio of the first and second voltages, the ratio being a measure of the current output of the current mirror circuit.

Abstract: The auto-restart characteristic of a controller is prevented. A circuit comprises a voltage control loop, a control winding, an optical isolator component, and a diode biasing network. In the case of a power outage, the current from the voltage control loop begins to drop, resulting in the optical isolator component coming out of conduction. The optical isolator component coming out of conduction cuts off current to the control input of the controller. The removal of current causes the control winding voltage to drop, removing current from the diode biasing network, resulting in the removal of a bias voltage from the control pin of the controller. This removal results in the drop of the received voltage at the control pin, such that the received voltage is never in the trigger range of the auto-restart characteristic. Consequently, on reapplication of power, the controller achieves normal startup time.

Abstract: A FET switching transistor for the solenoid coil of an ABS braking system can switched ON or OFF in no more than substantially 250 ns. A higher current biasing circuit for fast turn on of the FET switching transistor is disconnected when it is necessary to limit the current flowing therethrough, whether during the inrush current to the solenoid coil or due to a fault in the system. The high speed switching of the FET switching transistor causes ringing of the current through the transistor which causes the current detector circuit to exit the current control mode. A deglitch circuit prevents the current detector from exiting the current control mode, so that a timer can be used to turn off the FET switching transistor before it can be damaged by the heat generated during current limit operation.

Abstract: A circuit making use of a push/pull-type control chip to drive a half-bridge inverter of dual N-MOS connects a drive circuit to a conventional half-bridge inverter circuit, and has a push/pull-type control chip having two output terminals, a drive circuit having two input terminals and two output terminals, and a half-bridge switch assembly having a first N-MOS FET and a second N-MOS FET. The two input terminals of the drive circuit are connected with the two output terminals of the push/pull control chip and controlled by the push/pull-type control chip. Each of the two N-MOS FETs of the half-bridge switch assembly has a control terminal, which is connected to one of the two output terminals of the drive circuit and driven by the drive circuit for converting a DC power source into an AC power source sent to the primary side of a transformer.

Abstract: The invention concerns a control circuit (20) of a switch (6) chopping a voltage supply of a primary winding of a power converter transformer, comprising means (45) for detecting the current in the switch in closed state after a predetermined time following each closure of said switch, and a comparator (40) of said current relative to a threshold (Ilim), the result of said comparator being taken into account for a predetermined time interval close to the beginning of a closing cycle of said chopping switch.

Abstract: A semiconductor device includes a power device, and a driver which drives the power device. The driver includes a capacitor which is charged or discharged in correspondence to an external control signal, a first comparator which compares a voltage of the capacitor with a first reference voltage, and outputs a first signal based on a result of the comparison, a drive controller which outputs a drive signal in correspondence to the first signal to the power device; and a capacitor charger which detects the voltage of the capacitor, and supplies a current to the capacitor to charge the capacitor when the voltage of the capacitor is increasing within a given range.

Abstract: A method and device for switching power semi-conductors on and off, especially for IGBTs and MOS-FETs with inductive loads, and how they would be employed with torque-variable asynchronous machines, in ignition systems for spark ignition engines, in switch mode power supplies and power factor controllers. During a switching operation of the power semiconductor, a voltage across the semiconductor and the current through the semiconductor are measured, a time function of the voltage as well as a time function of the current are controlled, and the control of the voltage time function and the control of the current time function are effected essentially one after the other.

Abstract: An operational amplifier connected to first and second transistors of an H-bridge for sinking and sourcing current, the operational amplifier having a differential input and an output and comprising a transconductance circuit, a gain circuit, a buffer circuit, and first and second feedback networks. The transconductance circuit is connected to receive the differential input and provide an output, wherein the output is connected to the second transistor of the H-bridge. The gain circuit is connected to receive the output from the transconductance circuit, wherein the gain circuit includes a transistor that is matched to the second transistor of the H-bridge. The buffer circuit is connected between the gain circuit and the first transistor of the H-bridge. The first feedback network comprises a level shift circuit connected to the output of the operational amplifier and a clamping circuit connected between the level shift circuit and an input of the buffer circuit.

Abstract: A driving circuit for electrical nailing gun is disclosed to include a capacitive charging/discharging unit formed of a first resistor, a first diode, and a capacitor connected in series and connected with two opposite ends thereof to the positive and negative poles of AC power source, an excited field unit formed of a first coil and a first electrically-controlled switch connected in series and having two opposite ends connected in parallel to the capacitor, and a control unit electrically connected to the first electrically-controlled switch for activating the first electrically-controlled switch.

Abstract: A write driver driving a write current through a head connected to the write head by an interconnect. The write driver includes a circuit matching output resistance to the odd characteristic impedance of the interconnect and a voltage boosting circuit. The voltage boosting circuit in connected between a high voltage reference or supply voltage and a low voltage reference, and includes a current source, such as a MOS transistor, connected to the input node of a capacitor. During the overshoot duration, the current source operates at saturation to generate a pulsed current with an amplitude of half the load current. The circuit includes another transistor in series with the current generator between the capacitor and the driver output. A forward bias diode is connected between the capacitor output node and high voltage reference and enters reverse bias during overshoot duration swinging the driver output voltage above supply voltage.

Abstract: A pre-amplifier, a Thevenin writer and a disk drive employing transistors having a breakdown voltage below a circuitry operating voltage. In one embodiment, the pre-amplifier includes an emitter-follower transistor pair couplable to a power supply and a differential transistor pair, having a collector-emitter breakdown voltage below a voltage of the power supply, that receives current from, and controlled by, the emitter-follower transistor pair.

Abstract: A motor bridge driver interlace, implemented in an ASIC using cost-efficient CMOS technology, is designed to control four external MOS power transistors in a H-bridge configuration for DC-motor driving to achieve accurate and fast switching. Main components of the interface are a charge pump for generating the control voltage for the high-side N-channel MOS transistors, high-side (HSD) circuits, low-side (LSD) circuits and a complex digital interlace for supplying the control signals in a programmable timing scheme. A “strong” charge pump is used to realize a simple CMOS switch to steer the output to the high-side transistors of said H-bridge. The motor bridge is connected to the battery supply by an additional N-channel MOS transistor to implement a reverse supply protection.

Abstract: A magnetic storage system includes a preamplifier writer that selectively drives a write current through a write head to write data to a magnetic storage medium. The write current generated by the preamplifier writer has a boost stage and a settling stage. An impedance changing circuit communicates with the preamplifier writer and the write head and provides a lower resistance value during the boost stage and a higher resistance value during the settling stage.

Abstract: The invention relates to a driver circuit (10) for integrated circuits comprising at least one input node (11) for an input signal and at least one output node (12) for an output signal. One or several, preferably two partial drivers (20, 30) supply approximately sine-wave shaped current to the load capacity (15) thereby improving electromagnetic compatibility. A feedback circuit (40) is also provided. Said feedback circuit consists of one or several evaluation circuits (50) and one or several feedback capacitors (41). The evaluation circuits (50) are connected to the partial drivers (20, 30) One feedback capacitor (41, 42) is respectively arranged between an output node (12) of the driver circuit (10) and an input node (51) of an evaluation circuit (50). An evaluation circuit (50) is provided via the feedback condenser (41, 42) between an output node (12) of the driver circuit and an input node (51). The edge steepness of the signal i.e.

Abstract: A circuit arrangement for switching an inductive load (12, 12a-d) with connections to a power supply source (11, 11?, 11?) by means of which an exciter voltage can be applied to the inductive load (12, 12a-d) in a switched-on state is described, comprising switching means by means of which, depending on a control signal, a power circuit comprising the inductive load (12, 12a-d) and the power supply source connections, can be closed when switched from the switched-off to the switched-on state and opened when switched from the switched-on to the switched-off state, furthermore comprising a first diode (15, 15a-d, 15a?-c?, 15a?-c?) arranged in parallel with the inductive load (12, 12a-d) and so as to block in the switched-on state. This present invention is characterized in that an additional commutation inductance (18) is provided which is arranged in parallel with the inductive load (12, 12a-d) and in series with the first diode (15, 15a-d, 15a?-c?, 15a?-c?).

Abstract: A driver circuit for driving a line in a network comprises first driving means for driving the line, second driving means for driving the line, and switching means for switching between the first and second driving means. A method for providing multi-mode driver capability is also described. The method comprises the steps of providing a line driver circuit including both a current source and a voltage source, selecting a first or second mode of operation, operating the line driver circuit in a first configuration when the first mode of operation is selected, and operating the line driver circuit in a second configuration when the second mode of operation is selected.

Abstract: A power module includes a power semiconductor device having a first terminal, a second terminal, and a third terminal. The second terminal is a control terminal to regulate flow of electricity between the first and third terminals. A gate driver has an output node coupled to the second terminal of the power device. The gate driver includes an upper transistor and a lower transistor provided in a half-bridge configuration. The output node of the gate driver is provided between the upper and lower transistors. A first delay circuit is coupled to a control terminal of the upper transistor to provide a first delay period for a first gate drive signal being applied to the control terminal of the upper transistor. A second delay circuit is coupled to a control terminal of the lower transistor to provide a second delay period for a second gate drive signal being applied to the control terminal the lower transistor. The first delay period is different from the second delay period.

Abstract: A signal is coupled from the primary to the secondary of a transformer, to a signal receiver which has a supply voltage derived from the signal via a rectifier arrangement including a filter capacitor. A plurality of signal drivers on the primary side have their outputs enabled by output enable signals with different timing for different ones of the drivers. The different timing includes small delays to spread crowbar currents over a short period, enabling an increasing number of drivers with increasing initial charge of the capacitor, and disabling drivers while others remain enabled, in order to reduce peak currents and kick-back voltages.

Abstract: A circuit for sensing the presence of an inductive load that is particularly applicable to sensing when a solenoid is being driven by a pulse width modulation (PWM) signal. The circuit includes a high side connected transistor having an output driving a load, with the transistor driven by a PWM signal. A circulating diode is coupled to the driving output of the transistor. The circuit further comprises an operational amplifier (op amp) circuit that is coupled to the circulating diode and operates as an inverting operational amplifier (op amp). The op amp circuit charges a first capacitor when the transistor releases driving an inductive load.

Abstract: An over-voltage protection circuit prevents an anomaly, such as a short circuit in the upper-switched electronic device of a DC—DC power supply, from propagating to downstream circuitry. The over-voltage protection circuit, which includes an overvoltage sense resistor coupled between an output of the upper or high side FET and the gate of the lower FET, is operative to sense a short circuit fault condition in the circuit path through the upper FET during initial power up of the system. In response to this condition, the lower NFET device is turned on so as to provide an immediate by-pass of the overvoltage condition to ground, and thereby prevent excessive voltage from being applied by the output terminal to downstream powered circuitry.

Abstract: Devices and methods for generating a magnetic head-specific overshoot current which is combined with an alternating current waveform into a write current used by the magnetic head to store information on a magnetic medium. A processor analyzes the frequency of incoming write data and retrieves from a data table of an overshoot current amplitude and an overshoot current phase. This amplitude and phase information is sent to an overshoot current generator to generate an overshoot current that is responsive to the dynamic impedance properties of a magnetic write head during operation. The data table may have information related to one or many write heads, and the data table may be further subdivided based on additional dynamic characteristics of a write head that may affect the impedance thereof.

Abstract: A motor bridge driver interface, implemented in an ASIC using cost-efficient CMOS technology, is designed to control four external MOS power transistors in a H-bridge configuration for DC-motor driving to achieve accurate and fast switching. Main components of the -interface are comprising a charge pump for generating the control voltage for the high-side N-channel MOS transistors, high-side (HSD) circuits, low-side (LSD) circuits and a complex digital interface for supplying the control signals in a programmable timing scheme. A “strong” charge pump is used to realize a simple CMOS switch to steer the output to the high-side transistors of said H-bridge. The motor bridge is connected to the battery supply by an additional N-channel MOS transistor to implement a reverse supply protection.

Abstract: A drive circuit for LEDs or other light-emitting elements with which the influence of the changes in temperature or power supply voltage and the element variations can be restrained in order to output a pulse current with a constant level. When n-type MOS transistor 10 is on, power is supplied from switching power supply 60 to the LED, and the current of LED is detected by resistor 20. The error signal Serr between said detection signal Sfb and setpoint signal Sref is generated by error signal generating unit 30 and is averaged by signal holding unit 40. The power supplied to the LED is controlled corresponding to the averaged error signal SerrA. When n-type MOS transistor 10 is turned off from the on state, the power supplied to the LED is stopped, and error signal SerrA is held in signal holding unit 40. When n-type MOS transistor 10 is turned on from the off state, the averaging of error signal Serr is started with the signal level of the held error signal SerrA used as the initial level.

Abstract: To provide a semiconductor switch driving circuit in which a stable conducting state and a non-conducting state can be kept, the high-speed switching operation is enabled, a lag of switching timing is minimized and which has a simple circuit, the semiconductor switch driving circuit for driving a semiconductor switch in which multistage switching devices (IGBT) are connected includes a transformer, a primary side and a secondary side and is configured so that voltage between the gate and the emitter of a switching device can be continuously kept positive, voltage between the gate and the emitter can be continuously kept negative, voltage between the gate and the emitter is alternately switched to positive voltage or negative voltage.

Abstract: A line driver is disclosed comprising a termination portion which includes a termination resistance (Rterm) and which is supplied in use by an operational amplifier (op-amp), with a termination current (VNE/R) for load matching. The termination portion further comprises a back-termination transformer (1:&agr;) which is series coupled with the termination resistance (Rterm). The power dissipated in the termination resistance (Rterm) is less than the power (P/2) available to a signal transmission portion for signal transmission along an associated transmission line (Rload) and the power consumption efficiency of the line driver is improved. (FIG. 4).

Abstract: A power MOS-FET is used as a high side switch transistor for a non-insulated DC/DC converter. An electrode section that serves as a source terminal of the power MOS-FET is connected to one outer lead and two outer leads via bonding wires respectively. The outer lead is an external terminal connected to a path for driving the gate. Each of the outer leads is an external terminal connected to a main current path. Owing to the connection of the main current path and the gate driving path in discrete form, the influence of parasitic inductance can be reduced and voltage conversion efficiency can be improved.

Abstract: A circuit arrangement for an electric appliance, having a control device and a power supply unit connected with an electric current supply connector for providing functional units, which are to be controlled, of the electric appliance with current. A switch is provided on the electric current supply connector for cutting off the power supply unit from the electric current supply connector on a primary side. The switch has a piezo switch which is open in the non-activated state. The circuit arrangement of this invention is used, for example, in connection with electronic household appliances.

Abstract: A write driver circuit selectively provides write current through a write head in first and second opposite directions. First and second active devices are driven with first and second pre-drive signals. Third and fourth active devices are driven with third and fourth pre-drive signals. First and second pull-up resistances are provided respectively between the first and second active devices and a fixed voltage, and third and fourth pull-up resistances are provided respectively between the third and fourth active devices and the fixed voltage. A first capacitor is connected between the first active device and an intermediate point of the third pull-up resistance, and a second capacitor is connected between the second active device and an intermediate point of the fourth pull-up resistance.

Abstract: An adaptable, low-power drive circuit for transistor switches requiring control input current is disclosed. In one embodiment of the invention, a current source output replaces the prior art voltage drive circuits and associated external current-limiting resistor. The current-source drive circuit provides both a high impedance as well as variability. The high impedance of the current-source drive circuit enables a reduction in the value of the resistance-bypass capacitor employed in the prior art. The variability in the output current provided by the current-source circuit allows the drive circuits to optimize the control current flowing into the switch device as the characteristics of the switch device change with operating temperature. The drive circuit is capable of providing as output either a desired current, at a high output impedance, or a desired voltage, at a low output impedance, employing a shared amplifier and output transistor.

Abstract: A transconductance circuit (16) and method for protecting an H-bridge power circuit (10) that provides power to a load that includes an inductive component (14) connected between one side of the inductive component (14) and a gate (25) of a low side transistor (24) of the H-bridge (10). The transconductance circuit (16) operates to pull current from the inductive component (14) to ground (30) when the inductive load (14) sources current to a body diode of the high side transistor (20). The transconductance circuit (16) creates a regulated voltage to the gate (25) of the low side transistor (24) to cause the low side transistor (24) to conduct the current away in a regulated manner from the inductor (14) and the high side transistor (20) to ground (30).

Abstract: A write current circuit (40) adapted to drive a thin film write head (L0) of a mass media information storage device. The write current circuit includes a write current reference voltage circuit (42) adapted to selectively establish amplitude of a write current signal. The write current circuit further includes programming circuitry (M5-M10) driven such that several parameters of the write current waveform can be controlled, including the write current amplitude, overshoot amplitude and overshoot duration. The present invention achieves technical advantages by providing the ability to both produce an accurate write current, and also providing the ability to establish the write current waveform shape so that customers can optimize disk drive performance even when using different thin film write heads available from different suppliers.

Abstract: A high-speed laser driver for signal noise on the electrical analysis point. The driver includes a power supply, for providing a test voltage in the system; a pulse generator, for providing a test frequency in a noise testing of the system; a regulable test IC with different signal pads capable of regulable testing signal noise with the test frequency from the pulse generator and the test voltage from the power supply in a plurality of built-in specific structures, under the basis of an assigned current standard; and a digital detection device with a display, for displaying and recording the result of the regulable test.

Abstract: A method for controlling write current to a write head during data write on a hard disk drive is disclosed. A direct access storage device includes a rotating storage medium in which data are magnetically written, a write head for writing data in the rotating storage medium, and a write current control circuit for changing write current-value settings to be supplied to the write head according to a predetermined elapsed time from the beginning of a write operation.