Abstract: A current measuring system for measuring current from a conductor comprises a first and second circuit and a current measurer connected to a conductor connected to a first power source. The first circuit comprises an inverting operational amplifier, which generates a first threshold signal when current flows into the first power source. The second circuit comprises a biasing circuit and a non-inverting operational amplifier, which generates the first threshold signal at the second output when current flows out of the first power source.

Abstract: A detector circuit for galvanically isolated transmission of digital signals. The detector circuit includes two differential signal inputs, one input common-mode voltage connection, one alternating voltage coupling, and one differential stage. The detector circuit also includes one operating voltage connection, one operating ground connection, one signal output, one bias current connection, and one rectifier stage. The alternating current coupling includes two capacitors and two resistors. The differential stage includes a first n-channel transistor and a second n-channel transistor. The bias current connection is connected to the differential stage via a third n-channel transistor. The bias current connection is connected to the rectifier stage via a fourth n-channel transistor and a fifth n-channel transistor. The rectifier stage includes five p-channel transistors.

Abstract: Traditionally, mixers have been arranged symmetrically around the input signal, which has resulted in problems due to self-mixing or feed-through by the local oscillator signal. Here, however, the arrangement for a mixer has been changed to generally avoid self-mixing of the local oscillator signal. In particular, transistors in the switching core are merged according to the portion of the local oscillator signal received. This, in turn, results in the conductors, which carry the different portions of the local oscillator signal, being separated (or not having any crossings) so as to generally eliminate self-mixing or feed-through of the local oscillator signal. Complex IQ mixers realized using this arrangement benefit from improved sideband suppression and image rejection.

Abstract: A unidirectional sampling mixer utilizes a stepped phase modulation to shift the frequency of an input signal. An RF input signal is supplied to an RF input switch from an RF input port. An ordered set of phase shift values to be applied to the RF input signal and a set of times each element of which correspond to a time at which a phase shift value is be applied to the RF signal are determined. For each phase shift value within the ordered set of phase shift values, a controller controls the RF input switch to select an input of a phase shifting device and controls an RF output switch to select an output of the phasing shifting device. The input of the phase shifting device and the output of the phase shifting device are selected to apply the phase shift value at its corresponding time to the RF input signal. A frequency shifted signal is supplied to an RF output port from an output of the RF output switch.

Abstract: An apparatus of a Harmonic Rejection Mixer (HRM) for removing a harmonic component and an operating method thereof are provided. The HRM includes a Local Oscillator (LO), at least one frequency converter, at least two mixers, at least one phase converter, and a combiner. The LO generates an LO signal. The at least one frequency converter multiplies the LO signal using different variables to provide the same to at least two mixers. The at least two mixers convert a frequency band of an input signal using the LO signal provided from the LO and the at least one frequency converter. The at least one phase converter controls a phase of an output signal of at least one other mixer excluding one of the at least two mixers. The combiner combines an output signal of the one mixer with an output signal of the at least one phase converter.

Abstract: A current mirror for generating a substantially identical current flow in two parallel current paths, each current path comprising a switching device and each switching device comprising first and second active terminals and a control terminal for controlling current flow between the first and second active terminals, the current mirror comprising a first switching device arranged such that its first active terminal is arranged to receive a first voltage, its second active terminal is arranged to receive a variable voltage that varies independently of the first voltage and its control terminal is arranged to receive a control voltage, a second switching device connected such that its first active terminal is arranged to receive the first voltage and its control terminal is arranged to receive the control voltage and a voltage control device connected to the second switching device such that an input of the voltage control device is connected to the second active terminal of the second switching device, the vo

Abstract: A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled.

Abstract: The noise response in a passive mixer circuit is improved by discharging the switching transistors in the mixer circuit in an appropriate time slot prior to activation. In addition to improving the noise response, tilt in conversion gains and linearity can be reduced. A passive mixer circuit includes bypass switches arranged in proximity to the switching transistors that make up the mixer core. These bypass switches, which are activated in intervals just prior to the active intervals of their neighboring switching transistors, discharge to ground accumulated charges on the switching transistors or on reactive components around switches.

Abstract: A unidirectional sampling mixer utilizes a stepped phase modulation to shift the frequency of an RF input signal supplied to an RF input switch. An ordered set of phase shift values to be applied to the RF input signal and a set of times each element of which corresponds to a time at which a phase shift value is be applied to the RF signal are determined. For each phase shift value, a controller controls the RF input switch to select an input of a phase shifting device and controls an RF output switch to select an output of the phasing shifting device. The input and the output of the phase shifting device are selected to apply the phase shift value at its corresponding time to the RF input signal. A frequency shifted signal is supplied to an RF output port from an output of the RF output switch.

Abstract: A bipolar current multiplier apparatus and method includes a group of negative feedback loop circuits for compensating base current loss, and multiple bipolar devices that communicate electronically with the negative feedback loop circuits, wherein the bipolar devices are responsive to base currents capable of being self-cancelled due to a presence of the negative feedback loop circuits, thereby ensuring that an output is stabilized over temperature and process variations while providing for a wide input dynamic range. In some embodiments, the bipolar current multiplier apparatus can be associated with a preamplifier for a hard disk drive to calculate the output power associated with a power driver that controls the flying height of read/write heads of the hard disk drive.

Abstract: In one aspect, the present invention exploits the termination conductances of a time-discrete harmonic mixer as another degree of freedom in configuring the mixer to meet given harmonic rejection performance requirements while using reduced number of unit cells. The values of these termination conductances are purposefully configured to introduce a desired non-linearity in quantization of the mixer transconductance by the unit cells. The non-uniform quantization produces a non-linear fitting of the transconductance levels to the transconductance points defining the target sinusoidal waveform. As a consequence of its termination conductance configuration, the contemplated mixer achieves levels of harmonic rejection with that would not be met if the reduced number of unit cells operated with uniform quantization. As a further advantage, the manipulated conductance values generally are lower than those used in conventional designs, e.g.

Abstract: A high frequency mixer with a tunable dynamic range is disclosed. One embodiment provides a mixer apparatus including multiple first transistors at an input branch that receive a differential radio frequency (RF) signal, and multiple second transistors at a second branch that receive a differential local oscillator (LO) signal. The second transistors generate an intermediate frequency (IF) differential output signal. The bias current that flows at the input branch and the output branch can be independently adjusted to allow the conversion gain, linearity, or the output noise of the mixer to be controlled.

Abstract: An apparatus of a Harmonic Rejection Mixer (HRM) for removing a harmonic component and an operating method thereof are provided. The HRM includes a Local Oscillator (LO), at least one frequency converter, at least two mixers, at least one phase converter, and a combiner. The LO generates an LO signal. The at least one frequency converter multiplies the LO signal using different variables to provide the same to at least two mixers. The at least two mixers convert a frequency band of an input signal using the LO signal provided from the LO and the at least one frequency converter. The at least one phase converter controls a phase of an output signal of at least one other mixer excluding one of the at least two mixers. The combiner combines an output signal of the one mixer with an output signal of the at least one phase converter.

Abstract: Heterodyne commutating apparatuses and methods for creating the heterodyne commutating apparatuses are disclosed. The heterodyne commutating mixer includes a plurality of switches for transferring a radio frequency input signal sequentially during a plurality of local oscillator period timeslots to a plurality of output capacitors. The heterodyne commutating mixer also includes a plurality of inductors added across differential in-phase output terminals and quadrature output terminals. Values of inductance and capacitance are set to achieve resonance at an output intermediate frequency.

Abstract: Provided are a direct sampling circuit and a receiver using a discrete time analog process and having a filter effect of a steep attenuation characteristic in a narrow-pass band without lowering a sampling rate. In a discrete time direct sampling circuit (13), the positive phase side and the inverse phase side are both sampled by a local signal for a differential current output of a differential voltage/current conversion unit (1011) and electric charge is accumulated in a charge sampling capacitor. The latest accumulated charge at the positive phase side and charge accumulated at the inverse phase side before a predetermined number of samples are combined with the charge accumulated in a history capacitor (1043) in the past. Thus, it is possible to realize equivalently high-degree FIR filter characteristic.

Abstract: A transconductor circuit used in a mixer for canceling second-order inter-modulation distortion includes a first transistor and a second transistor, of which the base (gate) ends coupled to a first input end and a second input end, for receiving a differential input signal; and a negative feedback circuit, of which the input end coupled to the emitter (source) ends of the first transistor and the second transistor, of which the out end coupled to the base (gate) ends of the first transistor and the second transistor, for adjusting the voltage of the base (gate) of the first transistor and the second transistor according to the difference between a reference voltage and the detected voltage of the emitter (source) of the first transistor and the second transistor.

Abstract: A circuit with inputs for first (LO) and second (IF) unbalanced signals at respective first and second frequencies, also comprising a mixer for the first and second input signals to produce a third signal (RF) at a third frequency at an output port. The mixer comprises first and second transistors which are cross-coupled to each other. Output terminals of the transistors are connected to the output port, and the mixer also comprises a first impedance connected to ground. The mixer, by means of the transistors and the first impedance is an active balun for the first input signal (IF), and the input port for the second signal (LO) comprises a second impedance, so that the first and second impedances together act as a passive balun for the second signal (LO).

Abstract: A pre-distortion circuit that may introduce a pre-distortion signal in a communication channel by determining a harmonic signal of the signal to be output. One or more image correction signals of the signal to be output may be determined. The one or more image correction signals may be complex conjugate signal variations of the signal to be output. The harmonic signal, the one or more image correction signals and the signal to be output may be combined into a combined output signal. The combined output signal may be transmitted to a digital-to-analog converter. The predistortion circuit may be implemented in a FPGA, an ASIC, a digital-to-analog converter, and/or a separate IC package.

Abstract: An exemplary embodiment of an analog multiplier may include a voltage controlled resistance circuit, a first transistor and a second transistor, where the resistance of the voltage controlled resistance circuit is based upon a first input voltage. The current passing through the voltage controlled resistance circuit is based upon a second input voltage. The first transistor and the second transistor form a current mirror to mirror the current passing through the voltage controlled resistance circuit to provide a power supply control current to a wideband code division multiple access radio frequency power amplifier.

Abstract: A receiver arrangement includes a single ended multiband feedback amplifier, at least one single ended input, differential output mixer arrangement including a main mixer and a trim mixer, and a mixer feedback loop circuit configured to receive differential output signals generated by the mixer arrangement. The mixer feedback loop circuit generates a feedback signal based on the received differential output signals and provides the feedback signal to the mixer arrangement to minimize DC-offset and second order intermodulation products. The single ended multiband feedback amplifier may include an input stage and a programmable resonance tank circuit connected to the input stage for suppressing downconverted noise from harmonics of the LO-frequency, and a configurable feedback net that shapes the frequency response of a feedback loop including the feedback net based on a band operation of the single ended multiband feedback amplifier.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: Disclosed are apparatus and methods for electronic signal conversion in which a power level of the signal is used to adjust the bias current of a converter.

Abstract: A transmitter circuit is described. The transmitter circuit includes a first local oscillator that generates a first frequency equal to a duplex frequency. The transmitter circuit also includes a second local oscillator that generates a second frequency equal to a receive frequency. The transmitter circuit further includes a first mixer that combines the first frequency with a first input signal. The transmitter circuit also includes a first feedback loop. The first feedback loop includes a second mixer that combines the second frequency with a transmit signal and a first filter and a first adder that combines an output of the first mixer with an output of the first filter. The transmitter circuit also includes a third local oscillator that generates a third frequency equal to the receive frequency. The transmitter circuit further includes a third mixer that combines the third frequency with an output of the first adder.

Abstract: Methods and systems using Pade' Approximant expansion ratios provide mappings between nonlinear sensors and a more linear output domain. The method includes a method of converting an input digital signal having a nonlinear dependency on a physical variable into an output digital signal that exhibits a substantially linear dependency with respect to the variable is disclosed. The method includes: (a) multiplying the input digital signal by a variable multiplying factor to thereby generate a multiplied digital version of the input signal; (b) adding to the multiplied digital version of the input signal, a predefined digital offset signal to thereby produce the output digital signal; (c) multiplying the output digital signal by a predefined feedback gain correction factor to thereby produce a digital feedback signal; (d) using the digital feedback signal to produce the variable multiplying factor.

Abstract: System for converting a radiofrequency signal SRX so as to recover encoded information carried by the signal SRX, includes generating elements arranged to generate a signal SLO, mixing elements (3) arranged to generate a signal SRX-LO by mixing the signal SRX with the signal SLO, an analog/digital converter arranged to convert the signal SRXLO into a digital signal SRX-LO-Num, a device generating an error correction digital signal SCor, the device being arranged so that the signal SCor reflects the phase gap between the phase of the signal SLO and a phase setpoint, the phase setpoint being the phase of an ideal signal S0, ideal for recovering the encoded information carried by the signal SRX, combining elements arranged to generate the signal S0?Num by combining the signal SRX-LO-Num with the signal SCor. A system for converting a digital signal so as to send a radiofrequency analog signal carrying the information of the digital signal is also described.

Abstract: Disclosed are apparatus and methods for electronic signal conversion in which a power level of the signal is used to adjust the bias current of a converter.

Abstract: Mixer circuits (1) comprise mixers (2) for receiving input signals and oscillation signals and for outputting output signals. By providing the mixers (2) with loads (3) having adjustable load values and by introducing adjustors (4) for adjusting and sweeping the loads (3), which adjusted loads (3) have different load values at different moments in time, and by introducing detectors (5) for detecting components such as second order intermodulation products of the output signal per load value and selectors (6) for selecting detection results and for instructing the adjustors (4) to set the loads (3) in response to the selected detection result, the mixer (2) is calibrated. The detectors (5) comprise filtering circuitry (52) for filtering the components and comprising slope detection circuitry (53) and the electors (6) comprise comparison circuitry (61) for comparing slope values with each other for finding an extreme slope value that defines the detection result to be selected.

Abstract: A quadrature mixer circuit and an RF communication semiconductor integrated circuit capable of suppressing variations in secondary distortion while reducing the current consumption are provided. In a quadrature mixer circuit, even if local signals different by 90 degrees inputted to the bases of I transistors and Q transistors have large amplitudes, interference is suppressed by I resistors, Q resistors, and capacitors. Also, since the capacitors are provided, changes in bias current values can be suppressed. Accordingly, variations in secondary distortion can be suppressed. Furthermore, the capacitors combine current outputs of a differential circuit formed of I transistors and the resistor and a differential circuit formed of Q transistors and the resistor. Therefore, current consumption can also be reduced.

Abstract: Methods, systems, and apparatuses, for down-converting and up-converting an electromagnetic signal. In embodiments the invention operates by receiving an EM signal and recursively operating on approximate half cycles of the carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate the bias signal. The output of the switch is filtered, and the desired harmonic is output.

Abstract: An N-stage inductor-less local oscillator (LO) buffer can include N?1 non-final stages and a final stage. The final stage can includes a gain circuit, a common-mode feedback circuit connected to the gain circuit, and a replica bias circuit that provides a predetermined voltage to the common-mode feedback circuit. The inductor-less LO buffer can advantageously reduce a power budget for its downstream mixer as well as provide a compact footprint.

Abstract: A frequency mixer includes a first N channel MOS transistor, second and third N channel MOS transistors constituting a local oscillator signal differential pair, and having substantially identical properties, a first load, and a second load. The first N channel MOS transistor receives an RF signal at its gate. A local oscillator signal is applied to the gates of the second and third N channel MOS transistors. The drain current of the second and third N channel MOS transistors is output to the drain of the first N channel MOS transistor. An amplitude-current conversion circuit receives the RF signal and provides an output current to the drain of the first N channel MOS transistor to decrease monotonously the output current with respect to the amplitude of the RF signal.

Abstract: A mixer capable of detecting or controlling a common mode voltage thereof, includes at least: a mixing module for mixing a first set of differential signals and a second set of differential signals to generate at least one mixed signal; and a compensation module for compensating at least one operation point of the mixing module.

Abstract: When a signal of a double frequency is generated from the original signal, conventionally a 90-degree phase-shift circuit is necessary to suppress an output of a DC component and efficiently obtain a double wave. According to the present invention, an equal RF signal is inputted to input terminals and an output is matched with a frequency as high as that of the original frequency in a Gillbert cell double-balanced mixer, so that a doubled output is obtained with no DC offset. According to the circuit configuration of the present invention, it is possible to provide a circuit readily performing integration and to efficiently output only a double frequency merely by inputting a simple differential signal without the need for the original signal which has been phase controlled. Further, a DC short circuit in the resonance circuit makes it possible to eliminate a DC offset voltage in an output.

Abstract: The present invention relates to a radio-frequency mixer arrangement in which a differential amplifier is connected to an input on a multiplier. The differential amplifier is arranged together with at least one capacitance in the feedback path of an operational amplifier. The at least one capacitance performs the function of an antialiasing filter. The feedback operational amplifier with the design described results in a highly linear output signal given low output noise and a low current requirement. The mixer proposed is particularly suitable for use in vector modulators or polar modulators in transmission paths in mobile radios.

Abstract: An amplifier circuit amplifies a differential signal supplied by a pair of input terminals. A phase controller circuit is placed between the emitters of two bipolar transistors and the ground. A feedback circuit is placed across the input and the output of the amplifier circuit for feeding the output of the amplifier circuit back to the input thereof. A phase change amount in the amplifier circuit is determined by the values of two inductors, whereas a phase change amount in the feedback circuit is determined by the values of two resistances and capacitors. The values of these devices are selected so that a phase difference between an input signal and a feedback signal is approximately 180 degrees in a range from the frequency of a fundamental wave of the input signal to the frequency of a second harmonic thereof.

Abstract: Method and system are disclosed for providing an improved linearity Gilbert mixer. The Gilbert mixer of the present invention includes a conventional mixer core coupled to a high linearity, multistage amplifier. The multistage amplifier includes two or more transistor stages connected together in a global feedback arrangement. The global feedback provides a greater loop gain for the amplifier than the local feedback arrangement, thereby increasing the linearity of the amplifier. In addition, having more than one transistor stage in the amplifier serves to increase the isolation of the RF input signal from the LO input signal. Furthermore, by providing parallel output stages in the multistage amplifier, several mixer cores may be driven from the same source while sharing the feedback mechanism.

Abstract: The present invention relates to a balanced circuit arrangement and methods for linearizing and calibrating such a circuit arrangement wherein linearization is obtained by introducing a load imbalance between the output branches of the balanced circuit arrangement. Thus, a controllable extraneous imbalance is created between the output loads of the balanced circuit arrangement to thereby obtain a linearization by means of even-order non-linearity.

Abstract: Fine tuned signal phase adjustments are provided by multiple cascaded phase mixers. Each phase mixer outputs a signal having a phase between the phases of its two input signals. With each subsequent stage of phase mixers, the signals generated by the phase mixers have a smaller phase difference, thereby providing finer delay adjustments. Multiple stages of phase mixers can be provided in digital delay-locked loop circuitry to provide additional hierarchical delay adjustment.

Abstract: A circuit configuration for mixing a differential desired signal with a differential local oscillator signal includes two difference amplifiers which are controllable on the input side by the desired signal and cross-coupled on the output side. Currents flowing through the difference amplifiers are switched by the components of the local oscillator signal in alternation. The circuit makes a lower supply voltage possible, given the presence of only two transistor levels.

Abstract: DC offset canceling is disclosed. A DC level fixing signal generator receives feedback input of two output signals from a mixer and generates a level fixing control signal to fix the DC level of the two output signals according to the input values. A DC offset canceling signal generator receives feedback input of two output signals from the mixer and generates offset canceling control signals to cancel the relative difference between the DC levels of the two output signals according to the input values. A DC level fixing and offset canceling circuit fixes the DC level of each of the two output signals from the mixer and cancels the relative difference between the DC levels of the two output signals according to the level fixing control signal and the offset canceling control signals.

Abstract: A voltage controlled amplifier is improved in noise performance with nonlinear local feedback elements while maintaining low distortion for various control settings. By paralleling nonlinear elements, distortion is further improved. Preferably, these nonlinear elements consist of diode pairs connected to the emitters of a differential amplifier whereby the bases of the transistors are used to control the signal current.

Abstract: A self oscillating mixer circuit includes a dual gate FET, an NDR device coupled to a first gate of the FET, and a first bias input circuit adapted to couple a first bias voltage across the NDR device. The first bias voltage controls operation of the NDR device within an NDR region of the V-I characteristic curve of the NDR device so that oscillations occur in the NDR device and the FET. The first bias input circuit is adjustable to adjust the applied first bias voltage so as to control frequency and amplitude of the oscillations. An RF input terminal and a second bias input circuit are coupled to supply a second bias voltage at the other gate terminal, which biases the FET at maximum gain so that RF signals applied to the RF input terminal are mixed with the oscillations.

Abstract: An analog multiplier circuit utilizes a dual feedback structure, in which two multiplier core sections can be progressively enabled or disabled to varying degrees, thereby providing variable gain while maintaining constant bandwidth. The multipliers are preferably controlled by a pair of ratiometric gain control signals in a manner that provides very accurate end-point gain. A summing device combines the outputs from the multipliers to generate a final output signal that is buffered and fed back to the multipliers through two separate feedback paths. The circuit can operate as a video keyer that linearly selects between two input signals applied to the multipliers. Alternatively, the circuit can be operated as a variable gain amplifier (two quadrant multiplier) when one of the two inputs is not used. Each of the multipliers is preferably implemented with sets of differential transistor pairs having complementary symmetry and a Class AB current conveyor input.

Abstract: A low-noise, linearized double-balanced active mixer circuit is described, including a first input for a local oscillator (LO), a second input for an intermediate frequency (IF) signal, and an output for a resulting product radio frequency (RF) signal. The mixer circuit also includes a feedback transformer circuit for the purpose of improving the intermodulation (IM) performance. The lossless nature of the feedback topology gives the active mixer a lower noise figure (NF) characteristic than is realizable with conventional methods. The number of active devices is minimized in order to ensure that the mixer attains the lowest possible NF.

Abstract: A four-quadrant mixer is disclosed which has a low noise factor. The indeterminate common-mode voltage that may accompany the modulating signal is suppressed and replaced by a common-mode quiescent voltage designed to establish a predetermined quiescent biasing current through the mixer transistors common biasing resistors so that the mixer may be driven in common-mode by the modulating signal and differentially by the local oscillator signal. Advantageously, a larger value emitter biasing resistor can be used with the same value of emitter current that would obtain in a comparable four-quadrant Gilbert Mixer or, conversely, larger values of emitter current can be specified to establish a desired level of signal to noise ratio.

Abstract: An RF mixer utilizing frequency and bias compensation for improved performance characteristics. The RF mixer receives bias signals that are dependent on V.sub.CC levels to internally balance the local oscillation received and mix the perfectly bias balanced internally generated oscillation signal with the RF input.

Abstract: A thermoelectric measurement converter is disclosed, which forms the output signal as the product of the instantaneous values of two input signals; wherein the measurement converter comprises at least one electronic resistor and at least one temperature sensor, both being disposed on a common base which is heat insulated with respect to the environment.

Abstract: A CMOS analog divider/multiplier/ratiometry circuit that provides a ratiometric output of two or more inputs, where the output is insensitive to process parameters and temperature variations effecting the circuit. The analog divider/multiplier/ratiometry circuit includes a multiplier portion made up of six FET devices. The six FET devices are electrically connected together so that first and second current outputs from the multiplier portion are insensitive to process parameter and temperature variations effecting the circuit. A first input current is applied to a gate terminal of one of the FET devices and a second input current is applied to a gate terminal of the FET devices in the multiplier portion of the circuit. The first and second input currents are based on currents generated by first and second linear voltage-to-current converter input circuits that are responsive to first and second input voltage, respectively, whose ratio or product is to be determined at the output of the circuit.

Abstract: A circuit configuration for parameter adjustment has one or more first analog multipliers which receive an input signals and a control signal which cooresponds to a parameter, and which output output signals. A second multiplier, which is identical to the first multiplier, receives a first reference signal and a second control signal which corresponds to the first control signal, and outputs an output signal. A regulating device compares the output signal of the second multiplier with a second reference signal and derives the control signals therefrom.

Abstract: A multiplication circuit has two capacitive couplings connected first and second inverting amplifiers, respectively. Two steps of multiplication are performed by this circuit. Input is multiplied by a multiplier of a product of multipliers of the successive multiplication circuits, so the total multiplier can be rather large with similar capacitances to that of the conventional circuit.