Abstract: A circuit includes a first transistor, a second transistor, and a sense transistor. The first current terminals of the first and second transistors are coupled together at a power supply node. The control terminals of the second and third transistors are coupled together. The second current terminals of the first, second, and third transistors are coupled together. The sense resistor is coupled between the first current terminals of the first and second transistors and the first current terminal of the third transistor. The first and second transistors are configured such that during a first mode of operation, current to a load flows through the first and second transistors, and during a second mode of operation, current to a load is discontinued through the first transistor yet flows through the second transistor.

Abstract: A bidirectional switch for the control of power from an AC source to a load is described. The approach uses power MOSFETs in a bidirectional switch subcircuit configuration having an optically coupled, electrically floating control circuit that self-biases the switches into the “on” state and uses an optically coupled control element to force the switches into the “off” state. The time constant of the control circuit is fast enough to allow phase control as well as on-off control. A boost circuit is included to ensure that the control voltage exceeds a threshold voltage of the MOSFETs to force an off state. A plurality of subcircuits can be easily cascaded to provide improved performance.

Abstract: A latching relay includes a supply terminal, a load terminal, first and second coupling circuits, a latch circuit, first and second transistors, and a local supply node coupled to a capacitor. In one example, the supply terminal is coupled to a supply node and the load terminal is coupled to the load. The first and second transistors control the conductivity of a drive transistor coupled to the load. A microcontroller controls the latching relay to switch the load on and off. To enable the load, the microcontroller sinks current from the supply terminal and through the first coupling circuit. While the load is enabled, the capacitor is discharged. The latching relay is operable in a refresh mode in which current is pulsed through the first coupling circuit causing capacitor to be re-charged from the supply terminal. To disable the load, the microcontroller sinks current through the second coupling circuit.

Abstract: An n-type transistor and a p-type transistor are connected in series such that, when the two transistors are turned on, current flows from the collector of the n-type transistor to the collector of the p-type transistor. A positive-feedback capacitor is connected between the collector of one transistor and the base of the other transistor. The two transistors turn on together when the base voltage of the n-type transistor exceeds the base voltage of the p-type transistor by at least the sum of the turn-on threshold voltages of the two transistors and (i) the two transistors turn off together when the base voltage of the n-type transistor fails to exceed the base voltage of the p-type transistor by at least that sum. The positive-feedback capacitor ensures that the two transistors turn fully on and off together. In certain embodiments, the circuitry can be controlled to operate as a current pulse generator.

Abstract: A drive circuit drives switches that are connected to each other in parallel. The drive circuit includes individual discharge paths, a common discharge path, blocking units, a discharge switch, off-holding switches, and a drive control unit. The drive control unit selects, as target switches to be driven to be turned on, at least two switches among the switches. The at least two switches include a first switch and a second switch. The first switch is last to be switched to an off-state among the at least two switches that are selected as the target switches and switched to an on-state. The second switch is other than the first switch among the at least two switches. The off-holding switches includes a first off-holding switch and a second off-holding switch. After switching the second off-holding switch to an on-state, the drive control unit switches the discharge switch to an on-state.

Abstract: An enhanced ESD clamp is provided with a resistor connected between the body terminal and the source terminal of a MOSFET device. In one exemplary embodiment, the MOSFET device is a grounded-gate NMOS (ggNMOS) transistor device with the resistor (“body resistor”) connected externally to the MOSFET device. In another embodiment, the MOSFET device is a ggPMOS transistor device. In yet another embodiment, the body resistor is disposed within and connected internally to the MOSFET device. In any event, the resistance value of the body resistor determines the level to which the trigger voltage of the ESD clamp will be reduced when an ESD event occurs.

Abstract: A transistor drive circuit drives a bipolar-type transistor and a MOSFET that are connected in parallel to each other. A temperature detection element that detects a temperature of a the bipolar-type transistor or the MOSFET. When the temperature is equal to or less than a threshold, the transistor drive circuit turns on both of the MOSFET and the bipolar-type transistor. When the temperature exceeds the threshold, the transistor drive circuit turns on only the bipolar-type transistor.

Abstract: A driver and protection circuit for driving a power switch is disclosed. The driver and protection circuit includes a fault detection block configured to detect a discrepancy between a reference drive signal and a measured voltage at a gate of the power switch. The driver and protection circuit also includes a short circuit detection block configured to detect a gate-to-source short circuit or a gate-to-drain short circuit of the power switch. The driver and protection circuit further includes a latch coupled to the fault detection block and the short circuit detection block to selectively turn off an output driver coupled to the gate of the power switch when a fault or a short circuit is detected, and wherein the latch is configured to send a diagnostic signal when the fault or the short circuit is detected.

Abstract: A drive circuit drives a plurality of switches and sets a target threshold as a threshold compared to a physical quantity correlated with current flowing to a switching completion switch driven to complete switching from one of first and second states to the other. In the first state, a flow of current to at least one of the switches is allowed. In the second state, a flow of current to all of the switches is blocked. The drive circuit sets the target threshold to a first target threshold during at least a part of a first on-driving period in which only a switching completion switch is being on-driven and sets the target threshold to a second target threshold during at least a part of a second on-driving period in which all of the plurality of switches are being on-driven. The first target threshold is greater than the second target threshold.

Abstract: A latching relay includes a supply terminal, a load terminal, first and second coupling circuits, a latch circuit, first and second transistors, and a local supply node coupled to a capacitor. In one example, the supply terminal is coupled to a supply node and the load terminal is coupled to the load. The first and second transistors control the conductivity of a drive transistor coupled to the load. A microcontroller controls the latching relay to switch the load on and off. To enable the load, the microcontroller sinks current from the supply terminal and through the first coupling circuit. While the load is enabled, the capacitor is discharged. The latching relay is operable in a refresh mode in which current is pulsed through the first coupling circuit causing capacitor to be re-charged from the supply terminal. To disable the load, the microcontroller sinks current through the second coupling circuit.

Abstract: A novel approach for the control of AC power uses power MOSFETs in a bidirectional switch subcircuit configuration having an optically coupled, electrically floating control circuit that self-biases the switches into the “on” state and uses an optically coupled control element to force the switches into the “off state. The time constant of the control circuit is fast enough to allow phase control as well as on-off control. A plurality of subcircuits can be easily cascaded to provide improved performance.

Abstract: A switching device according to the present invention comprises: a main circuit including a switching element; a control circuit which generates a control signal for switching the switching element between an on state and an off state; and a first signal line and a second signal line which transfer the control signal outputted from the control circuit, to the main circuit. The value of the characteristic impedance (Zcd) of the first and second signal lines is set between the value of the output impedance (Zab) of the control circuit and the value of the input impedance (Zef) of the main circuit.

Abstract: According to a first aspect of the present disclosure, a power switching circuit is provided, comprising: a bandgap reference circuit configured to receive an input voltage and to generate a reference voltage in response to receiving said input voltage; a supply selection circuit configured to receive at least two supply voltages, to select the highest voltage of said supply voltages and to provide said highest voltage to the bandgap reference circuit. According to a second aspect of the present disclosure, a corresponding method of operating a power switching circuit is conceived.

Abstract: The present disclosure teaches a receiving circuit for use with a vehicle and serving for receiving a signal of a transponder. The receiving circuit may include a plurality of input paths each having an antenna and a multiplexer with a plurality of switches controlled by control signals and connecting at least one of the input paths to at least one further device in the form of a discharger and/or detuner and/or amplifier.

Abstract: Apparatus and methods for LNAs with mid-node impedance networks are provided herein. In certain configurations, an LNA includes an input, an output, a transconductance device, a cascode device, and a mid-node impedance network. The transconductance device generates an amplified signal by amplifying an input signal received at the input, and provides the amplified signal to the output via the cascode device. The mid-node impedance network is electrically connected between the transconductance device and the cascode device, and provides compensation for a parasitic capacitance of the gm device, thereby enhancing the LNA's performance.

Abstract: A semiconductor device for driving a semiconductor switch, including a first transistor configured to extract gate charges of the semiconductor switch with a first extraction force, a comparator configured to compare gate voltage of the semiconductor switch with a threshold voltage to thereby output a first decision signal, an AND circuit configured to perform an AND operation on a gate voltage of the first transistor and the first decision signal to thereby output a second decision signal, a delay circuit configured to delay the second decision signal by a predetermined time and to output the delayed signal as a second control signal, and a second transistor configured to be turned-on, in response to the second control signal, the predetermined time after the first transistor is turned-on, to thereby extract the gate charges of the semiconductor switch with a second extraction force larger than the first extraction force.

Abstract: A switching regulator includes circuitry for reducing conductive emissions caused when the regulators switch from one transistor switch to the other. The switching regulator includes at least one switch with a diode connected from the source to the drain of at least one of the transistor switches. When the regulator switches from one transistor switch to the other, the circuitry initiates turning on the switch with a relatively small, current-limited signal, waits for the diode across the recently turned off switch to complete reverse recovery, and then quickly turns the new switch fully on.

Abstract: A semiconductor device is provided in which burning of a semiconductor element can be prevented without incorporating a fuse. The semiconductor device, which includes a plurality of semiconductor elements that are connected in parallel between a direct current power source and a load, is configured to simultaneously turn ON or OFF the plurality of semiconductor elements. The semiconductor device includes a voltage detection means for detecting a voltage value across a fixed potential and a connection node for the plurality of semiconductor elements and for the load, a determining means for determining, if the semiconductor elements are OFF, whether or not a voltage value detected by the voltage detection means is higher than a predetermined voltage value; and a means for turning the plurality of semiconductor elements ON when the unit determines that the detected voltage value is higher than the predetermined voltage value.

Abstract: Systems, circuits, and methods for operating an Insulated-Gate Bipolar Transistor (IGBT) are provided. A circuit is to include a first driver for the IGBT, the first driver having a first resistance and being connectable to the gate of the IGBT. The circuit is further described to include a second driver for the IGBT, the second driver having a second resistance different from the first resistance and also being connectable to the gate of the IGBT. The circuit is also described to include a controller that receives at least two inputs regarding operating characteristics of the IGBT and based on the at least two inputs decides whether to connect the first or second driver to the gate of the IGBT during power-down of the IGBT.

Abstract: A driving device includes a driving primary circuit, an isolating transforming circuit, and at least one driving secondary circuit. The isolating transforming circuit is coupled to the driving primary circuit. The at least one driving secondary circuit is coupled to the isolating transforming circuit. The driving primary circuit receives a control signal and a power signal. The driving primary circuit generates a driving pulse signal according to the control signal and generates a power pulse signal according to the power signal. The driving primary circuit transmits the driving pulse signal and the power pulse signal to the at least one driving secondary circuit through the isolating transforming circuit. The at least one driving secondary circuit receives the driving pulse signal so as to generate a driving signal, and the at least one driving secondary circuit drives a power semiconductor switch unit according to the driving signal.

Abstract: The present disclosure provides an IGBT driving circuit, including an optocoupler chip and a power amplification circuit. The optocoupler chip includes an isolation amplification unit and a fault protection unit, and the fault protection unit includes a desaturation module and a fault feedback module. The desaturation module is configured to transmit a warning signal to the fault feedback module when detecting that a potential of a collector of the IGBT is overhigh or the potential of the collector of the IGBT changes overfast. The fault feedback module is configured to transmit a fault control signal to the external controller after receiving the warning signal so as to control the external driving signal outputted by the external controller and enable the isolation amplification unit to output an IGBT driving signal for controlling a shutdown of the IGBT.

Abstract: In accordance with an embodiment, a method of operating a semiconductor switch coupled to an inductor includes turning on the semiconductor switch by applying a turn-on voltage to between a gate of the semiconductor switch and a low current terminal connected to a reference node of the semiconductor switch, the low current terminal separate from a high current reference terminal connected to the reference node of the semiconductor switch, and the semiconductor switch comprises a first input capacitance to transconductance ratio. The method further includes turning off the semiconductor switch by applying a turn-off voltage to the gate of the semiconductor switch, wherein a ratio of a total capacitance at an output node of the semiconductor switch to a gate-drain capacitance is greater than a first ratio per watt of power being handled by a load coupled to the semiconductor switch.

Abstract: The present disclosure relates to an antenna driver circuit for an antenna associated with a motor vehicle. The antenna driver circuit may include at least one pair of output paths to at least one antenna for forming at least one oscillatory circuit composed of in each case an antenna and at least one capacitor, and a plurality of switches in the form of MOSFETs controlled by control signals in one respective oscillatory circuit with an antenna. In the respective oscillatory circuit, at least two controllable switches may be arranged in an anti-serial fashion with respect to one another in that their drain connections are connected together, and/or source connections of controllable switches are connected to one another via an antenna.

Abstract: A LED lighting system, such as a dimmable LED lamp, that may simulate the performance of an incandescent bulb. LED strings of different colors may be connected to the output of a single LED driver that regulates an overall intensity of light produced by the LED lighting system. The color of the LED lighting system may be controlled by circuitry, such as one or more switches, that allocates current between the LED strings to change the color temperature of light emitted by the LED lighting system as the light intensity changes.

Abstract: The present disclosure relates to an antenna driver circuit for an antenna associated with a motor vehicle. The antenna driver circuit may include at least one pair of output paths to at least one antenna for forming at least one oscillatory circuit composed of in each case an antenna and at least one capacitor, and a plurality of switches in the form of MOSFETs controlled by control signals in one respective oscillatory circuit with an antenna. In the respective oscillatory circuit, at least two controllable switches may be arranged in an anti-serial fashion with respect to one another in that their drain connections are connected together, and/or source connections of controllable switches are connected to one another via an antenna.

Abstract: An emitter switched bipolar transistor circuit includes a bipolar junction transistor (BJT) having a collector coupled to an output terminal, a metal oxide semiconductor field effect transistor (MOSFET) coupled to an emitter of the BJT, a bias voltage supply coupled to the base of the BJT, a buffer coupled to the base of the BJT, and a comparator. The comparator includes a first input coupled to the collector of the BJT, a second input coupled to a voltage reference, and an output coupled to an input of the buffer. The comparator is configured to receive a collector voltage of the BJT at the first input of the comparator, compare the received collector voltage with the voltage reference, and cause the buffer to inject a current pulse to the base of the BJT until the collector voltage is less than the voltage reference, indicating the BJT is substantially saturated.

Abstract: There are provided methods and systems for operating insulated gate bipolar transistors (IGBTs). For example, there is provided a method that can include detecting a desaturation condition in an IGBT and initiating a turn off procedure when desaturation is detected. The turn off procedure can include holding a gate of the IGBT at at least one voltage level intermediate between a positive rail voltage and a negative rail voltage of an operational range of the IGBT.

Abstract: In order to reduce the problems with sharp-edged control voltages of semiconductor switching elements, it is provided that the control terminal (6) of the semiconductor switching element (1) is connected to the output terminal (7) of the semiconductor switching element (1) via a ramp generation unit (5), and the ramp generation unit (5) flattens the sharply ascending and descending edges of the driver control voltage (VS) into the form of a ramp, in order to generate a transistor control voltage (VG) at the output of the ramp generation unit (5).

Abstract: In one embodiment, a switching circuit includes a first switch comprising one or more transistors operably coupled in series with a first terminal, wherein each of the one or more transistors has a corresponding diode, a drain of each of the one or more transistors being operably coupled to a cathode of the corresponding diode; and a second switch comprising one or more transistors operably coupled in series with a second terminal, wherein each of the one or more transistors has a corresponding diode, a drain of each of the one or more transistors being operably coupled to a cathode of the corresponding diode; wherein a source of the one or more transistors of the first switch is operably coupled to a source of the one or more transistors of the second switch.

Abstract: A current sensor device for sensing a measuring current includes a semiconductor chip having a magnetic field sensitive element. The current sensor device further includes an encapsulant embedding the semiconductor chip. A conductor configured to carry the measuring current is electrically insulated from the magnetic field sensitive element. A redistribution structure includes a first metal layer having a first structured portion which forms part of the conductor.

Abstract: An amplifier circuit is disclosed comprising: an input terminal configured to receive a radio frequency input signal; an output terminal configured to provide a radio frequency output signal; a first transistor having a first collector, a first emitter, and a first base; a second transistor having a second collector, a second emitter, and a second base; a bypass switch; and a controller. The first base is connected to the input terminal and the second emitter. The first collector is connected to a circuit voltage supply and the output terminal. The first emitter is connected to ground and to the second base. The second collector is connected to a collector voltage supply. The bypass switch is connected between the first base and the output terminal.

Abstract: A high-speed high-voltage pulser especially designed to operate in high radiation environments. The pulser uses a primary side driver and switches in front of an isolation gate transformer. The primary side driver and switches provide amplified and fast complementary pulse signals to the transformer. The transformer has top and bottom secondary windings, which respectively receive the complementary signals, and deliver them to secondary side drivers and switches. The switches are implemented with series-connected FETs.

Abstract: The application generally relates to apparatus for driving high voltage power switching devices such as IGBTs.

Abstract: A power conversion system includes: a switching element; an output circuit that outputs a transmission signal for transmitting information on a physical quantity that indicates a state of the switching element and for transmitting information on abnormality of the switching element; an isolating element that transmits the transmission signal in an electrically isolated state; a filter that deletes the information on the physical quantity from a signal transmitted through the isolating element; a control circuit to which the signal transmitted through the isolating element but not through the filter is input; and a shutdown circuit that shuts down power supply to the switching element on the basis of the signal through the filter.

Abstract: A cross line laser (100) comprises a shell and a hanging system (101). The hanging system has two laser modules (110) arranged oppositely on a same plane. Each laser module comprises a laser device (121), a collimation device (130), and a cylindrical lens (140). The cylindrical lens has a high refraction index. Lasers emitted by the laser device passes through the collimation device and are incident on the cylindrical lens, and are split by the cylindrical lens to form laser rays with a diffusion angle approximately larger than 180 degrees. Horizontal laser rays generated by the two laser modules intersect with each other, so as to form laser rays with a diffusion angle of 360 degrees.

Abstract: A semiconductor device is disclosed. In accordance with a first aspect of the present invention the device includes a semiconductor chip having a substrate, a first supply terminal electrically coupled to the substrate to provide a first supply potential (VS) and a load current to the substrate, and a second supply terminal operably provided with a second supply potential. A first vertical transistor is integrated in the semiconductor chip and electrically coupled between the supply terminal and an output terminal. The first vertical transistor is configured to provide a current path for the load current to the output terminal in accordance with a control signal, which is provided to a gate electrode of the first vertical transistor.

Abstract: A switching circuit and a method of operating the same are disclosed. In an embodiment, the switching circuit includes a switching transistor adapted to control operation of the switching circuit according to a control signal applied to the control terminal of the switching transistor, a regulating circuit adapted to generate the control signal, and a detecting circuit adapted to sense a voltage at the control terminal when the switching transistor is in an OFF state and to generate a drive signal according to the sensed voltage. The regulating circuit is adapted to generate the control signal based on the generated drive signal.

Abstract: This disclosure describes systems, methods, and apparatuses for impedance-matching radio frequency power transmitted from a radio frequency generator to a plasma load in a semiconductor processing chamber. Impedance-matching can be performed via a match network having a variable-reactance circuit. The variable-reactance circuit can comprise one or more reactive elements all connected to a first terminal and selectively shorted to a second terminal via a switch. The switch can comprise a bipolar junction transistor (BJT) or insulated gate bipolar transistor (IGBT) controlled via bias circuitry. In an on-state, the BJT base-emitter junction is forward biased, and AC is conducted between a collector terminal and a base terminal. Thus, AC passes through the BJT primarily from collector to base rather than from collector to emitter. Furthermore, the classic match network topology used with vacuum variable capacitors can be modified such that voltages do not overload the BJT's in the modified topology.

Abstract: Disclosed is a power supply circuit of an electric device. The power supply circuit comprises a power source configured to output a power source voltage; a power source voltage detecting circuit configured to detect the power source voltage, and to output a first voltage control signal; a leading edge delay circuit configured to receive the first voltage control signal, and to output a second voltage control signal; an electronic switch connected in series between the power source and the load, configured to turn on or turn off power supply from the power source to the load; and a slow turn-on circuit configured to receive the second voltage control signal.

Abstract: A switch bias system is provided that includes a bipolar junction transistor (BJT) switch comprising a base, emitter, and collector; an energy storage circuit coupled to the collector of the BJT, the energy storage circuit supplying current flow to the collector of the BJT; a current transformer circuit coupled to the emitter, the current transformer circuit configured to sense current flow through the emitter of the BJT switch; and a proportional bias circuit configured to generate a bias current to the base of the BJT switch, the bias current set to a proportion of the sensed current flow through the emitter of the BJT switch.

Abstract: A circuit configuration for the limiting of current intensity and/or the edge slope of electrical signals includes: a voltage source; a switching element connected to the voltage source and equipped for switching the voltage source; and a limiting unit functionally positioned between the switching element and the voltage source, the limiting unit being equipped to limit a current intensity and/or an edge slope of an electrical signal in response to a switching process of the voltage source while using the switching element.

Abstract: A circuit for a phase connection of an inverter includes upper and lower bridge halves and respectively associated upper and lower bridge segments. Each bridge half has an outer switch and an inner switch connected in series. Each bridge segment has a diode and the inner switch of the associated bridge half connected in series. An output of the circuit is respectively connected to upper and lower potentials through the outer switches and is further connected to a center potential applied between the upper and lower potentials through each of the upper and lower bridge segments. Each bridge half further has a parallel power switch. The parallel switch of each bridge half is connected in parallel to the series-connected outer and inner switches of the bridge half. The output of the circuit is further respectively connected to the upper and lower potentials through the parallel switches.

Abstract: A driving module for driving a Digital Visual Interface includes an integrated chip, a pull-up resistor unit, and a voltage converter. The pull-up resistor unit includes a plurality of resistors. The voltage converter includes an array of resistors comprising a plurality of resistors and a MOSFET. Each resistor of the array of resistors includes a first end and a second end. The first ends are electrically connected to outputs of the integrated chip, and the second ends are electrically connected to a drain of the MOSFET. A source of the MOSFET is connected to ground, and a gate of the MOSFET is electrically connected to an output of the main board.

Abstract: A solid-state relay is provided, which includes a first transistor, a second transistor, a first transmission circuit, and a second transmission circuit. A gate of the first transistor is connected to one of a source and a drain of the second transistor, one of a source and a drain of the first transistor is connected to a first terminal, and the other of the source and the drain of the first transistor is connected to a second terminal. The first transmission circuit supplies a first signal to the gate of the first transistor. The second transmission circuit supplies a second signal to a gate of the second transistor. The first terminal is connected to the second terminal when the first transistor is turned on by the first signal.

Abstract: An A-NPC circuit is configured so that the intermediate potential of two connected IGBTs is clamped by a bidirectional switch including two RB-IGBTs. Control is applied to the turn-on di/dt of the IGBTs during the reverse recovery of the RB-IGBTs. The carrier life time of an n? drift region in each RB-IGBT constituting the bidirectional switch is comparatively longer than that in a typical NPT structure device. A low life time region is also provided in the interface between the n? drift region and a p collector region, and extends between the n? drift region and the p collector region. Thus, it is possible to provide a low-loss semiconductor device, a method for manufacturing the semiconductor device and a method for controlling the semiconductor device, in which the reverse recovery loss is reduced while the reverse recovery current peak and the jump voltage peak during reverse recovery are suppressed.

Abstract: According to one embodiment, a semiconductor switch includes a main element including a switching element and an antiparallel diode, and a reverse voltage application circuit. The reverse voltage application circuit includes an auxiliary electric-power supply, a high-speed free wheeling diode, an auxiliary element, and a capacitor. The high-speed free wheeling diode comprises a plurality of diodes connected in series.

Abstract: An embodiment of an IGBT device is integrated in a chip of semiconductor material including a substrate of a first type of conductivity, an active layer of a second type of conductivity formed on an inner surface of the substrate, a body region of the first type of conductivity extending within the active layer from a front surface thereof opposite the inner surface, a source region of the second type of conductivity extending within the body region from the front surface, a channel region being defined within the body region between the source region and the active layer, a gate element insulated from the front surface extending over the channel region, a collector terminal contacting the substrate on a rear surface thereof opposite the inner surface, an emitter terminal contacting the source region and the body region on the front surface, and a gate terminal contacting the gate element.

Abstract: According to one embodiment, a semiconductor device includes: a first switching element; a first interconnection; a first resistor; and a second interconnection. The first switching element includes a first control terminal, a first electrode terminal, and a first conductor terminal. The second switching element includes a second control terminal, a second electrode terminal, and a second conductor terminal. The first interconnection includes a first through a fourth interterminal interconnections. The first resistor is connected at a first end to the first control terminal. The second resistor is connected at a first end to the second control terminal and is connected at a second end to a second end of the first resistor. The second interconnection is provided between the first electrode terminal and the second electrode terminal and/or between the first control terminal and the second control terminal.

Abstract: Provided is a power converter having a switching circuit wherein a surge voltage of a plurality of switching elements connected in series is suppressed and loss is not concentrated to a specific switching element. The switching circuit is provided with: a non-latching type switching element having two main terminals and one control terminal; a voltage detecting means which detects a voltage applied between the main terminals of the switching element; a control current supply for supplying the control terminal with a control signal corresponding to the voltage detected by the voltage detector; and a delay device for delaying the control signal.

Abstract: A circuit is provided and includes current sources, switches, a control module, and capacitances. The current sources adjust current flowing through a load. Each of the switches activates a respective one of the current sources. Kick-back voltages are generated at inputs of the current sources in response to the current sources being turned ON. A control module generates control signals to change states of the switches to alternate a direction in which the current flows through the load. A first capacitance is connected between a first pair of the current sources and a second pair of the current sources. A second capacitance is connected between the first pair of the current sources and a reference terminal. A third capacitance connected between the second pair of the current sources and the reference terminal. The first capacitance, the second capacitance, and the third capacitance reduce magnitudes of the kick-back voltages.