Abstract: A filter system and filtering method includes a subtractor which receives an analog input signal and a reference voltage as a first input, and an analog feedback signal, supplied through a feedback loop, as a second input, and outputs a difference between the analog input signal and the analog feedback signal, and a low pass filter which outputs a digital signal by comparing the output signal of the subtractor and a reference voltage, then integrates duty cycle of the digital signal and calculates a following error amount, and then converts a low pass filtered signal based on the calculated following error amount to an analog signal in order to provide the analog signal to the analog feedback signal, i.e. the second input of the subtractor.

Abstract: A method for decreasing high-frequency attenuation effects in a flexible cable includes communicatively coupling signal-enhancing circuitry to a signal layer of the flexible cable.

Abstract: A receiver includes clocked, differential equalization circuitry to compensate for signal attenuation that varies with the frequency of the input signal received over a respective communication channel. The incoming signal is split into filtered and unfiltered signal components. Separate current-steering transistors coupled in parallel amplify the filtered and unfiltered components and sum the results. The filter or filters used to separate the signal components may be tunable, e.g. using voltage-controlled filter components. The ratio of device sizes for the current-steering transistors sets the magnitude of the boost applied to high-frequency components. The embodiments include adjustable or programmable current-steering networks to facilitate adjustments that accommodate the unique characteristics of individual communication channels.

Abstract: A coupling capacitor for converting the DC level between circuits is incorporated into a semiconductor integrated circuit to reduce the number components. A high-pass filter (34) having a cutoff frequency fC is composed of a coupling capacitor C1 that cuts off direct current between circuits (22) and (24), and a switched capacitor circuit (28) constituting an equivalent resistor RSC. If the switching frequency fSC or the capacitance CSC charged and discharged by the switched capacitor circuit (28) is set low, the RSC can be increased and the C1 at the prescribed fC can be reduced proportionately. Accordingly, the high-pass filter (34) having the C1 can be integrated onto the chip of the IC (20).

Abstract: A circuit for selectively controlling signal baseline and frequency emphasis. An amplifier with selectively controllable feedback circuitry allows higher frequency components of a signal to be emphasized over lower frequency components while also allowing control over the baseline of the signal. Additionally, a multiplexed video signal interface provides a multiplexed component video signal which includes component video signals with OSD data and user-controllable contrast, video gain and signal baseline, along with the ability to individually control such signal components.

Abstract: The present invention generally relates to ultrasound. In particular, the present invention relates to data dependent color wall filters (used in ultrasound imaging devices for example). Certain embodiments of the present invention relate to a color wall filter that provides flash reduction and clutter suppression. One embodiment of the color wall filter comprises an impulse response filter stage (either a finite or infinite impulse response filter) and a bi-quad filter stage that is data dependent. It is contemplated that the bi-quad filter stage may comprise a series of bi-quad filters, wherein the impulse response filter stage is cascaded into at least one bi-quad filter of the series of bi-quad filters.

Abstract: Often programmable gain attenuators (PGAs) are combined with high pass filters. Adjustment of the highpass filter however can have unintended effects, such as changing the step size of the PGA. By placing the resistance of the highpass filter in parallel with a programmable attenuator divider, the steps of the PGA can be minimally affected as the highpass frequency is adjusted.

Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

Abstract: In a high-pass (mirrored) integrator structure that employs chopper modulation, the input and output of the mirrored integrator are connected to the input and output ports of the operational amplifier, bypassing the chopper stabilization modulators. The mirrored integrator can be used in sigma-delta analog-to-digital converters.

Abstract: Disclosed is apparatus for operating with an RC filter (26, 26A), and a corresponding method. The apparatus includes circuitry (32) for use in measuring an actual value of at least one filter component and a controller (34), coupled to the measurement circuitry, for determining at least one adaptive filter (36, 46) coefficient using the measured actual value to so as to compensate for a deviation of at least one filter component value from an ideal value. Where the filter is embodied as an RC network, the circuitry measures an actual value of both a resistor and a capacitor, and the controller uses the measured actual value of the capacitor when determining the value of a resistor.

Abstract: A high pass filter comprising a combination of capacitors and insulated gate field effect transistors (IGFETs) used as effective resistors provides a low break frequency, while providing improved linearity and a stable break frequency over a relatively wide range of input voltages. The high pass filter can be realized with a small physical size. In one particular embodiment, the small physical size allows the capacitors and the IGFET devices to be integrated together onto a common substrate.

Abstract: A filter module for reducing a DC offset voltage in a radio frequency communication channel is described. A first capacitor is coupled between a first differential input node and a first differential output node. A second capacitor is coupled between a second differential input node and a second differential output node. An active variable resistor is coupled between the first differential output node and the second differential output node. The active variable resistor receives a control signal. The control signal adjusts the value of the active variable resistor, which adjusts the frequency response of the filter module. The rate at which the filter module reduces DC offset voltages is thereby adjusted. The filter module is also adaptable to single-ended applications.

Abstract: Often programmable gain attenuators (PGAs) are combined with high pass filters. Adjustment of the highpass filter however can have unintended effects, such as changing the step size of the PGA. By placing the resistance of the highpass filter in parallel with a programmable attenuator divider, the steps of the PGA can be minimally affected as the highpass frequency is adjusted.

Abstract: An on-chip high-pass filter with large time constant comprising a capacitor, a first transistor having a first terminal connected to a first voltage source and a second terminal connected to the capacitor, and a second transistor having a first terminal connected to the second terminal of the first transistor and a second terminal connected to ground, wherein the first transistor and the second transistor are for operating as a large-resistance resistor. The electrical equivalent large-resistance resistor and the capacitor together form a high-pass filter between the input port and the output port.

Abstract: Often programmable gain attenuators (PGAs) are combined with high pass filters. Adjustment of the highpass filter however can have unintended effects, such as changing the step size of the PGA. By placing the resistance of the highpass filter in parallel with a programmable attenuator divider, the steps of the PGA can be minimally affected as the highpass frequency is adjusted.

Abstract: Circuitry to remove switches from signal paths in integrated circuit programmable gain attenuators. Programmable gain attenuators and programmable gain amplifiers commonly switch between signal levels using semi-conductor switches. Such switches may introduce non-linearities in the signal. By isolating the switches from the signal path linearity of the PGA can be improved.

Abstract: A filter circuit includes two first differential circuits disposed on A and B sides, in each of which a ratio of the number of transistors to that of diodes is 1:4, and two second differential circuits disposed on the A and B sides, in each of which the ratio of the number of transistors to that of diodes is 4:1. Base electrodes of the transistors of the A-side first differential circuit and the A-side second differential circuit are connected to a circuit input terminal, while base electrodes of the transistors of the B-side first differential circuit and the B-side second differential circuit are connected to another circuit input terminal. A current source is connected to an A-side connection node for the A-side first differential circuit and the A-side second differential circuit and another current source is connected to a B-side connection node for the B-side first differential circuit and the B-side second differential circuit.

Abstract: A filter includes a capacitor (1) connected between the input end IN and the output end OUT of signals and constant current circuits (2, 3) of MOS structure connected between the power source VDD and the ground, and by connecting the output side node of the capacitor (1) and the intermediate node of the constant current circuits (2, 3). Thus, the cut-off frequency of the filter is reduced dy adjusting the value of a current passed through the constant current circuits (2, 3), instead of increasing the circuit area required by using a capacitor having a large capacitance value or a resistor having a large resistance value.

Abstract: Often programmable gain attenuators (PGAs) are combined with high pass filters. Adjustment of the highpass filter however can have unintended effects, such as changing the step size of the PGA. By placing the resistance of the highpass filter in parallel with a programmable attenuator divider, the steps of the PGA can be minimally affected as the highpass frequency is adjusted.

Abstract: A signal peaking circuit for selectively emphasizing, or boosting, the higher frequencies of an incoming signal. A frequency emphasis circuit with an overall high pass transfer characteristic selectively emphasizes higher frequency signal components over lower frequency signal components. The transfer characteristic is selectively variable to allow the number and peak values of the emphasized signal components to be selectively variable.

Abstract: Filters and methods for eliminating a DC component from an electronic signal provide for circuitry having a zero corresponding to a cut-off frequency, and circuitry for shifting the zero by an amount corresponding to the absolute value of that cut-off frequency. The filters and methods, which include integration and operation of gyrators, are particularly well-suited for incorporation in integrated circuits by virtue of reducing the physical size of the required capacitors. A further advantage is the reduction of time-dependent inertia. Applications of the filters and methods include, but are not limited to, radiotelephony.

Abstract: A large-time-constant microphone filter which contains resistance and capacitance as its constituent and can be formed in the same semiconductor chip as a microphone unit is achieved, which results in downsizing and cost reduction of the microphone unit. A transistor of a current mirror circuit is used as a resistance of a microphone filter, utilizing a differential resistance produced by a channel length modulation effect of the transistor or an Early effect. When variations in the drain-source voltage of the transistor occur, the drain-source current of the transistor slightly varies in linear characteristics and the transistor serves a high value of resistance. Being a current mirror circuit, the microphone filter is resistant to characteristic variations due to temperature changes and can be formed in a semiconductor chip without a significant increase in chip area.

Abstract: The subject invention pertains to a method and circuit design particularly useful for long time constant RC active or passive circuits in either continuous or discrete time domains. The subject invention also relates to a method and circuit design useful for long time constant RL active or passive circuits in either continuous or discrete time domains. The subject invention can find advantage in the mixed-signal, electronic circuit component market. The subject invention widens the application and the price/performance ratio of VLSI analog electronic circuits, and can be easily included in conventional circuit designs.

Abstract: Offers a filter circuit in which the dedicated capacitor surface area is small and in which a dedicated process just for capacitor formation is unnecessary. The filter circuit of this invention is an active filter circuit wherein an operational amplifier AMP1 and capacitors (C1, C2) are formed on the same semiconductor substrate. The capacitors (C1, C2) are constructed from an insulated gate field effect transistor wherein the mutually connected source and drain forms one of the electrodes, the gate forms the other electrode, and the gate insulating film is used in the capacitor dielectric film. For capacitor C1, a DC bias means (DC bias circuit V2) that applies a prescribed DC bias is connected between the electrodes of the said capacitor. A DC bias means can also be provided at capacitor C2, but here, it can be omitted by just increasing the DC level of the input signal Vin just a prescribed level.

Abstract: A filter circuit comprising a phase advance circuit acting as a high pass filter, a phase retard circuit acting as a low pass filter, and an amplifier connected in series between an input and an output. A positive feedback loop is provided between the input and the output. The electrical characteristics of the phase advance and phase retard circuits are such that interaction between the phase advance and phase retard circuits is substantially prevented. This may be achieved by providing the phase advance and phase retard circuits with simple output buffers or providing internal closed loop negative feedback paths to provide low output impedances. The phase advance and phase retard circuits may comprise multipliers configured to compensate for variations in the values of resistive and capacitive components of the filter circuits.

Abstract: A direct conversion receiver having a homodyning section fed by a received radio frequency signal having a carrier frequency and reference signal having the carrier frequency; and a filter coupled to the monodyning section. The filter includes a plurality of serially coupled high pass filter stages. The high pass filter section acts as a DC offset correction loop that eliminates the serial effect of many amplifier sections on DC offsets arising within components, while maintaining a sufficiently low cutoff frequency to avoid adversely impacting information integrity at higher frequencies. The high pass filter sections also enable the integration of the needed capacitors, thus minimizing external components and connections. Each filter stage includes an amplifier and a low pass filter coupled in a negative feedback arrangement with the amplifier. Each low pass filter is adapted to have the cutoff frequency thereof switch from an initial high cutoff frequency to a subsequent lower cutoff frequency.

Abstract: A variable frequency active filter circuit for tuning in a specific bandpass frequency is disclosed. The active filter incorporates a controlled oscillator circuit for tuning into a specific frequency range. A frequency input signal controls the active filter bandpass frequency by tuning the oscillator circuit to a desired frequency. The controlled oscillator circuit further includes a gain input. The gain input is set to a value just below where the oscillator circuit would oscillate.

Abstract: A method for coupling a differential signal generated by a digital processing unit includes high-pass filtering the differential signal. The filtered output of the high-pass filter is then provided to an input of a differential amplifier, the output of which is fed back to the input of the differential amplifier.

Abstract: A 3-terminal operational filter circuit is presented that can be used to construct various types of active filters. The filter circuit can be configured to provide 2nd order low pass and band-pass frequency responses by coupling three resistors to the three filter terminals. Similarly, the filter circuit can be configured to provide 2nd order band-pass and high pass frequency responses by coupling two resistors and a capacitor to the three filter terminals. Furthermore, a plurality of filter circuits can be cascaded to construct various types of higher order filters. The filter circuit can be manufactured to operate within a selected range of center frequencies by selecting particular values for the internal filter capacitance and resistance. Users can then select a particular center frequency, quality factor, and gain of the filter circuit by selecting particular values for the circuit elements to be coupled to the three terminals.

Abstract: A filter circuit includes two current amplifiers and two capacitors constituted of MOS or MIS transistors. An output terminal of the first current amplifier is connected to an input terminal of the second current amplifier, while an output terminal of the second current amplifier is connected to an input terminal of the first current amplifier. One end of the first capacitor is connected to the input terminal of the first current amplifier, while one end of the second capacitor is connected to the output terminal of the first current amplifier the other end thereof is grounded. When an input signal is supplied through the first capacitor, an output signal through a band-pass filter is issued from the output terminal of the first current amplifier, and an output signal through a high-pass filter is issued from the output terminal of the second current amplifier.

Abstract: A 90° phase shift circuit receives an input signal to generate a Q-signal and an I-signal having a phase difference of 90° therebetween. The 90° phase shift circuit has a CR-type high-pass filter having a variable capacitor and fixed resistor, a CR-type low-pass filter having a variable capacitor and a fixed resistor, and a level comparator for comparing the amplitudes of both the outputs from the filters to feed-back a control signal for controlling the cut-off frequencies of both the filters.

Abstract: A fast settling high pass filter with a corner frequency adjusting circuit comprises a high pass filter having an output, the high pass filter operable to receive a feedback signal that is proportional to its output, wherein the feedback signal is operable to adjust the corner frequency of the high pass filter. An attenuating circuit may be coupled to the output of the high pass filter, the attenuating circuit may operate to receive the output of the high pass filter and attenuate the output to form the feedback signal.

Abstract: In radio receivers, ceramic filters are used for filtering the received frequency band. The limitation of the frequency band in the higher frequency range leads to an asymmetrical crosstalk between the right and left audio channel after decoding in the stereo decoder. These transmission errors are compensated by an adjustable high-pass filter. This high-pass filter precedes the stereo decoder. High-pass filters using potentiometers cannot be integrated. Furthermore, ageing phenomena occur in potentiometers so that the transfer function changes. A high-pass filter with a variable capacitor can neither be integrated easily. Therefore, an arrangement is used in which, after a first amplification of the signal to be filtered, this signal is divided into two signal currents and the amplitude and phase of a sub-current are corrected. This corrected sub-current is added to the main current at a sum node. The sub-current is applied via a voltage divider unit to an amplifier stage having a plurality of inputs.

Abstract: A low pass filter includes an input, an output, a storage means, a switching means and a control means. The input receives an input signal. An output signal is generated on the output. The storage means is a sample storage element, for example, a capacitance. A first end of the storage means is connected to the output. The switching means is connected between the first end of the storage means and the input. The switching means, when closed, electrically connects the input to the first end of the storage means. When open, the switching means electrically isolates the input from the first end of the storage means. The control means controls the switching means. The control means generates a switching control signal. The switching control signal has a sampling frequency. The capacitance provided by the capacitance means and a pulse width of the switching control signal are selected so that a maximum cutoff frequency of the low pass filter is less than the sampling frequency divided by two.

Abstract: The present invention provides an apparatus and method of tuning the frequency characteristics of a continuous-time filter. First and second test signals are provided to a filter means and the respective first and second responses of the filter means are measured. The first and second responses are compared and based on the comparison a tuning control signal is provided to the filter means to tune the frequency response characteristics of the filter means. During a tuning phase of operation, a first switch connects a test signal generator and disconnects a data signal generator from the transmission input of a continuous-time filter. A signal processor receives a signal from the transmission output from the continuous-time filter and produces a tuning control signal based on that signal. The test signal generator is comprised of means for providing a first test signal, which may be an alternating signal source ("A.C."), and means for providing a second test signal, which may be a direct signal source ("D.C.

Abstract: A second-order differential highpass filter constructed according to the present invention includes a difference amplifier and a feedback processing circuit. The difference amplifier includes an operational amplifier OP.sub.1, and four resistors R.sub.3, R.sub.4, R.sub.5 and R.sub.6, wherein R.sub.4 /R.sub.3 =R.sub.6 /R.sub.5. An input voltage V.sub.1 is fed to the inverting terminal (-) of the operational amplifier OP.sub.1 via the resistor R.sub.5. Another input voltage V.sub.2 is fed to the noninverting terminal (+) of the operational amplifier OP.sub.1 via the resistor R.sub.3. The output of the operational amplifier OP.sub.1 is fed back to the inverting terminal (-) of the operational amplifier OP.sub.1 via the resistor R.sub.6. The feedback processing circuit includes an operational amplifier OP.sub.2, two resistors R.sub.1 and R.sub.2, and two serial capacitors C.sub.2 and C.sub.1. The output of the operational amplifier OP.sub.

Abstract: A circuit configuration for offset compensation includes a filter device for ascertaining a direct component in an input signal delivered to it and a linking device for subtractive linking of the input signal and an output signal of the filter device. A tracking and holding device which is connected between the filter device and the linking device is controllable by a control signal. The control signal is furnished by a window comparator device having an input to which the input signal is applied. When the input signal is within a predetermined window, the tracking and holding device is located in a tracking mode, while otherwise it is in a holding mode.

Abstract: A method and system for enhancing a digital input signal and producing a modified digital output signal that can either be further digitally processed or that can be converted to an analog signal. A digital input signal passes through a low-pass filter, a high-pass filter and a bandpass filter. A digital signal emitted from a high-pass section of the bandpass filter is delivered to a dynamically-controlled multiplier operating in a digital domain. Digital signals emitted from the low-pass filter, the high-pass filter and the bandpass filter are summed with a signal multiplied by the dynamically-controlled multiplier. A process controller and a contour controller can be used to vary low-frequency boost and high-frequency boost delivered by the modified digital input signal which can then be converted to an analog audio output sample.

Abstract: A description is given of a circuit arrangement comprisinga filter quadripole having two output terminals anda voltage follower circuit having two terminals, said terminals having identical electric potentials when the voltage follower circuit is in its turned-on state, each of the terminals of the voltage follower circuit being connected to one of the output terminals of the filter quadripole respectively, and the voltage follower circuit only being in its turned-on state during the turn-on time interval of the circuit arrangement. This circuit arrangement is suitable for a receiver circuit, more particularly, for a pager and has a very brief turn-on time.

Abstract: Disclosed is a method for transient suppression in synchronous data protection systems which includes high-pass filtering of the signal produced by the sampling and shaping circuits before the signal enters the timing and gain control circuits. This high-pass filtering may be turned on when a transient is detected, in anticipation of a previously detected transient, or may be always on. Using the high-pass version of the shaped signal allows the timing loop and the gain loop to function during a transient interval, thus maintaining timing and gain lock during such an interval.

Abstract: A rotating surface optical sensing system having a radiation source controlled by a controlled current generator to emit electromagnetic radiation toward the rotating surface from which it can be directed to a radiation detector to provide corresponding signals to a threshold detector. The controlled current generator uses the threshold detector indications as to whether these signals are beyond a threshold value if validated by a rotation determiner noting rotations of the rotating surface to set the current for the radiation source. An amplifying filter is provided to amplify selected frequency components of the radiation detector output signals as a bandpass filter having a lower cutoff frequency such that relatively slowly varying optical ambient based signals are not amplified but signals from the radiation source directed from the surface to the detector are amplified.

Abstract: A filter circuit using junction capacitors of semiconductors of the present invention prevents the distortion of signal waveforms and is not affected by parasitic capacitors. The filter circuit includes a resistor whose first terminal is connected to an input terminal and whose second terminal is connected to an output terminal. A first junction capacitor is connected between a control voltage supply terminal and an output terminal and a second junction capacitor is connected between the output terminal and ground. An alternate embodiment of the filter circuit includes a pnp transistor, whose emitter is connected to the direct current power supply via a resistor, whose collector is grounded, and whose base is connected to the output terminal.

Abstract: A low electric power consumption filter circuit includes an amplifying portion including an odd number of serial MOS inverters. A grounded capacitance is connected between an output of the amplifying portion and ground. A pair of balancing resistances connect an output of the MOS inverter to a supply voltage and ground at a previous stage of the last MOS inverter. A feedback impedance connects an output of the amplifying portion to its input. An input impedance is connected to the input of the amplifying portion.

Abstract: DC offset cancellation and timing recovery is provided in a homodyne receiver. The homodyne receiver demodulates an RF signal to produce a baseband signal. An initial offset correction module determines an initial DC offset of the baseband signal. An initial offset correction is applied to the baseband signal to provide an initial corrected baseband signal. Wherein, a dynamic DC offset correction module determines a dynamic DC offset. A dynamic DC offset correction is applied to the initial corrected baseband signal providing a dynamic corrected baseband signal. A timing signal is acquired from the baseband signal for synchronizing the receiver to a transmitter. A method for correcting DC offset of a baseband signal in a homodyne receiver is also described.

Abstract: A monolithic CMOSFET integrated circuit which includes a first MOSFET integrant transistor having a gate area chosen to provide a desired range of resistance when operated in its triode region which constitutes (i) a preamplifier, (ii) a voltage controlled resistance (VCR) device, and (iii) a high-pass filter when capacitive with a transducer. Preferred operating characteristics are achieved by including an active CMOSFET linearization network including a pair of second and third integrant MOSFET transistors having only one-hundredth (1/100th) to one-tenth (1/10th) the gate area of the first transistor. The present invention operates with a reduction in distortion resulting from the filtering effect of the combined capacitive reactance of the sensor and the resistance of the resistor.

Abstract: An integrated circuit employing quantized feedback is capable of compensating for decay in capacitively-coupled digital signals. In an exemplary embodiment, the integrated circuit includes a quantized feedback receiver connected to a capacitively-coupled integrated circuit input. The capacitively-coupled input produces a decaying signal for corresponding intervals of an input digital signal that are substantially DC voltages. Longer sequences of consecutive data bits of the same logic state in the input signal are represented by a corresponding longer DC voltage signals resulting in a greater decay in the capacitively-coupled signal. The receiver operates by generating a complementary feedback signal which is combined with the capacitively-coupled signal. The feedback signal is generated with a magnitude rate of change that compensates for the decay in the capacitively-coupled signal such that the digital information in the combined signal can be detected substantially without error due to the decay.

Abstract: A second-order highpass difference filter constructed according to the present invention includes a difference amplifier and a feedback processing circuit. The difference amplifier includes an operational amplifier OP.sub.1, and four resistors R.sub.1, R.sub.2, R.sub.3 and R.sub.4. The feedback processing circuit is composed of two operational amplifiers OP.sub.2 and OP.sub.3, resistors R.sub.5 and R.sub.6, and two serial capacitors C.sub.1 and C.sub.2. The inverting and noninverting terminals of the operational amplifier OP.sub.3 are connected to the output of the difference amplifier and of the operational amplifier OP.sub.2, respectively. The output of the operational amplifier OP.sub.2 is also fed back to the inverting terminal of the operational amplifier OP.sub.2 via the resistor R.sub.5, and the noninverting terminal of the operational amplifier OP.sub.2 is grounded. The output terminal of the operational amplifier OP.sub.3 is connected to the inverting terminal of the operational amplifier OP.sub.

Abstract: A reduced phase-shift nonlinear filter includes linear filter logic 10 responsive to a filter input signal x and having a linear transfer function G(s), which provides a linear filtered signal g, zero-cross sample-and-hold logic 16 responsive to the filter input signal x and the linear filtered signal g, which provides a square wave signal n which crosses zero at the same time and in the same direction as the filter input signal x and has an amplitude proportional to the value of the linear filtered signal g at that time, complementary filter logic 20 responsive to said square wave signal n and having a complementary transfer function (1-G(s)) which provides a complementary filtered signal c, and a summer 30 which adds the complementary filtered signal and the linear filtered signal to provide a filter output signal y which exhibits less phase shift over certain frequency bands than that of the linear transfer function.

Abstract: A filter circuit that consumes very little electric power. The active filter is a linear inverter constructed by 1) an inverting amplifying portion composed of an odd number of MOS inverters serially connected, 2) a grounded capacitance connected between an output of the inverting amplifying portion and ground, 3) a balancing resistance having a pair of resistances for connecting an output of one of the MOS inverters, other than the last MOS inverter, to the supply voltage and the ground, respectively, and 4) a feedback impedance for connecting the output and input of the inverting amplifying portion. A coupling capacitance is connected to the input of the linear inverter and a plurality of filter circuits are connected to an input of the coupling capacitance.

Abstract: Disclosed is a method for transient suppression in synchronous data protection systems which includes high-pass filtering of the signal produced by the sampling and shaping circuits before the signal enters the timing and gain control circuits. This high-pass filtering may be turned on when a transient is detected, in anticipation of a previously detected transient, or may be always on. Using the high-pass version of the shaped signal allows the timing loop and the gain loop to function during a transient interval, thus maintaining timing and gain lock during such an interval.