Having Gain Control Means Patents (Class 330/254)
  • Patent number: 10840861
    Abstract: A receiver signal path includes a programmable flat gain stage configured to provide an amplified differential pair of signals based on a first frequency response having a selectable flat gain and a differential input pair of signals received on an input differential pair of nodes. The receiver signal path includes a peaking gain stage configured to generate a second amplified differential pair of signals based on the amplified differential pair of signals according to a second frequency response including a first peak gain at or near a carrier frequency in a first pass band. The first peak gain occurs just prior to a first cutoff frequency of the peaking gain stage. The programmable flat gain stage and the peaking gain stage are configured as a variable peaking gain stage. The selectable flat gain is selectively programmed based on a predetermined power consumption of a receiver path.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: November 17, 2020
    Assignee: Silicon Laboratories Inc.
    Inventor: Mohammad Al-Shyoukh
  • Patent number: 10826451
    Abstract: A combined resistance circuit 2A includes a first circuitry 20A provided between a first end 2a and a second end 2b. This first circuitry 20A includes a resistor R1 provided between a node N11 and a node N12, a resistor R2 provided between the node N12 and a node N13, a resistor R3 provided between the node N13 and a node N14, a resistor R4 provided between the node N14 and the node N11, a resistor R5 provided between the node N11 and the node N13, a switch SW0 provided in series to the resistor R4 between the node N14 and the node N11, and a switch SW1 provided in series to the resistor R2 between the node N12 and the node N13. The node N12 is connected to the first end and the node N14 is connected to the second end.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: November 3, 2020
    Assignee: THINE ELECTRONICS, INC.
    Inventor: Yuji Gendai
  • Patent number: 10812030
    Abstract: Aspects and examples described herein provide a variable gain amplifier circuit and assembly. In one example, a variable gain amplifier circuit includes a signal input, a signal output, and a variable gain amplifier including a plurality of unit cell groups coupled between the signal input and the signal output, the variable gain amplifier configured to provide an adjustable gain to a signal received at the signal input during each of a plurality of amplify modes of the variable gain amplifier, each of the plurality of amplify modes corresponding to at least one unit cell group of the plurality of unit cell groups. A bypass path including a fixed attenuator is coupled in parallel with the variable gain amplifier between the signal input and the signal output to selectively couple the signal input to the signal output through the fixed attenuator during a bypass mode.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: October 20, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Peihua Ye, Patrick Marcus Naraine, Adrian John Bergsma, Peter Harris Robert Popplewell, Thomas Obkircher
  • Patent number: 10790594
    Abstract: An apparatus includes a first circuit and a plurality of second circuits. The first circuit may be configured to generate a pair of quadrature signals from a radio-frequency signal. The second circuits may each comprise a plurality of cascode amplifiers. The cascode amplifiers may be connected in parallel. The cascode amplifiers may be configured to generate a plurality of intermediate signals by modulating the quadrature signals in response to a first control signal and a second control signal. The first control signal generally switches a contribution of the cascode amplifiers in the generation of the intermediate signal. The second control signal may adjusts a total current passing through all of the cascode amplifiers.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: September 29, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Tumay Kanar, Samet Zihir, Naveen Krishna Yanduru
  • Patent number: 10778161
    Abstract: A power splitter that amplifies an input radio-frequency (RF) signal. The power splitter uses a single transistor in a common emitter stage of a cascode amplifier and two or more common base stages of the cascode amplifier to amplify and to split the input RF signal. A common base biasing signal can be used to simultaneously enable two or more of the common base stages to generate two or more amplified RF output signals.
    Type: Grant
    Filed: December 15, 2018
    Date of Patent: September 15, 2020
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Paul Raymond Andrys, David Steven Ripley
  • Patent number: 10778478
    Abstract: A reference generator for use with serial link data communication is disclosed. Broadly speaking, a decision circuit may perform a comparison between a particular data symbol included in a serial data stream and a difference between a voltage level of a first signal and a voltage level of a second signal, and generate an output data value based on a result of the comparison. A reference generator circuit may selectively sink a first current value from either the first signal or the second signal based upon another output data value generated from another data symbol included in the serial data stream that was received prior to the particular data symbol.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: September 15, 2020
    Assignee: Oracle International Corporation
    Inventors: Rajesh Kumar, Seno Judaprawira, Dawei Huang
  • Patent number: 10771028
    Abstract: An apparatus comprises a plurality of selectable gain stages connected in parallel between a first bias voltage and ground, wherein each selectable gain stage comprises an amplification portion and a current steering portion, and wherein the current steering portion comprises a first selectable signal path connected between an output of the amplification portion and a signal output terminal, and a second selectable signal path connected between the output of the amplification portion and ground through a shunt device.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: September 8, 2020
    Assignee: FutureWei Technologies, Inc.
    Inventors: William Roeckner, Terrie McCain, Matthew Richard Miller, Lawrence E. Connell
  • Patent number: 10749507
    Abstract: A trimming resource includes an adjustable driver resource, a differential voltage generator, and a trim current generator. The adjustable driver resource produces an output signal. The differential voltage generator receives the output signal from the adjustable driver resource and produces a differential drive signal. The trim current generator derives a trim signal from the differential drive signal received from the differential voltage generator. According to one configuration, the trim current generator outputs the trim signal to an electronic component, correcting an operational parameter of the electronic component.
    Type: Grant
    Filed: June 19, 2019
    Date of Patent: August 18, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Adriano Sambucco, Emiliano Alejandro Puia
  • Patent number: 10742175
    Abstract: An amplifier circuit includes: an input circuit configured to receive an input signal; a load circuit provided in series with the input circuit and including a first variable resistance unit and a second variable resistance unit, a resistance value of the first variable resistance unit being controlled by a digital code, a resistance value of the second variable resistance unit being controlled by an analog control voltage; and a correction circuit including a third variable resistance unit having a circuit configuration corresponding to the first variable resistance unit and a fourth variable resistance unit having a circuit configuration corresponding to the second resistance unit, a resistance value of the third variable resistance unit being controlled by the digital code, a resistance value of the fourth variable resistance unit being controlled by the analog control voltage, the correction circuit being configured correct a resistance value of the load circuit.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: August 11, 2020
    Assignee: SOCIONEXT INC.
    Inventor: Masahiro Kudo
  • Patent number: 10727884
    Abstract: A reception circuit includes a receiver, a noise boosting circuit and a buffer. The receiver generates a positive amplification signal and a negative amplification signal by amplifying a first input signal and a second input signal. The noise boosting circuit adjusts voltage levels of the positive amplification signal and the negative amplification signal based on the first input signal and the second input signal. The buffer generates an output signal by amplifying the positive amplification signal and the negative amplification signal.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: July 28, 2020
    Assignee: SK hynix Inc.
    Inventor: Hyun Bae Lee
  • Patent number: 10658997
    Abstract: A voltage controlled amplifier with an amplitude limiting circuit, such as a clip limiter, that is separate from the signal path on which the input signal is received by a power amplifier can reduce both noise and power expenditure of the voltage controlled amplifier. The amplitude limiting circuit can include a transistor network that is controlled by a pair of utility operational amplifiers. These utility amplifiers may use less current than the audio amplifier of the voltage controlled amplifier. Further, the transistor network can be deactivated when a signal supplied to the voltage controlled amplifier is below a clipping or other voltage limiting threshold.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: May 19, 2020
    Assignee: RGB Systems, Inc.
    Inventor: Eric Mendenhall
  • Patent number: 10651825
    Abstract: An attenuator system comprising a variable impedance configured to provide an impedance from among a plurality of impedance states, the variable impedance comprising a first port, a second port, a first transistor comprising first and second channel terminals coupled between the first port and the second port, and a second transistor comprising first and second channel terminals coupled between the first port and the second port, and a control circuit configured to control the variable impedance to a first impedance state of the plurality of impedance states at least in part by providing a first output voltage to a control terminal of the first transistor to turn the first transistor on, wherein the first transistor is configured to operate in an under-driven mode when turned on.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: May 12, 2020
    Assignee: MEDIATEK Singapore Pte. Ltd.
    Inventors: E-Hung Chen, Tamer Mohammed Ali, Ahmed Othman Mohamed Mohamed ElShater, Mazen Soliman Shawky Soliman
  • Patent number: 10644657
    Abstract: A pre-distorter that both accurately compensates for the non-linearities of a radio frequency transmit chain, and that imposes as few computation requirements in terms of arithmetic operations, uses a diverse set of real-valued signals that are derived from separate band signals that make up the input signal. The derived real signals are passed through configurable non-linear transformations, which may be adapted during operation, and which may be efficiently implemented using lookup tables. The outputs of the non-linear transformations serve as gain terms for a set of complex signals, which are functions of the input, and which are summed to compute the pre-distorted signal. A small set of the complex signals and derived real signals may be selected for a particular system to match the classes of non-linearities exhibited by the system, thereby providing further computational savings, and reducing complexity of adapting the pre-distortion through adapting of the non-linear transformations.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: May 5, 2020
    Assignee: NanoSemi, Inc.
    Inventors: Alexandre Megretski, Kevin Chuang, Yan Li, Zohaib Mahmood, Helen H. Kim
  • Patent number: 10622959
    Abstract: A low noise amplifier includes at least two variable gain amplifier stages, each variable gain amplifier configured to accept an input signal and to provide a load driving signal; a tunable bandpass filter connected as a load to each variable gain amplifier stage, wherein each bandpass filter includes a resonant tank, each resonant tank including an inductor, wherein each inductor of each resonant tank is oriented in orthogonal relation with respect to each respective longitudinal axis of each next inductor, the orthogonal relation of the respective longitudinal axes configured to reduce mutual coupling between the tunable bandpass filters; a cross-coupled transistor pair, and at least one cross-coupled compensation transistor pair biased in a subthreshold region configured to add a transconductance component as a function of a load driving signal; and, a controller circuit configured to tune each tunable bandpass filter.
    Type: Grant
    Filed: September 7, 2018
    Date of Patent: April 14, 2020
    Assignee: Innophase Inc.
    Inventors: Nicolo Testi, Yang Xu
  • Patent number: 10615261
    Abstract: A technique relates to a semiconductor device. A bipolar transistor includes an emitter layer and a base layer, where the emitter layer and the base layer are doped with an impurity, the impurity being a same for the emitter and base layers. The bipolar transistor includes a collector layer.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: April 7, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Guy M. Cohen, Paul M. Solomon, Christian Lavoie
  • Patent number: 10587296
    Abstract: The disclosure relates to technology for an adjustable gain device that includes differential input terminals, differential output terminals, signal processing circuitry, and first and second cross-coupled segments. The first cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a negative input of the signal processing circuitry. The second cross-coupled segment is coupled between differential input terminals of the adjustable gain device and a positive input of the signal processing circuitry. The adjustable gain device has a gain that is adjustable by adjusting values of the first and second cross-coupled segments, while maintaining a substantially consistent frequency response and a substantially consistent input impedance of the adjustable gain device, so long as a specified relationship between values of the first and second cross-coupled segments is kept substantially constant.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: March 10, 2020
    Assignee: Futurewei Technologies, Inc.
    Inventors: Matthew R. Miller, Paul R. Ganci
  • Patent number: 10581395
    Abstract: A variable gain amplifier (1) includes: a signal transmission circuit (10, 20) including amplifying transistor units (111 to 11N, and 211 to 21N) connected in parallel between a signal input port (2P, 2N) and a signal output port (3P, 3N); a load circuit (40) connected between a supply line of power supply voltage (VDD) and an output end of the signal transmission circuit (10, 20); a signal short circuit (30) including a short-circuit transistor unit (31) connected between the supply line of the power supply voltage (VDD) and an input end of the signal transmission circuit (10, 20), a constant-current source circuit (42), and a transistor control circuit (46). The transistor control circuit (46) selects transistor units to be turned on, from among the amplifying transistor units (111 to 11N, and 211 to 21N) and the short-circuit transistor unit (31), and supplies control voltages for turning on the selected transistor units.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: March 3, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Koji Tsutsumi, Takanobu Fujiwara, Atsushi Kato, Shinichi Inabe
  • Patent number: 10581478
    Abstract: Radio-frequency front-end circuitry includes an output terminal, a receive amplifier controllably coupled to the output terminal, at least one transmit amplifier controllably inductively coupled to the output terminal, and at least one impedance element controllably coupled between ground and one of the at least one transmit amplifier to reduce degradation of output of the radio-frequency front-end circuitry when the at least one transmit amplifier is not in use. In differential signaling, there is an impedance element between ground and each pole of the differential signal. A second transmit amplifier may generate second transmit signals and harmonics of the second transmit signals, and the second transmit amplifier may be switchably connected to the output of a first transmit amplifier so that output of the second transmit amplifier is filtered by the one of the first transmit amplifier. The transmit amplifiers may include a WiFi power amplifier and a BLUETOOTH® power amplifier.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: March 3, 2020
    Assignee: Marvell International Ltd.
    Inventors: Sai-Wang Tam, Randy Tsang, Ovidiu Carnu, Donghong Cui, Amir Ghaffari, Wai Lau, Timothy Loo, Alden C. Wong
  • Patent number: 10566954
    Abstract: A capacitor bank has a capacitance value that is discontinuous and has an extremely narrow variable range. Thus, in a case of obtaining a wide variable range of the capacitance value, a large number of capacitors are connected in parallel and used while being switched by switches. The present technology achieves at least one of: allowing the capacitance value of a variable capacitance circuit to be varied continuously by electrical control without increasing the parasitic capacitance; and decreasing the current consumption of an oscillator circuit using the variable capacitance circuit as compared to a conventional case. The variable capacitance circuit includes: a transconductance circuit that includes a MOS transistor; an inductor that is connected in parallel to the transconductance circuit; and a Gm control circuit that varies a transconductance of the MOS transistor.
    Type: Grant
    Filed: December 6, 2016
    Date of Patent: February 18, 2020
    Assignee: SONY CORPORATION
    Inventor: Masahiro Ichihashi
  • Patent number: 10566941
    Abstract: An integrated circuit having a plurality of miniaturized transistors, wherein the plurality of transistors include: high concentration transistors which include channel regions having impurity concentrations of a first concentration; and low concentration transistors which include channel regions having impurity concentrations of a second concentration lower than the first concentration.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: February 18, 2020
    Assignee: ROHM CO., LTD.
    Inventors: Naohiro Nomura, Sachito Horiuchi, Kunihiko Iwamoto
  • Patent number: 10505911
    Abstract: There is provided an information processing method of an information processing device, including acquiring tag-unique information unique to an IC tag from the IC tag through near field communication, acquiring device-unique information unique to the information processing device, transmitting the acquired tag-unique information and the acquired device-unique information to an outside, and receiving, from the outside, an authentication result of the acquired tag-unique information and a verification result of right information for using the IC tag, which are obtained based on the transmitted tag-unique information and device-unique information.
    Type: Grant
    Filed: March 20, 2017
    Date of Patent: December 10, 2019
    Assignee: FELICA NETWORKS, INC.
    Inventors: Hiroyuki Hirama, Satoru Nakagawa
  • Patent number: 10498304
    Abstract: An audio processor is described. The audio processor includes a sensor input; an audio input for receiving an audio input signal; an audio output for outputting an audio signal to a loudspeaker. The audio processor is configured to determine a parameter value representative of temperature from a sensor signal received on the sensor input; process a received audio input signal by increasing the audio signal power in response to the temperature being below a predetermined threshold; and output the processed audio signal on the audio output.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: December 3, 2019
    Assignee: NXP B.V.
    Inventor: Temujin Gautama
  • Patent number: 10491166
    Abstract: In one general aspect, an amplifier can include an input amplifier circuit configured to receive a bias current and receive, as an input, a signal pair connected differentially to the input amplifier circuit, the input amplifier circuit configured to output a differential output signal pair based on the received differential input signal pair, a feedback amplifier circuit configured to receive an average of the differential output signal pair and configured to provide a bias setting output for controlling the bias current, and an output buffer circuit configured to buffer the differential output signal pair, the buffering resulting in a buffered differential output signal pair capable of driving a resistive load.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: November 26, 2019
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Abdullah Ahmed, Jonas Weiland
  • Patent number: 10469040
    Abstract: A control device includes: a differential amplification circuit that amplifies a difference with respect to an input signal; and a clipping circuit that is connected to an output side of the differential amplification circuit and clips an input voltage. The differential amplification circuit includes a plurality of switching elements formed of a GaN semiconductor, and the clipping circuit includes a switching element formed of the GaN semiconductor.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: November 5, 2019
    Assignee: ADVANTEST Corporation
    Inventor: Kiyotaka Kasahara
  • Patent number: 10454749
    Abstract: Gain variations during a packet can lead to significant performance degradation in communications systems that use high order quadrature amplitude modulation (QAM). A method and the associated apparatus track such variations in an OFDM system and completely eliminate any performance degradation. Gain estimation and compensation is employed with the use of pilot subcarriers in the payload of an OFDM data packet. Estimated pilot magnitude ratios are averaged, throughout the processing life of a packet, to yield accurate gain estimations. A gain compensation factor is used to adjust data carriers. An exclusion method is also employed to eliminate pilot carriers which contribute to noise.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: October 22, 2019
    Assignee: Edgewater Wireless Systems Inc.
    Inventors: Manish Bhardwaj, Garret Shih
  • Patent number: 10439576
    Abstract: Aspects and examples described herein provide a variable gain amplifier circuit and assembly. In one example, a variable gain amplifier circuit includes a signal input, a signal output, and a variable gain amplifier including a plurality of unit cell groups coupled between the signal input and the signal output, the variable gain amplifier configured to provide an adjustable gain to a signal received at the signal input during each of a plurality of amplify modes of the variable gain amplifier, each of the plurality of amplify modes corresponding to at least one unit cell group of the plurality of unit cell groups. A bypass path including a fixed attenuator is coupled in parallel with the variable gain amplifier between the signal input and the signal output to selectively couple the signal input to the signal output through the fixed attenuator during a bypass mode.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: October 8, 2019
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: Peihua Ye, Patrick Marcus Naraine, Adrian John Bergsma, Peter Harris Robert Popplewell, Thomas Obkircher
  • Patent number: 10432159
    Abstract: A signal amplifying system having an oscillator and an amplifying circuit. The oscillator has a first resistor with a first resistance R1 and a first capacitor with a first capacitance C1, and generates an oscillating signal having a frequency f which equals to k1/(R1*C1), k1 is a first proportional parameter. The amplifying circuit has an input terminal to receive an input signal and amplifies the input signal under the control of the oscillating signal. The amplifying circuit has a second resistor with a second resistance R2 and a second capacitor with a second capacitance C2. The amplifying circuit has a ?3 dB bandwidth W?3 dB which equals to k2/(R2*C2), k2 is a second proportional parameter. In this signal amplifying system, the product of the first resistance R1 and the first capacitance C1 is proportional to the product of the second resistance R2 and the second capacitance C2.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: October 1, 2019
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventor: Zhijiang Yang
  • Patent number: 10411721
    Abstract: An abnormal rise of oscillation frequencies of PLL circuits in conventional semiconductor devices has been an inevitable problem. This semiconductor device includes a phase difference detection circuit, a loop filter, and a voltage controlled oscillator that outputs an output clock signal. The voltage controlled oscillator includes a voltage-current converter that generates a control current having a current value in accordance with the voltage level of a frequency control voltage, an oscillator that varies the frequency of the output clock signal in accordance with the current value of the control current, and a current limiter that limits the current flowing in the oscillator in accordance with a limiting voltage transmitted through a signal-flow path provided independently from the other circuits.
    Type: Grant
    Filed: November 17, 2017
    Date of Patent: September 10, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Masashi Oki
  • Patent number: 10374554
    Abstract: Certain aspects of the present disclosure generally relate to a differential amplifier implemented using a complementary metal-oxide-semiconductor (CMOS) structure. The differential amplifier generally includes a first pair of transistors and a second pair of transistors coupled to the first pair of transistors. The gates of the first pair of transistors and gates of the second pair of transistors may be coupled to respective differential input nodes of the differential amplifier, and drains of the first pair of transistors and drains of the second pair of transistors may be coupled to respective differential output nodes of the differential amplifier. In certain aspects, the differential amplifier may include a biasing transistor having a drain coupled to a source of a transistor of the first pair of transistors and having a gate coupled to a common-mode feedback (CMFB) path of the differential amplifier.
    Type: Grant
    Filed: December 27, 2017
    Date of Patent: August 6, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Rahul Karmaker, Bin Fan
  • Patent number: 10320341
    Abstract: An amplifier for a receiver circuit is disclosed. The amplifier has an input node (Vin) and an output node (Vout). It comprises a tunable tank circuit connected to the output node (Vout), a feedback circuit path connected between the output node (Vout) and the input node (Vin), and a tunable capacitor connected between an internal node of the feedback circuit path and a reference-voltage node. A receiver circuit and a communication apparatus is disclosed as well.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: June 11, 2019
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (publ)
    Inventor: Fenghao Mu
  • Patent number: 10288674
    Abstract: A electrochemical or other sensor interface circuit architecture can deliver substantial DC offset bias to an electrochemical or other sensor separately or independently from delivering a time-varying AC excitation signal, which can then be provided with higher resolution, which, in turn, can allow better resolution of the measured response signal providing the impedance characteristic of sensor condition. For example, a differential time-varying AC excitation signal for the sensor condition characteristic can be delivered separately and independently from a differential stable (e.g., DC or other) bias signal, such as by using separate digital-to-analog converters (DACs), so that providing the more stable signal does not limit the resolution and accuracy of the time-varying signal, such as by using up the dynamic range of a single DAC.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: May 14, 2019
    Assignee: Analog Devices Global
    Inventors: GuangYang Qu, Junbiao Ding, Tony Yincai Liu, Shurong Gu, Yimiao Zhao, Hanqing Wang, Leicheng Chen
  • Patent number: 10263583
    Abstract: A variable gain amplifier capable of stabilizing an average output potential of a differential output signal, improving power efficiency over a wide range of an amplitude of the differential input signal, and suppressing deterioration of a distortion rate is provided. The variable gain amplifier includes an amplifying circuit configured to amplify a differential input signal with a gain according to a gain control signal, and a current control circuit. The amplifying circuit has a first current source supplying a source current. The current control circuit adjusts a magnitude of the source current of the first current source according to a magnitude of the gain control signal.
    Type: Grant
    Filed: January 3, 2018
    Date of Patent: April 16, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Naoki Itabashi
  • Patent number: 10250217
    Abstract: Each of a first high frequency power supply and a second high frequency power supply of a plasma processing apparatus is configured to selectively output a continuous wave, a modulated wave and a double-modulated wave. A first average value which determines an impedance at a load side of the first high frequency power supply and a second average value which determines an impedance at a load side of the second high frequency power supply are obtained by using any one of two averaging methods depending on a first high frequency power output from the first high frequency power supply and a second high frequency power output from the second high frequency power supply. An impedance matching of each of a first matching device and a second matching device is performed based on the first average value and the second average value.
    Type: Grant
    Filed: October 23, 2017
    Date of Patent: April 2, 2019
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Koichi Nagami, Norikazu Yamada
  • Patent number: 10243575
    Abstract: Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each input line to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m?1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC_fs/128+VADC_fs/256+VADC_fs/512+VADC_fs/1024 when m equals 4 and where VADC_fs is the full-scale voltage of the ADC.
    Type: Grant
    Filed: June 18, 2018
    Date of Patent: March 26, 2019
    Assignee: Maxlinear, Inc.
    Inventors: Yongjian Tang, Hao Liu
  • Patent number: 10243531
    Abstract: A differential signal processing circuit includes a local common mode voltage control circuit for controlling a common mode voltage of an output differential signal generated by the differential signal processing circuit based on an external common mode control current generated by an external common mode voltage control circuit. The differential signal processing circuit, which may be configured as a variable gain amplifier (VGA) or a continuous time linear equalizer (CTLE), includes a pair of load devices, a pair of input transistors, and a pair of current source transistors coupled via separate paths between upper and lower voltage rails. The external control circuit includes a replica circuit including a replica load device, a replica input transistor, and a replica current source transistor. The external control circuit sets the replica common mode voltage to a target using a current, wherein the external common mode control current is based on that current.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: March 26, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Pradeep Thiagarajan, Xiaobin Yuan, Todd Morgan Rasmus
  • Patent number: 10243664
    Abstract: An optical modulator driver circuit (1) includes an amplifier (50, Q10, Q11, R10-R13), and a current amount adjustment circuit (51) capable of adjusting a current amount of the amplifier (50) in accordance with a desired operation mode. The current amount adjustment circuit (51) includes at least two current sources (IS10) that are individually ON/OFF-controllable in accordance with a binary control signal representing the desired operation mode.
    Type: Grant
    Filed: May 9, 2014
    Date of Patent: March 26, 2019
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Munehiko Nagatani, Hideyuki Nosaka, Toshihiro Itoh, Koichi Murata, Hiroyuki Fukuyama, Takashi Saida, Shin Kamei, Hiroshi Yamazaki, Nobuhiro Kikuchi, Hiroshi Koizumi, Masafumi Nogawa, Hiroaki Katsurai, Hiroyuki Uzawa, Tomoyoshi Kataoka, Naoki Fujiwara, Hiroto Kawakami, Kengo Horikoshi, Yves Bouvier, Mikio Yoneyama, Shigeki Aisawa, Masahiro Suzuki
  • Patent number: 10218314
    Abstract: A power amplifier includes a common source amplifier and a common gate amplifier circuit. The common source amplifier circuit has a terminal connected to a radio frequency (RF) input terminal and uses a source terminal commonly as an input terminal and an output terminal of the power amplifier. The common gate amplifier circuit has a terminal connected to the common source amplifier circuit and another terminal connected to an RF output terminal, and uses a gate terminal commonly as the input terminal and the output terminal of the power amplifier. The common gate amplifier circuit includes a Doherty amplifier including a main power amplifier and an auxiliary power amplifier that is connected to the main power amplifier in parallel.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: February 26, 2019
    Assignees: Samsung Electro-Mechanics Co., Ltd., Korea Advanced Institute of Science and Technology
    Inventors: Yun Su Jin, Gyu Suck Kim, Song Cheol Hong
  • Patent number: 10193507
    Abstract: A wide range differential current switching circuit can operate across a wide range of input currents and across a broad range of frequencies. A first differential current source can include a first transistor and a second transistor. The first transistor receives a switching signal and provides an output current and at output node. The second transistor receives an inverted switching signal, the first transistor and the second transistor coupled to each other at a tail node. A current source provides an input current to the tail node. A third transistor can provide a boost current to the tail node while the first transistor is off.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: January 29, 2019
    Assignee: Analog Devices Global
    Inventors: Celal Avci, Bilal Tarik Cavus
  • Patent number: 10193515
    Abstract: The present invention is directed to electrical circuits. More specifically, embodiments of the presentation provide a CTLE module that includes a two compensation sections. A high-frequency zero RC section is in the source of the differential pair and close to the bias current source. A low-frequency zero section is coupled to an output terminal and configured outside the input signal path. A DC gain tuning section is coupled to the low-frequency zero section. There are other embodiments as well.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: January 29, 2019
    Assignee: INPHI CORPORATION
    Inventors: Rajasekhar Nagulapalli, Simon Forey, Parmanand Mishra
  • Patent number: 10084421
    Abstract: An instrumentation amplifier configured for providing high common mode rejection is described and includes an input differential stage configured to receive a differential input voltage and a folded cascode amplifying stage configured to receive output current mode signals provided from the input differential pair. A plurality of feedback networks is provided to improve the input stage. The amplifier may operate to provide an enhanced common mode rejection ratio of a single gain block in the instrumentation amplifier. In some examples, the circuitry may have a differential folded cascode amplifying stage which permits high precision and low distortion of amplified signals without degrading the common mode rejection ratio.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: September 25, 2018
    Assignee: Harman International Industries, Incorporated
    Inventors: Dimitri Danyuk, Todd A. Eichenbaum
  • Patent number: 10084516
    Abstract: Methods for transmitting over a wireless channel from a plurality of transmit chains are provided, as well as apparatuses for performing the methods. Each transmit chain has a variable gain power amplifier coupled to an antenna element. A subset of at least two transmit chains is selected from the plurality of transmit chains. A gain of at least one of the variable gain power amplifiers is set in accordance with the modulation scheme. Respective beams are transmitted with each transmit chain in the subset. Each respective beam represents a component of a modulated signal according to a modulation scheme, so that the beams combine over the wireless channel to form the modulated signal.
    Type: Grant
    Filed: May 11, 2016
    Date of Patent: September 25, 2018
    Assignee: HUAWEI TECHNOLOGIES CANADA CO., LTD.
    Inventor: Tho Le-Ngoc
  • Patent number: 10084419
    Abstract: An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.
    Type: Grant
    Filed: September 11, 2017
    Date of Patent: September 25, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsushi Shirane, Rui Ito, Toshiya Mitomo
  • Patent number: 10084422
    Abstract: An integrated circuit and method for providing a variable gain amplifier are disclosed. One embodiment of the a variable gain amplifier comprises at least one load, a cascode circuit coupled to the load, a folded-gilbert stage, coupled to the cascode circuit, the folded-gilbert stage comprising a main differential pair of transistors and an internal pair of transistors, and a digital to analog converter, coupled to the folded-gilbert stage, for steering currents between the main differential pair of transistors and the internal pair of transistors to change a gain of the variable gain amplifier.
    Type: Grant
    Filed: December 7, 2016
    Date of Patent: September 25, 2018
    Assignee: XILINX, INC.
    Inventor: Mohamed N. Elzeftawi
  • Patent number: 10075307
    Abstract: An adjustable signal equalization device includes an equalizer circuitry, an analog-to-digital converter (ADC), a calculation circuitry, and a comparator circuitry. The equalizer circuitry has a transfer function, and processes an input signal based on the transfer function to generate an output signal. The ADC generates a digital signal according to the output signal. The calculation circuitry performs an accumulation according to the first digital signal to generate a first accumulated value and a second accumulated value, and generates a first detection signal and a second detection signal according to the first accumulated value and the second accumulated value. The comparator circuitry compares the first detection signal with the second detection signal to output a control signal to the equalizer circuit if the first detection signal is different from the second detection signal, in order to adjust the transfer function.
    Type: Grant
    Filed: January 1, 2018
    Date of Patent: September 11, 2018
    Assignees: GLOBAL UNICHIP CORPORATION, TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wen-Juh Kang, Yu-Chu Chen, Chen-Yang Pan
  • Patent number: 10024818
    Abstract: An ionic current sensor array includes a master bias generator and a plurality of sensing cells. The master bias generator is configured to generate a bias voltage. Each sensing cell includes an ionic current sensor, an integrating capacitor, a sense transistor coupled between the integrating capacitor and the ionic current sensor, and an amplifier coupled to provide a reference voltage to bias the ionic current sensor. The amplifier includes a first transistor and a second transistor. The first transistor is coupled to receive the bias voltage, and the second transistor is coupled to the first transistor to provide the reference voltage to the ionic current sensor. The second transistor is also coupled between a source of the sense transistor and the gate of the sense transistor.
    Type: Grant
    Filed: June 17, 2016
    Date of Patent: July 17, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Vladimir Aparin, Bo Sun, Joung Won Park
  • Patent number: 10027297
    Abstract: One aspect of the present disclosure relates to a method for operating an amplifier, the amplifier including a variable resistor coupled between a source of a first input transistor and a source of a second input transistors, and a variable capacitor coupled between the source of the first input transistor and the source of the second input transistor. The method includes adjusting a resistance of the variable resistor to adjust a low-frequency gain of the amplifier, and adjusting a capacitance of the variable capacitor in an opposite direction as the adjustment to the resistance of the variable resistor.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: July 17, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Xiaobin Yuan, Jacob Lee Dahle, Mangal Prasad, Joseph Natonio
  • Patent number: 10014834
    Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: July 3, 2018
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventors: Vratislav Michal, Denis Cottin, Patrik Arno, Nicolas Marty
  • Patent number: 10009034
    Abstract: Methods and systems for an analog-to-digital converter with near-constant common mode voltage may comprise, in an analog-to-digital converter (ADC) having sampling switches on each of two input lines to the ADC, N double-sided and M single-sided switched capacitors on each input line: sampling an input voltage by closing the sampling switches, opening the sampling switches and comparing voltage levels between the input lines, iteratively switching the double-sided switched capacitors between a reference voltage (Vref) and ground, and iteratively switching the single-sided switched capacitors between ground and voltages that may equal Vref/2x where x ranges from 0 to m?1 and m is a number of single-sided switched capacitors per input line. A common mode offset of the ADC may be less than VADC_fs/128+VADC_fs/256+VADC_fs/512+VADC_fs/1024 when m equals 4 and where VADC_fs is the full-scale voltage of the ADC.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: June 26, 2018
    Assignee: Maxlinear, Inc.
    Inventors: Yongjian Tang, Hao Liu
  • Patent number: 9966907
    Abstract: A method and apparatus for high-speed clipping and recovery in an amplifier circuit is disclosed. In one embodiment, a circuit includes an amplifier configured to amplify an incoming signal. The amplifier includes inverting and non-inverting inputs, and is configured to provide a differential output. An output limiting circuit is coupled across the differential output, and is configured to limit an amplitude of an output signal provided on the differential output responsive to an input signal exceeding a first amplitude threshold. An input limiting circuit is coupled between the inverting input and the non-inverting input of the amplifier. Responsive to the input signal exceeding a second amplitude threshold (greater than the first), the input limiting circuit is configured to limit the amplitude of the output signal.
    Type: Grant
    Filed: February 7, 2017
    Date of Patent: May 8, 2018
    Assignee: Apple Inc.
    Inventors: Vahid Majidzadeh Bafar, Ashkan Borna, Mansour Keramat
  • Patent number: 9966908
    Abstract: A circuit for implementing a differential input receiver is described. The circuit comprises an input circuit having a first input node and a second input node configured to receive a differential input signal; a first output circuit having a first capacitor coupled between the first input node and a first output node and a second capacitor coupled between the second input node and a second output node, wherein the first output circuit generates an output signal at the first output and the second output when the input signal is in a first frequency range; and a second output circuit comprising an amplifier having a first amplifier input coupled to the first input node and a second amplifier input coupled to the second input node, wherein the second output circuit generates an output signal when the input signal is in a second frequency range which extends lower than the first frequency range. A method of implementing a differential input receiver is also described.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: May 8, 2018
    Assignee: XILINX, INC.
    Inventor: Declan Carey