Having Common Mode Rejection Circuit Patents (Class 330/258)
  • Patent number: 11143560
    Abstract: Various embodiments include an electronic circuit for driving a thermocouple element comprising: contact electrodes for connecting cold-end electrodes of the thermocouple element; and a measurement circuit to measure a thermo-voltage generated by the thermocouple element. One of the electrodes is connected to a supply voltage and a ground potential over a voltage divider having resistors with pre-defined resistance values such that a common mode voltage between the contact electrode and the ground potential is in a pre-defined range. If a leakage resistance effective between the contact electrode and the ground potential is greater than a pre-defined threshold, a processor compares the common mode voltage to the pre-defined range and generates a calibration value for the measurement circuitry if the common mode voltage is outside the range.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: October 12, 2021
    Assignee: VITESCO TECHNOLOGIES GMBH
    Inventor: Pierre Scotto
  • Patent number: 11114981
    Abstract: Disclosed is a differential amplifier including an input circuit, a detecting and controlling circuit, and an output circuit. The input circuit outputs input current to two output nodes according to the voltage of a differential input signal and the voltage of a bias node. The detecting and controlling circuit outputs compensative current to the two output nodes according to control bias voltage and the voltage of the bias node, in which the voltage of the bias node and the compensative current relate to the voltage of the differential input signal. The output circuit is coupled to the two output nodes and outputs a differential output signal according to the sum of the input current and the compensative current. Due to the detecting and controlling circuit outputting the compensative current, the differential amplifier prevents itself from entering a deadlock state even though the input current is insufficient or zero.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: September 7, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Tzung-Ling Tsai, Shu-Lin Chang, Chih-Lung Chen
  • Patent number: 11108985
    Abstract: Provided is an imaging device including: a photoelectric converter; an AD converter unit including a differential stage; and a ramp signal generator. The photoelectric converter and a first part of the differential stage are arranged in a first chip, a second part of the differential stage is arranged in a second chip that is a different chip from the first chip and stacked on the first chip, and the ramp signal generator is arranged in a different chip from the first chip.
    Type: Grant
    Filed: February 5, 2019
    Date of Patent: August 31, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Kohichi Nakamura, Masahiro Kobayashi, Hideo Kobayashi
  • Patent number: 11088677
    Abstract: A signal receiving device includes a first amplifier, a duty cycle adjuster and a common mode feedback circuit. The first amplifier receives an input signal, a reference voltage and a bias voltage. The first amplifier generates a first common current based on the bias voltage and, based on the first common current, generates a first output signal and a second output signal complementary to each other by comparing the input signal and the reference voltage. The duty cycle adjuster charges and discharges a selected capacitor according to the first output signal or the second output signal to generate a sensing voltage, and generates a common reference voltage according to the sensing voltage. The common mode feedback circuit generates the bias voltage by comparing the common reference voltage and the reference voltage.
    Type: Grant
    Filed: November 27, 2020
    Date of Patent: August 10, 2021
    Assignee: Winbond Electronics Corp.
    Inventors: Chen-Yu Wu, Chun-Cheng Chen
  • Patent number: 11082018
    Abstract: A MOSFET has a current conduction path between source and drain terminals. A gate terminal of the MOSFET receives an input signal to facilitate current conduction in the current conduction path as a result of a gate-to-source voltage reaching a threshold voltage. A body terminal of the MOSFET is coupled to body voltage control circuitry that is sensitive to the voltage at the gate terminal of the MOSFET. The body voltage control circuitry responds to a reduction in the voltage at the gate terminal of the MOSFET by increasing the body voltage of the MOSFET at the body terminal of the MOSFET. As a result, there is reduction in the threshold voltage. The circuit configuration is applicable to amplifier circuits, comparator circuits and current mirror circuits.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: August 3, 2021
    Assignee: STMicroelectronics Design and Application S.R.O.
    Inventor: Sandor Petenyi
  • Patent number: 11064145
    Abstract: In an imaging device, a differential stage includes an input transistor having an input node connected to a floating diffusion portion, a first control line and a second control line are located in a plurality of sets, the first control line is connected to connection portions of some sets of the plurality of sets, and the second control line is connected to connection portions of the other sets of the plurality of sets.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: July 13, 2021
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Hideo Kobayashi
  • Patent number: 11063567
    Abstract: An input circuit includes an input stage having an input node and a direct-current (DC) amplifier coupled to the input node. The input circuit also includes an alternating-current (AC) amplifier coupled to an output node of the DC amplifier. The input circuit also includes a capacitor coupled between the input node and the output node of the DC amplifier. The input circuit also includes a voltage divider coupled to the DC amplifier and the AC amplifier. The voltage divider includes first resistor associated with the DC amplifier and a second resistor associated with the AC amplifier, where the first resistor is larger than the second resistor.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: July 13, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Niko Bako, Christian Gehle
  • Patent number: 11050396
    Abstract: An amplifier circuit is provided, which includes an input stage circuit, at least one impedance component and a current supply circuit, where the input stage circuit is coupled between at least one input terminal of the amplifier circuit and at least one output terminal of the amplifier circuit, the impedance component is coupled between a first reference voltage and the output terminal, and the current supply circuit is coupled between a second reference voltage and the output terminal. The input stage circuit is arranged to generate a signal current in response to an input signal on the input terminal, and the current supply circuit is arranged to provide at least one adjustment current. In addition, a common mode voltage level of an output signal on the output terminal is controlled by the adjustment current, to allow the amplifier circuit to perform low voltage operations.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: June 29, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu-Ting Chung, Shawn Min, Yi-Chun Hsieh
  • Patent number: 11009563
    Abstract: A signal processing arrangement for a Hall sensor comprises a signal path, a feedback path and a converter path. The signal path comprises a Hall element and a front-end amplifier which are connected in series and arranged to generate an output signal depending on a magnetic field. The feedback path comprises a compensation circuit and is coupled to the signal path. The converter path comprises an analog-to-digital converter and an offset compensation circuit and is coupled to the signal path. A switch network is coupled between the signal path, the feedback path and the converter path. In a compensation phase, the switch network electrically connects the feedback path to the signal path such that the compensation circuit generates a compensation signal which is coupled into the signal path. In a sampling phase, the switch network connects the signal path to the converter path such that the output signal is reduced by the compensation signal is provided at the converter path.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: May 18, 2021
    Assignee: AMS AG
    Inventors: Dominik Ruck, Gerhard Oberhoffner
  • Patent number: 11012104
    Abstract: Apparatus and methods for calibrating radio frequency transmitters to compensate for common mode local oscillator leakage are provided herein. In certain configurations herein, a transmitter generates a radio frequency transmit signal based on mixing a baseband input signal with a local oscillator signal. The transmitter is calibrated to compensate for common mode local oscillator leakage. Thus, a common mode component of the local oscillator signal is reduced or eliminated from the radio frequency transmit signal, which provides a number of benefits, including lower levels of undesired emissions from the transmitter.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: May 18, 2021
    Assignee: Analog Devices, Inc.
    Inventors: David J. McLaurin, Christopher Mayer, Hatice Dicle Ozis Unsal, Zheng Gao
  • Patent number: 11012043
    Abstract: A system has an output and receives an input signal. An operational amplifier has an input, an output and an offset at the input. A switched capacitor network samples the input signal at a switched capacitor frequency. An autozeroing capacitor connected to the input of the operational amplifier captures the offset during an offset capture interval according to an autozeroing frequency. Chopping and autozeroing switches, connected between the autozeroing capacitor and the switched capacitor network, chop the sampled input signal according to a chopping frequency and autozero the captured offset according to the autozeroing frequency. De-chopping switches, connected between the output of the operational amplifier and the output of the system, operate on the output of the operational amplifier at the chopping frequency to chop the autozeroed captured offset and de-chop the chopped sampled input signal processed by the operational amplifier.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: May 18, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Eric Kimball, Sai Srujana Vuppala
  • Patent number: 10979000
    Abstract: A differential amplifier circuit includes a differential pair including a first field-effect transistor (FET) and a second FET, a first current source that generates a current which flows in the first FET and the second FET, and an output circuit that outputs an output voltage corresponding to a difference between a gate voltage of the first FET and a gate voltage of the second FET in accordance with an operation of the differential pair. A back gate of the first FET is connected to a gate of the first FET, and a back gate of the second FET is connected to a gate of the second FET. A first feedback voltage corresponding to the output voltage is input to the gate of the second FET.
    Type: Grant
    Filed: April 16, 2020
    Date of Patent: April 13, 2021
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yusuke Shimamune
  • Patent number: 10939094
    Abstract: An electronic device includes a voltage divider producing different reference voltages. Dummy pixels each are formed by a transfer gate transistor having a first conduction terminal coupled to a floating diffusion node, a second conduction terminal, and a control node coupled to a first gate signal line, a transmission gate coupled between one of the plurality of taps and the second conduction terminal of the transfer gate transistor, a floating diffusion capacitor coupled between the floating diffusion node and ground, a transistor having a first conduction terminal coupled to the floating diffusion node, a second conduction terminal, and a control terminal coupled to a second gate signal line, and a reset transistor having a first conduction terminal coupled to the upper reference voltage, a second conduction terminal coupled to the second conduction terminal of the transistor, and a control terminal coupled to a reset signal line.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: March 2, 2021
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Lookah Chua, Jansen Reyes Duey, Tarek Lule, Mathieu Thivin
  • Patent number: 10877503
    Abstract: At least some embodiments are directed to a system comprising a capacitor coupled to a voltage supply rail and configured to carry a capacitor current that comprises first and second parts. The capacitor current is an alternating current (AC). A first current mirror component may couple to the capacitor and to the voltage supply rail and is configured to carry the first part of the capacitor current. A second current mirror component couples to the voltage supply rail and is configured to carry the second part of the capacitor current. The second part of the capacitor current is proportionally related to the first part of the capacitor current. A circuit couples to the second current mirror component. The capacitor and the first and second current mirror components are configured to attenuate a common mode noise current flowing to the circuit.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: December 29, 2020
    Assignee: Texas Instruments Incorporated
    Inventors: Nitin Agarwal, Rajavelu Thinakaran, Sumit Dubey
  • Patent number: 10873295
    Abstract: This application relates to amplifier circuitry for amplifying an input signal from a MEMS capacitive sensor. The amplifier circuitry includes a first amplifier for receiving the input signal (VINP) and outputting a first output signal (VOUTP) based on the input signal. A second amplifier is configured to output a second output signal (VOUTN) which varies inversely with the first output signal. The first and second amplifier outputs are connected via first and second impedances so that a voltage at a common-mode node is equal to a common-mode voltage of the first and second output signals. The second amplifier has an input stage having an input terminal connected to a first reference voltage (VR1) and a feedback terminal connected to the common-mode node. The second amplifier also has an output stage connected between an output terminal of the input stage and the second amplifier output.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: December 22, 2020
    Assignee: Cirrus Logic, Inc.
    Inventor: Paul Wilson
  • Patent number: 10819291
    Abstract: An operational amplifier includes: a first amplifier stage, configured to generate first output voltages according to first input voltages; a second amplifier stage, configured to generate second output voltages according to the first output voltages; a second output stage circuit, configured to replicate an equivalent or a scaled-down version of the first output stage circuit; a first common-mode feedback circuit, configured to keep an output common-mode voltage of the second output stage circuit at a predetermined value; a logic loop circuit configured to, when the operational amplifier operates in a direct current calibration phase, adjust a difference between the first output voltages; a bias circuit, configured to generate a voltage close to a common-mode voltage of the first output voltages produced after the operational amplifier is turned on, the voltage serving as a reference voltage of a second common-mode feedback circuit.
    Type: Grant
    Filed: October 21, 2019
    Date of Patent: October 27, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventors: Wen-Chi Wang, Si Herng Ng
  • Patent number: 10797662
    Abstract: An amplifying circuit may include: an amplifier configured to receive a first input voltage and output a first output voltage by amplifying the first input voltage; and a common-mode feedback circuit configured to enable the first output voltage to operate in a common mode by receiving the first output voltage and performing a feedback to adjust at least one feedback voltage applied to the amplifier based on the first output voltage. The common-mode feedback circuit may include a first Miller compensation circuit configured to perform dominant pole compensation by using a Miller effect for the common-mode feedback circuit. The first Miller compensation circuit may include a resistor and a capacitor.
    Type: Grant
    Filed: February 15, 2019
    Date of Patent: October 6, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seong-won Joo, Ji-soo Chang
  • Patent number: 10797655
    Abstract: A low noise amplifier (LNA) includes a pair of n-type transistors, each configured to provide a first transconductance; a pair of p-type transistors, each configured to provide a second transconductance; a first pair of coupling capacitors, cross-coupled between the pair of n-type transistors, and configured to provide a first boosting coefficient to the first transconductance; and a second pair of coupling capacitors, cross-coupled between the pair of p-type transistors, and configured to provide a second boosting coefficient to the second transconductance, wherein the LNA is configured to use a boosted effective transconductance based on the first and second boosting coefficients, and the first and second transconductances to amplify an input signal.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: October 6, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: An-Hsun Lo, Wen-Sheng Chen, En-Hsiang Yeh, Tzu-Jin Yeh
  • Patent number: 10735019
    Abstract: An apparatus such as an electronic circuit includes an input operable to receive an input signal; a dynamic common mode adjustor operable to: i) derive a differential signal from the received input signal, and ii) control an offset of the differential signal as a function of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one arrangement, the offset differential signal outputted from the output includes a first signal and a second signal; a difference between the second signal and the first signal proportionally varies with respect to the received input signal.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: August 4, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Thomas Holm Hansen, Mikkel Hoyerby
  • Patent number: 10644662
    Abstract: A amplifier circuit in some embodiment includes a differential amplifier have a pair of current sources. Each of the current sources includes two or more current-generating transistors and respective switching transistors, which can be turned on and off by a gain input code to tune the gain of the amplifier. A common-mode controller includes a similar pair of current sources as the differential amplifier. The common mode controller receives a common-mode signal of the input signal and a common-mode gain input code, and maintains the common-mode gain of the amplifier circuit when the differential gain changes. The amplifier circuit is switchable between a buffer mode and an equalizer mode.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 5, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shu-Chun Yang, Wei Chih Chen, Yu-Nan Shih
  • Patent number: 10560058
    Abstract: Methods, circuits, and apparatuses that provide Buffer Amplifier, containing Amplifiers and Buffer Drivers, one or more of the following: ultra low power Buffer Amplifier, capable of having high gain, low noise, high speed, near rail-to-rail input-output voltage span, high sink-source current drive capability for an external load, and able to operate at low power supply voltages. Methods, circuits, and apparatuses that provide regulated cascode (RGC) current mirrors (CM) capable of operating at low power supply and having wide input-output voltage spans.
    Type: Grant
    Filed: October 27, 2018
    Date of Patent: February 11, 2020
    Inventor: Ali Tasdighi Far
  • Patent number: 10523166
    Abstract: An amplifier circuit having improved common mode rejection is provided. This can be achieved by estimating the common mode value of an input signal and using this to adjust a target common mode voltage at the output of the amplifier. This can help avoid the differential gain becoming modified by the common mode voltage.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: December 31, 2019
    Assignee: Analog Devices Global
    Inventor: Jonathan Ephraim David Hurwitz
  • Patent number: 10396724
    Abstract: In a general aspect, a system can include a fully differential amplifier circuit that includes a first amplifier, and first and second feedback paths. The first feedback path can provide a feedback path from a positive output of the first amplifier to a negative input of the first amplifier. The second feedback path can provide a feedback path from a negative output of the first amplifier to a positive input of the first amplifier. The system can include a chopper clock circuit configured to output a variable duty cycle chopper clock signal. The system can include a common mode loop circuit including a second amplifier and chopper switches. The common mode loop circuit can be configured as a local feedback loop for the first amplifier. The chopper switches can be configured to receive the chopper clock signal and control current flow into the positive and negative inputs.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: August 27, 2019
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Tyler Daigle, Hrvoje Jasa, Andrew Jordan, Gregory Maher
  • Patent number: 10361668
    Abstract: The present disclosure provides systems and methods to provide a constant common mode voltage at the input terminals of a difference amplifier. A difference amplifier can receive an input signal and can deliver an amplified version of the received input signal at an output of the difference amplifier. In a system where a difference amplifier can receive an output of a digital-to-analog converter (DAC), the DAC performance can deteriorate in situations where common mode voltage at the input terminals of the difference amplifier are changing. A difference amplifier including feedback circuitry can provide a constant common mode voltage at the input terminals of the difference amplifier, leading to improved performance in a system where the difference amplifier receives an input signal from a DAC.
    Type: Grant
    Filed: October 27, 2016
    Date of Patent: July 23, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Yukihisa Handa, Nathan R. Carter
  • Patent number: 10346665
    Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal applied to the sensing unit; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the capacitive sensing units.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: July 9, 2019
    Assignee: SUNASIC TECHNOLOGIES LIMITED
    Inventors: Chi Chou Lin, Zheng Ping He
  • Patent number: 10330767
    Abstract: A calibrated measurement circuit, with a first node, a second node, a circuit element coupled between the first node and the second node, and a reference circuit element. The calibrated measurement circuit also comprises circuitry for directing a first current and a second current between the first node and the second node and to the reference circuit element. The calibrated measurement circuit also comprises circuitry for measuring voltage across the circuit element in response to the first and second currents, and circuitry for measuring voltage across the reference circuit element in response to the first and second currents. A calibration factor is also determined for calibrating measured voltages across the circuit element, in response to a relationship between the first voltage, the second voltage, and the reference circuit element.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: June 25, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Abhijit Kumar Das, Christy Lee She
  • Patent number: 10320337
    Abstract: A dynamic common reference input (CMRI) signal may be provided to an operational amplifier, or “op-amp,” in an amplifier system to reduce the common mode ripple of the fully-differential op-amp, while adding little or no noise in the amplifier system. The dynamic CMRI signal may be controlled such that a common-mode component of two amplifier input nodes of the operational amplifier is made approximately independent of two input signals received at two system input nodes of the amplifier system. An amplifier system with the dynamic CMRI may be used in class-D amplifiers, such as amplifiers for audio systems that generate output for headphones or speakers.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: June 11, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Xin Zhao, Tejasvi Das, Hossein Mirzaie, Lei Zhu, Xiaofan Fei
  • Patent number: 10312868
    Abstract: A fully differential amplifier includes a first feedback resistance, a second feedback resistance, a first input resistance and a second input resistance. A first ratio of the first feedback resistance to the first input resistance is equalized with that of a reference ratio of a pair of reference resistances. Similarly a second ratio of the second feedback resistance to the second input resistance is also equalized with that of the reference ratio. Such equalization operations may be performed during a calibration phase prior to normal operation of the fully differential amplifier. Accordingly, when a common mode voltage present on each of the first output terminal and the second output terminal varies during normal operation, contribution of an erroneous differential signal component across the pair of differential output terminals is prevented.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: June 4, 2019
    Assignee: AURA SEMICONDUCTOR PVT. LTD
    Inventors: Arnold J D'Souza, Shyam Somayajula
  • Patent number: 10305431
    Abstract: An apparatus includes a first amplifier having a first feedback resistance and an output configured to be coupled to a first input of a second amplifier having a second feedback resistance. The apparatus includes a third amplifier coupled to an input of the first amplifier and having an output configured to be coupled to a second input of the second amplifier.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: May 28, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Joung Won Park, Namsoo Kim
  • Patent number: 10284156
    Abstract: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: May 7, 2019
    Assignee: SK hynix Inc.
    Inventors: Dong Hyun Kim, Eun Ji Choi, Yo Han Jeong, Soon Ku Kang, Woo Jin Kang, Kwan Su Shon, Hyun Bae Lee, Tae Jin Hwang
  • Patent number: 10263582
    Abstract: The present disclosure describes variable gain amplifiers with gain-based compensation. In some embodiments, a variable gain amplifier (VGA) includes a gain stage, an output stage, a compensation stage, and a capacitor coupled between respective outputs of the gain stage and compensation stage. A gain of the VGA is configured, based on a gain setting, to amplify signals received by the variable gain amplifier. A gain of the compensation stage is configured, based on the gain setting, to alter an effective capacitance of the capacitor, which is applied to the output of the gain stage for compensation of the VGA. By altering the effective capacitance based on the gain setting of the VGA, compensation capacitance is adjusted continuously with changes in the gain setting and at a similar resolution. In various embodiments, the continuous adjustment of the compensation capacitance across different gain levels prevents discontinuities in amplifier compensation.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: April 16, 2019
    Assignee: Marvell International Ltd.
    Inventors: Myung Jae Yoo, Ahmed Hesham Mostafa, Zubir Adal
  • Patent number: 10216974
    Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. In order to generate a noise-reduced image of a fingerprint, the capacitive image sensor has an array of capacitive sensing units which each has a protective layer; a sensing electrode; a voltage follower; a comparative capacitor; and a bias voltage supply circuit. The comparative capacitor, a portion of the bias voltage supply circuit, and the voltage follower are formed in an isolated well which is configured in such a way that current is able to be prevented from flowing across an interface in the isolated well and surrounding structures. The driving source is connected to a bulk node of the isolated well such that well potential of the isolated well equals to the output electric potential of a driving source.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: February 26, 2019
    Assignee: SUNASIC TECHNOLOGIES LIMITED
    Inventors: Chi Chou Lin, Zheng Ping He
  • Patent number: 10194234
    Abstract: An example apparatus includes an output jack including a ground pole and a power output pole, a power supply circuit configured to generate a power signal, a coupler circuit operably coupled to the ground pole and the power output pole of the output jack, such that the coupler circuit is configured to couple the power signal with a noise signal on the ground pole to generate a combined output signal on the power output pole.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: January 29, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Vijayakumar Dhanasekaran, Meysam Azin, Arash Mashayekhi, Kshitij Yadav
  • Patent number: 10193506
    Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: January 29, 2019
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Ru Feng Du, Qi Yu Liu
  • Patent number: 10182292
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Germano Nicollini, Andrea Barbieri
  • Patent number: 10177717
    Abstract: For broadband data communication, a data signal voltage at a signal input node can be converted to an output signal current at a signal output node. A first transistor device can contribute to the output signal current, with its transconductance or other gain reduced to accommodate larger signal swings, at which a second transistor can turn on and increase an effective resistance value of at least a portion of a gain degeneration resistor associated with the first transistor device. The second transistor can also contribute to the output signal current to help maintain or enhance an overall gain between the signal input node and the signal output node. Multiple secondary stages, push-pull arrangements, buffer amplifier configurations (which may or may not contribute to current in the gain degeneration resistor), input and output transformers, negative feedback to help reduce component variability, and frequency modification circuits or components are also described.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: January 8, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Chris J. Day, David Frank, Michael Glasbrener
  • Patent number: 10162995
    Abstract: A capacitive image sensor with noise reduction feature and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal coupled on the finger; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising: at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the finger.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: December 25, 2018
    Assignee: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi Chou Lin, Zheng Ping He
  • Patent number: 10110175
    Abstract: Various aspects of this disclosure describe reducing distortion of a power amplifier by coupling a common mode signal, such as determined from a voltage supply signal of the power amplifier or output of the power amplifier, to an input of the power amplifier. A resistive digital-to-analog converter (DAC) can be coupled to the power amplifier, and a common mode signal is modulated onto differential reference voltages of the DAC, causing the common mode signal to exist at both the input and output of the power amplifier at approximately the same time. Consequently, current flowing at differential inputs of the power amplifier due to the common mode component drops to zero, causing distortions due to common mode to differential mode conversion to be reduced.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: October 23, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Khaled Abdelfattah, Sherif Galal
  • Patent number: 10101384
    Abstract: A signal converter circuit includes a sensor connection, two comparator circuits, each having a signal input for an electric connection to the sensor connection, a reference input for an electric connection to a respectively assigned reference signal source and a signal output for a provision of an output signal, with a feedback line being formed between the respective signal output and the respective reference input, and further including two reference signal sources, each of the comparator circuits being configured for comparing a signal level at the signal input to a signal level at the reference input and for outputting a digital output signal as a function of a comparison result between the signal levels, wherein the two reference signal inputs are connected to one another via a coupling line being configured to transmit a presettable fraction of the respective signal level present at one reference input to the other reference input.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 16, 2018
    Assignee: FESTO AG & CO. KG
    Inventors: Roland Kalberer, Martin Hommel
  • Patent number: 10103698
    Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: October 16, 2018
    Assignee: INPHI CORPORATION
    Inventors: Rajasekhar Nagulapalli, Simon Forey, Parmanand Mishra
  • Patent number: 10090815
    Abstract: An embodiment circuit includes an operational amplifier having a first output terminal and a second output terminal. The circuit further includes a detector coupled between the first output terminal and the second output terminal of the operational amplifier. The detector is configured to detect a common-mode output voltage at the first output terminal and the second output terminal of the operational amplifier. The circuit also includes a feedback amplifier having a first input terminal coupled to the detector and a second input terminal configured to receive a reference voltage. The feedback amplifier is configured to generate a feedback signal based on the common-mode output voltage and the reference voltage and to provide the feedback signal to the operational amplifier. The circuit additionally includes an impedance element having a first terminal coupled to the first input terminal of the feedback amplifier and a second terminal coupled to a supply voltage.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: October 2, 2018
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V
    Inventor: Ashish Kumar
  • Patent number: 10079577
    Abstract: A signal amplification circuit comprises a low pass filter circuit (100). The low pass filter circuit (100) comprises two input ends and two output ends and further comprises two capacitors (C1, C2) having opposite polarities respectively connected between two output ends. A buffer circuit (200) comprises two input ends, a first operational amplifier (A1) and a second operational amplifier (A2), two output ends and a plurality of switches. A switched capacitor integrated circuit (300) comprises two input ends, a third operational amplifier (A3), a plurality of capacitor modules, a plurality of chopper modulators and two output ends. A signal switch (S) is used to control the on and off states of voltage signal before amplification.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: September 18, 2018
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Xueyan Wang, Weiyan Zhang, Qiang Chen
  • Patent number: 10078134
    Abstract: The disclosure provides a circuit. The circuit includes a first analog to digital converter (ADC) that generates a coarse output in response to a first input and a second input. The first ADC generates the coarse output in a differential phase. A pipeline ADC generates a differential signal in response to the coarse output, the first input and the second input. The pipeline ADC generates the differential signal in a common-mode phase. The first ADC generates a common mode signal in the common-mode phase.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: September 18, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raja Reddy Patukuri, Jagannathan Venkataraman, Prabu Sankar Thirugnanam
  • Patent number: 10069483
    Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: September 4, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Siladitya Dey, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar
  • Patent number: 10033342
    Abstract: A circuit includes a differential input stage amplifier that receives a differential input voltage and generates an output voltage based on a difference in the differential input voltage. A feedback loop provides feedback from an output of the differential input stage amplifier to input tail current of the differential input stage amplifier. The feedback loop enables class AB operation of the differential input stage amplifier. At least one gain reducer is operatively coupled to the feedback loop to reduce the gain of the feedback loop. The gain reducer has a resistance value that varies inversely proportional to loop current in the feedback loop to reduce the gain of the feedback loop as loop current increases.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: July 24, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vadim V. Ivanov, Ravinthiran Balasingam
  • Patent number: 9973160
    Abstract: An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: May 15, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Yan-Yu Lin
  • Patent number: 9942677
    Abstract: According to an embodiment, a transducer system includes a transducing element and a symmetry detection circuit. The transducing element includes a signal plate, a first sensing plate, and a second sensing plate. The symmetry detection circuit is coupled to a differential output of the transducer element and is configured to output an error signal based on asymmetry in the differential output.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 10, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andreas Wiesbauer, Christian Jenkner, Ulrich Krumbein, Marc Füldner
  • Patent number: 9912310
    Abstract: A differential signal conditioner circuit with common mode voltage (CMV) compensation is provided. The circuit includes a signal multiplexer that receives a input signal that includes a high and low signal and a reference CMV signal, a differential amplifier coupled to the signal multiplexer that receives the reference CMV signal and outputs a CMV error value during a first cycle, and receives the input signal and outputs an amplified difference signal during a second cycle. The circuit also includes a CMV measurement circuit that receives the reference CMV signal and outputs a confirmation value during the first cycle, and receives the input signal and outputs a CMV compensation value during the second cycle, and a processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value and generates a CMV compensated output based on the received signals and values.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: March 6, 2018
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventors: James Saloio, Jr., Robert D. Klapatch
  • Patent number: 9888331
    Abstract: According to an embodiment, a transducer system includes a transducing element and a symmetry detection circuit. The transducing element includes a signal plate, a first sensing plate, and a second sensing plate. The symmetry detection circuit is coupled to a differential output of the transducer element and is configured to output an error signal based on asymmetry in the differential output.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: February 6, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andreas Wiesbauer, Christian Jenkner, Ulrich Krumbein, Marc Füldner
  • Patent number: 9877106
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: January 23, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Germano Nicollini, Andrea Barbieri