Having Common Mode Rejection Circuit Patents (Class 330/258)
  • Patent number: 10284156
    Abstract: An amplifier may include a differential pair circuit configured to generate an output signal according to a first input signal and a second input signal, a plurality of current sinks coupled between a ground terminal and the differential pair circuit, and a feedback circuit configured to sense a level of the output signal and generate a feedback signal. At least one of the plurality of current sinks is controlled according to the feedback signal.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: May 7, 2019
    Assignee: SK hynix Inc.
    Inventors: Dong Hyun Kim, Eun Ji Choi, Yo Han Jeong, Soon Ku Kang, Woo Jin Kang, Kwan Su Shon, Hyun Bae Lee, Tae Jin Hwang
  • Patent number: 10263582
    Abstract: The present disclosure describes variable gain amplifiers with gain-based compensation. In some embodiments, a variable gain amplifier (VGA) includes a gain stage, an output stage, a compensation stage, and a capacitor coupled between respective outputs of the gain stage and compensation stage. A gain of the VGA is configured, based on a gain setting, to amplify signals received by the variable gain amplifier. A gain of the compensation stage is configured, based on the gain setting, to alter an effective capacitance of the capacitor, which is applied to the output of the gain stage for compensation of the VGA. By altering the effective capacitance based on the gain setting of the VGA, compensation capacitance is adjusted continuously with changes in the gain setting and at a similar resolution. In various embodiments, the continuous adjustment of the compensation capacitance across different gain levels prevents discontinuities in amplifier compensation.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: April 16, 2019
    Assignee: Marvell International Ltd.
    Inventors: Myung Jae Yoo, Ahmed Hesham Mostafa, Zubir Adal
  • Patent number: 10216974
    Abstract: A noised-reduced capacitive image sensor and a method operating the capacitive image sensor are provided. In order to generate a noise-reduced image of a fingerprint, the capacitive image sensor has an array of capacitive sensing units which each has a protective layer; a sensing electrode; a voltage follower; a comparative capacitor; and a bias voltage supply circuit. The comparative capacitor, a portion of the bias voltage supply circuit, and the voltage follower are formed in an isolated well which is configured in such a way that current is able to be prevented from flowing across an interface in the isolated well and surrounding structures. The driving source is connected to a bulk node of the isolated well such that well potential of the isolated well equals to the output electric potential of a driving source.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: February 26, 2019
    Assignee: SUNASIC TECHNOLOGIES LIMITED
    Inventors: Chi Chou Lin, Zheng Ping He
  • Patent number: 10194234
    Abstract: An example apparatus includes an output jack including a ground pole and a power output pole, a power supply circuit configured to generate a power signal, a coupler circuit operably coupled to the ground pole and the power output pole of the output jack, such that the coupler circuit is configured to couple the power signal with a noise signal on the ground pole to generate a combined output signal on the power output pole.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: January 29, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Jingxue Lu, Vijayakumar Dhanasekaran, Meysam Azin, Arash Mashayekhi, Kshitij Yadav
  • Patent number: 10193506
    Abstract: A class D amplifier receives and amplifies a differential analog signal which is then differentially integrated. Two pulse width modulators generate pulse signals corresponding to the differentially integrated analog signal and two power units generate output pulse signals. The outputs the power units are coupled to input terminals of integrators via a resistor feedback network. An analog output unit converts the pulse signals to an output analog signal. The differential integration circuitry implements a soft transition between mute/un-mute. In mute, the integrator output is fixed. During the soft transition, the PWM outputs change slowly from a fixed 50% duty cycle to a final value to ensure that no pop noise is present in the output as a result of mode change.
    Type: Grant
    Filed: December 13, 2016
    Date of Patent: January 29, 2019
    Assignee: STMicroelectronics (Shenzhen) R&D Co. Ltd
    Inventors: Ru Feng Du, Qi Yu Liu
  • Patent number: 10182292
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: January 15, 2019
    Assignee: STMicroelectronics S.r.l.
    Inventors: Germano Nicollini, Andrea Barbieri
  • Patent number: 10177717
    Abstract: For broadband data communication, a data signal voltage at a signal input node can be converted to an output signal current at a signal output node. A first transistor device can contribute to the output signal current, with its transconductance or other gain reduced to accommodate larger signal swings, at which a second transistor can turn on and increase an effective resistance value of at least a portion of a gain degeneration resistor associated with the first transistor device. The second transistor can also contribute to the output signal current to help maintain or enhance an overall gain between the signal input node and the signal output node. Multiple secondary stages, push-pull arrangements, buffer amplifier configurations (which may or may not contribute to current in the gain degeneration resistor), input and output transformers, negative feedback to help reduce component variability, and frequency modification circuits or components are also described.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: January 8, 2019
    Assignee: Analog Devices, Inc.
    Inventors: Chris J. Day, David Frank, Michael Glasbrener
  • Patent number: 10162995
    Abstract: A capacitive image sensor with noise reduction feature and a method operating the capacitive image sensor are provided. The capacitive image sensor includes: a number of capacitive sensing units forming an array, each capacitive sensing unit for transforming a distance between a portion of a surface of an approaching finger and a top surface thereof into an output electric potential, wherein a value of the output electric potential is changed by a driving signal coupled on the finger; at least one sample-and-hold circuit for capturing and retaining different output electric potentials; at least one signal conditioning circuit, each comprising: at least one differential amplifier for amplifying a difference between two electric potentials retained by the sample-and-hold circuit; and a driving source, for providing the driving signal to the finger.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: December 25, 2018
    Assignee: SUNASIC TECHNOLOGIES, INC.
    Inventors: Chi Chou Lin, Zheng Ping He
  • Patent number: 10110175
    Abstract: Various aspects of this disclosure describe reducing distortion of a power amplifier by coupling a common mode signal, such as determined from a voltage supply signal of the power amplifier or output of the power amplifier, to an input of the power amplifier. A resistive digital-to-analog converter (DAC) can be coupled to the power amplifier, and a common mode signal is modulated onto differential reference voltages of the DAC, causing the common mode signal to exist at both the input and output of the power amplifier at approximately the same time. Consequently, current flowing at differential inputs of the power amplifier due to the common mode component drops to zero, causing distortions due to common mode to differential mode conversion to be reduced.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: October 23, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Khaled Abdelfattah, Sherif Galal
  • Patent number: 10103698
    Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: October 16, 2018
    Assignee: INPHI CORPORATION
    Inventors: Rajasekhar Nagulapalli, Simon Forey, Parmanand Mishra
  • Patent number: 10101384
    Abstract: A signal converter circuit includes a sensor connection, two comparator circuits, each having a signal input for an electric connection to the sensor connection, a reference input for an electric connection to a respectively assigned reference signal source and a signal output for a provision of an output signal, with a feedback line being formed between the respective signal output and the respective reference input, and further including two reference signal sources, each of the comparator circuits being configured for comparing a signal level at the signal input to a signal level at the reference input and for outputting a digital output signal as a function of a comparison result between the signal levels, wherein the two reference signal inputs are connected to one another via a coupling line being configured to transmit a presettable fraction of the respective signal level present at one reference input to the other reference input.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 16, 2018
    Assignee: FESTO AG & CO. KG
    Inventors: Roland Kalberer, Martin Hommel
  • Patent number: 10090815
    Abstract: An embodiment circuit includes an operational amplifier having a first output terminal and a second output terminal. The circuit further includes a detector coupled between the first output terminal and the second output terminal of the operational amplifier. The detector is configured to detect a common-mode output voltage at the first output terminal and the second output terminal of the operational amplifier. The circuit also includes a feedback amplifier having a first input terminal coupled to the detector and a second input terminal configured to receive a reference voltage. The feedback amplifier is configured to generate a feedback signal based on the common-mode output voltage and the reference voltage and to provide the feedback signal to the operational amplifier. The circuit additionally includes an impedance element having a first terminal coupled to the first input terminal of the feedback amplifier and a second terminal coupled to a supply voltage.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: October 2, 2018
    Assignee: STMICROELECTRONICS INTERNATIONAL N.V
    Inventor: Ashish Kumar
  • Patent number: 10079577
    Abstract: A signal amplification circuit comprises a low pass filter circuit (100). The low pass filter circuit (100) comprises two input ends and two output ends and further comprises two capacitors (C1, C2) having opposite polarities respectively connected between two output ends. A buffer circuit (200) comprises two input ends, a first operational amplifier (A1) and a second operational amplifier (A2), two output ends and a plurality of switches. A switched capacitor integrated circuit (300) comprises two input ends, a third operational amplifier (A3), a plurality of capacitor modules, a plurality of chopper modulators and two output ends. A signal switch (S) is used to control the on and off states of voltage signal before amplification.
    Type: Grant
    Filed: January 29, 2016
    Date of Patent: September 18, 2018
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Xueyan Wang, Weiyan Zhang, Qiang Chen
  • Patent number: 10078134
    Abstract: The disclosure provides a circuit. The circuit includes a first analog to digital converter (ADC) that generates a coarse output in response to a first input and a second input. The first ADC generates the coarse output in a differential phase. A pipeline ADC generates a differential signal in response to the coarse output, the first input and the second input. The pipeline ADC generates the differential signal in a common-mode phase. The first ADC generates a common mode signal in the common-mode phase.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: September 18, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Raja Reddy Patukuri, Jagannathan Venkataraman, Prabu Sankar Thirugnanam
  • Patent number: 10069483
    Abstract: A system may comprise a high-pass filter having an input for receiving an input signal, an output for generating an output signal, a capacitor coupled between the input and the output, a switched-capacitor resistor coupled between the output and a reference voltage, and control circuitry configured to control the reference voltage to cancel current leakage into a circuit coupled to the output. The input, the output, the capacitor, and the switched-capacitor resistor may be arranged to generate the output signal as a high-pass filtered version of the input signal and the high-pass filter may be configured to operate in a plurality of modes comprising at least a high-impedance mode and a low-impedance mode in which the resistance of the switched-capacitor resistor is significantly smaller than the resistance when in the high-impedance mode.
    Type: Grant
    Filed: August 18, 2017
    Date of Patent: September 4, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Ramin Zanbaghi, Siladitya Dey, Daniel J. Allen, John L. Melanson, Aniruddha Satoskar
  • Patent number: 10033342
    Abstract: A circuit includes a differential input stage amplifier that receives a differential input voltage and generates an output voltage based on a difference in the differential input voltage. A feedback loop provides feedback from an output of the differential input stage amplifier to input tail current of the differential input stage amplifier. The feedback loop enables class AB operation of the differential input stage amplifier. At least one gain reducer is operatively coupled to the feedback loop to reduce the gain of the feedback loop. The gain reducer has a resistance value that varies inversely proportional to loop current in the feedback loop to reduce the gain of the feedback loop as loop current increases.
    Type: Grant
    Filed: February 20, 2017
    Date of Patent: July 24, 2018
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vadim V. Ivanov, Ravinthiran Balasingam
  • Patent number: 9973160
    Abstract: An amplifier device includes an amplifier circuit, a feedback circuit, and a filter circuit. The amplifier circuit is configured to receive an input signal and a filtered signal, and to output a first output signal and a second output signal at a first output terminal and a second output terminal respectively. The first output signal and the second output signal are a pair of differential signals. The feedback circuit is configured to set direct current (DC) voltage levels of the first output signal and the second output signal to be at a predetermined voltage. The filter circuit is configured to low-pass filter the input signal or to low-pass filter the pair of differential signals so as to generate the filtered signal, and is configured to output the filtered signal to the amplifier circuit.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: May 15, 2018
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Ming-Cheng Chiang, Yan-Yu Lin
  • Patent number: 9942677
    Abstract: According to an embodiment, a transducer system includes a transducing element and a symmetry detection circuit. The transducing element includes a signal plate, a first sensing plate, and a second sensing plate. The symmetry detection circuit is coupled to a differential output of the transducer element and is configured to output an error signal based on asymmetry in the differential output.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 10, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andreas Wiesbauer, Christian Jenkner, Ulrich Krumbein, Marc Füldner
  • Patent number: 9912310
    Abstract: A differential signal conditioner circuit with common mode voltage (CMV) compensation is provided. The circuit includes a signal multiplexer that receives a input signal that includes a high and low signal and a reference CMV signal, a differential amplifier coupled to the signal multiplexer that receives the reference CMV signal and outputs a CMV error value during a first cycle, and receives the input signal and outputs an amplified difference signal during a second cycle. The circuit also includes a CMV measurement circuit that receives the reference CMV signal and outputs a confirmation value during the first cycle, and receives the input signal and outputs a CMV compensation value during the second cycle, and a processing element that receives the CMV error value, the amplified difference signal, the CMV compensation value, and a differential amplifier gain value and generates a CMV compensated output based on the received signals and values.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: March 6, 2018
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventors: James Saloio, Jr., Robert D. Klapatch
  • Patent number: 9888331
    Abstract: According to an embodiment, a transducer system includes a transducing element and a symmetry detection circuit. The transducing element includes a signal plate, a first sensing plate, and a second sensing plate. The symmetry detection circuit is coupled to a differential output of the transducer element and is configured to output an error signal based on asymmetry in the differential output.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: February 6, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Andreas Wiesbauer, Christian Jenkner, Ulrich Krumbein, Marc Füldner
  • Patent number: 9877106
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: January 23, 2018
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Germano Nicollini, Andrea Barbieri
  • Patent number: 9867574
    Abstract: A high CMRR neural signal amplifier is configured for supply rail common mode feedback (SR-CMFB) whereby a set of CMFB signals is provided to supply rails of front end LNAs. High CMRR is maintained through buffering outputs of front end signal LNAs and a reference LNA coupled to signal and reference inputs of second stage amplifiers, respectively; and buffering the reference LNA output using an active/guard buffer pair, whereby across a plurality of distinct multiplexing time intervals, during each multiplexing time interval one buffer of the pair functions as an active buffer that drives second stage amplifier reference inputs corresponding to second stage amplifier outputs being multiplexed to a set of multiplexor outputs, and the other buffer of the pair functions as a guard buffer coupled to other second stage amplifier reference inputs corresponding to second stage amplifier outputs not being multiplexed to the set of multiplexor outputs.
    Type: Grant
    Filed: February 22, 2016
    Date of Patent: January 16, 2018
    Assignee: National University of Singapore
    Inventors: Kian Ann Ng, Yong Ping Xu, Shih-Cheng Yen, Nitish V. Thakor
  • Patent number: 9866189
    Abstract: An analog amplifier for recovering an abnormal operation of a common-mode feedback is provided. An analog variable amplifier includes a first input transistor and a second input transistor, a first output transistor and a second output transistor, a third transistor and a fourth transistor, a first current source, a fifth transistor and a sixth transistor, and a second current source. The first input transistor and the second input transistor amplify a bias current depending on a magnitude of a first input voltage and a second input voltage. The first output transistor and the second output transistor output the amplified bias current. The third transistor and the fourth transistor receive an output voltage of the first output transistor as an input and amplifying the received output voltage. The first current source provides a predetermined current between the first output transistor and the third transistor.
    Type: Grant
    Filed: September 3, 2013
    Date of Patent: January 9, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Woo Lee, Thomas Byung-Hak Cho, Jae-Hyun Lim
  • Patent number: 9824744
    Abstract: A differential interface circuit includes a differential amplifier circuit, a common-mode feedback circuit and a feedback initialization circuit. The differential amplifier circuit is configured to receive and amplify a differential input signal so as to produce an amplified differential output signal. The common-mode feedback circuit is configured to estimate a common-mode level of the differential output signal, to produce a feedback value in response to the estimated common-mode level, and to adjust the differential amplifier circuit using the feedback value. The feedback initialization circuit is configured, in response to detecting that the differential input signal is in a range predefined as abnormal, to temporarily override the common-mode feedback circuit, and instead set the feedback value applied to the differential amplifier circuit to a predefined initialization value.
    Type: Grant
    Filed: January 30, 2017
    Date of Patent: November 21, 2017
    Assignee: MARVELL ISRAEL (M.I.S.L) LTD.
    Inventor: Itai Finfter
  • Patent number: 9826291
    Abstract: An amplifier, a circuit, and an optical communication system are provided. The disclosed amplifier may include a single-to-differential variable gain amplifier having a variable resistor switch that substantially always operates in a triode region at all time. Said another way, the resistor switch is configured to operate in a triode region regardless of whether or not a first portion of an input signal to the variable gain amplifier is larger than a second portion of the input signal. The disclosed scheme helps to keep the variable resistor switch in the triode region in all cases of operation, thereby maintaining the linearity condition and reducing distortion in the variable gain amplifier.
    Type: Grant
    Filed: October 9, 2015
    Date of Patent: November 21, 2017
    Assignee: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
    Inventors: Rahul Shringarpure, Chakravartula Nallani, Georgios Asmanis, Faouzi Chaahoub
  • Patent number: 9757577
    Abstract: A method and apparatus for treating a cardiac condition in a human or animal patient comprises contacting an area of skin spanning the chest area of the patient with at least two patches or electrode paddles that apply low voltages and currents in a rotational manner to pre-stimulate that area, followed by applying a high voltage shock in rapid succession through the patient's heart through at least two electrode pad patches or paddles, wherein an amplifier-based external defibrillation cardioversion system is used. Also, an external pacing system is employed using ascending ramp or any arbitrary ascending or level waveform for transcutaneous pacing which employ a constant current delivery mode. Treatable conditions include atrial fibrillation (AF), atrial tachycardia (AT), ventricular fibrillation (VF), and ventricular tachycardia (VT).
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: September 12, 2017
    Assignee: Ruse Technologies, LLC
    Inventors: Raymond E. Ideker, Richard B. Ruse, Scott Bohanan
  • Patent number: 9722555
    Abstract: The present invention is directed to electrical circuits and techniques thereof. More specifically, embodiments of the present invention provide a differential amplifier that has a differential amplifier section, a current source, and a feedback section. The differential amplifier section comprises NMOS transistors that receives two voltage inputs and generate a differential output. The current source provides a long tail for the differential amplifier section. The feedback section generates a feedback voltage based on a reference bias voltage. The feedback voltage is used by an amplifier to control the current source and to keep the biasing and gain of the differential amplifier substantially constant. There are other embodiments as well.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: August 1, 2017
    Assignee: INPHI CORPORATION
    Inventors: Rajasekhar Nagulapalli, Simon Forey, Parmanand Mishra
  • Patent number: 9692438
    Abstract: The present invention provides a signal-processing circuit including an amplification module and an analog-to-digital conversion module, wherein the amplification module includes a first input terminal for receiving an input signal, a second input terminal for receiving a reference signal, and an output terminal coupled to the analog-to-digital conversion module. Furthermore, the input signal and the reference signal are amplified by the amplification module individually, and an amplified signal is output to the analog-to-digital conversion module through the output terminal, and then the amplified signal undergoes analog-to-digital conversion by the analog-to-digital conversion module. The first amplification coefficient of which the input signal is amplified by the amplification module and the second amplification coefficient of which the reference signal is amplified by the amplification module are opposite in sign.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: June 27, 2017
    Assignee: MediaTek Singapore Pte. Ltd.
    Inventors: Ming Shi, Jiangzhong Chen
  • Patent number: 9675298
    Abstract: A bioelectric signal measurement apparatus includes a first interface configured to detect a bioelectric signal of a testee through electrical interfacing with a skin of the testee; a second interface configured to detect a signal different from the bioelectric signal through electrical interfacing with the skin, the second interface electrically interfacing with the skin in a state that is different from a state in which the first interface electrically interfaces with the skin; and a signal processor configured to remove, from the detected bioelectric signal, a motion artifact between the first interface and the skin using the detected signal different from the bioelectric signal.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: June 13, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-pal Kim, Byung-hoon Ko, Tak-hyung Lee
  • Patent number: 9634685
    Abstract: Telescopic amplifier circuits are disclosed. In an embodiment, a telescopic amplifier includes an input stage for receiving differential input signals, an output stage for outputting differential output signals at the drains of a first output transistor and a second output transistor, a tail current transistor coupled to sources of a first input transistor and a second input transistor, a common mode feedback circuit coupled to the differential output signals and outputting a common mode output signal, and a circuit element coupled between the common mode output signal and a gate of the tail current transistor. In an embodiment the circuit element is a resistor. In another embodiment the circuit element is a source follower transistor. In additional embodiments a phase margin of the common mode feedback open loop gain of the amplifier is determined by the value of the resistor. Additional embodiments are disclosed.
    Type: Grant
    Filed: September 7, 2016
    Date of Patent: April 25, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Roswald Francis
  • Patent number: 9634628
    Abstract: An amplifier circuit, for a capacitive acoustic transducer defining a sensing capacitor that generates a sensing signal as a function of an acoustic signal, has a first input terminal and a second input terminal, which are coupled to the sensing capacitor and: a dummy capacitor, which has a capacitance corresponding to a capacitance at rest of the sensing capacitor and a first terminal connected to the first input terminal; a first buffer amplifier, which is coupled at input to the second input terminal and defines a first differential output of the circuit; a second buffer amplifier, which is coupled at input to a second terminal of the dummy capacitor and defines a second differential output of the circuit; and a feedback stage, which is coupled between the differential outputs and the first input terminal, for feeding back onto the first input terminal a feedback signal, which has an amplitude that is a function of the sensing signal and is in phase opposition with respect thereto.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: April 25, 2017
    Assignee: STMicroelectronics S.R.L.
    Inventors: Germano Nicollini, Andrea Barbieri
  • Patent number: 9577589
    Abstract: A circuit includes a differential input stage amplifier that receives a differential input voltage and generates an output voltage based on a difference in the differential input voltage. A feedback loop provides feedback from an output of the differential input stage amplifier to input tail current of the differential input stage amplifier. The feedback loop enables class AB operation of the differential input stage amplifier. At least one gain reducer is operatively coupled to the feedback loop to reduce the gain of the feedback loop. The gain reducer has a resistance value that varies inversely proportional to loop current in the feedback loop to reduce the gain of the feedback loop as loop current increases.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: February 21, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Vadim V. Ivanov, Ravinthiran Balasingam
  • Patent number: 9577576
    Abstract: Certain aspects of the present disclosure provide techniques and circuits for frequency mixing signals. One example circuit generally includes a transformer comprising a primary winding and a secondary winding, the transformer configured to generate a signal across the secondary winding based on a signal at an input node coupled to the primary winding, and a first mixer coupled to the secondary winding of the transformer and configured to convert a frequency of the signal across the secondary winding. In certain aspects, the circuit also includes a biasing circuit having an output coupled to a tap of the secondary winding and configured to generate a biasing voltage by applying an offset voltage to a common-mode voltage of the first mixer and apply the biasing voltage to the tap of the secondary winding to bias the first mixer.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: February 21, 2017
    Assignee: Qualcomm Incorporated
    Inventor: Gary Lee Brown, Jr.
  • Patent number: 9432015
    Abstract: A first signal received at a first transistor is compared to a second signal received at a second transistor taking into account a hysteresis value to generate a comparison output. At least one of the first and second transistors has a floating bulk. A switching circuit selectively applies first and second bulk bias voltages to the floating bulk of the first or second transistor in dependence on the comparison output. A third and fourth input signals, setting the hysteresis value, are received at third and fourth transistors and compared to generate differential outputs. At least one of the third and fourth transistors has a floating bulk. A differential amplifier determines a difference between the differential outputs for application to the floating bulk of the at least one of the third and fourth transistor and further for use as one of the first and second bulk bias voltages.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: August 30, 2016
    Assignee: STMicroelectronics International N.V.
    Inventors: Pijush Kanti Panja, Rajesh Yadav
  • Patent number: 9431978
    Abstract: The present invention discloses a common-mode feedback differential amplifier circuit, a common-mode feedback differential amplification method, and an integrated circuit. In an example, a common-mode feedback (CMFB) loop conducts voltage division on a first common-mode signal to generate a second common-mode signal and a third common-mode signal, a differential amplifier sets a voltage of the signal with the higher voltage between the second common-mode signal and the third common-mode signal equal to a voltage of a first input terminal or a second input terminal, and the CMFB loop controls the differential amplifier to output an output signal with the minimum voltage equal to the voltage of the first common-mode signal.
    Type: Grant
    Filed: July 31, 2014
    Date of Patent: August 30, 2016
    Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
    Inventor: Lei Huang
  • Patent number: 9401594
    Abstract: An integrated circuit device (200) includes a first and second differential I/O pins (TRXP/TRXN) and a surge protection circuit. The surge protection circuit includes a protection transistor, a positive surge detection circuit, and a negative surge detection circuit. The protection transistor is connected between the first and second I/O pins and has a gate to receive a control signal (CTRL). The protection transistor is turned on to connect the I/O pins together if the positive surge detection circuit detects a positive surge energy on either of the I/O pins and/or if the negative surge detection circuit detects a negative surge energy on either of the I/O pins. The surge protection circuit provides increased protection for Ethernet device against undesirable energy in a manner that does not adversely affect the performance of the device.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: July 26, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Quanqing Zhu, Guangming Yin
  • Patent number: 9397645
    Abstract: In one example, a method includes receiving a first differential signal including a first voltage signal and a second voltage signal, wherein the first differential signal includes a first common mode voltage; receiving a second common mode voltage. The method further includes determining, by a circuit, a second differential signal including a third voltage signal and a fourth voltage signal, wherein a difference between the third voltage signal and the fourth voltage signal is based on a difference between the first voltage signal and the second voltage signal, wherein the second differential signal includes the second common mode voltage. The method further includes outputting, substantially continuously, the second differential signal.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: July 19, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Giuseppe Bernacchia, Cha-fu Tsai
  • Patent number: 9374049
    Abstract: Provided is a differential amplifier including: an operational amplifier (OP AMP) having an inverting input, a non-inverting input, an inverting output, and a non-inverting output, a first feedback capacitor connected to the non-inverting input and the inverting output. A second feedback capacitor connected to the inverting input and the non-inverting output, a first four-terminal transistor connected to the non-inverting input and the inverting output. A second four-terminal transistor connected to the inverting input and the non-inverting output. One of source and drain of the first transistor and a gate thereof are connected to the inverting output, the other one of the source and drain and a bulk terminal are connected to the non-inverting input, one of source and drain of the second transistor and a gate thereof are connected to the non-inverting output, and the other one of the source and drain terminals and a bulk terminal are connected to the inverting input.
    Type: Grant
    Filed: November 28, 2014
    Date of Patent: June 21, 2016
    Assignee: Hyundai Motor Company
    Inventor: Sang-Hyeok Yang
  • Patent number: 9337779
    Abstract: An operational transconductance amplifier includes a cascode differential-pair amplifying circuit, a bias driving circuit, and a common mode feedback circuit. The cascode differential-pair amplifying circuit is configured for receiving a differential input voltage and for providing a differential output voltage. The bias driving circuit is configured for providing a first bias current to drive the cascode differential-pair amplifying circuit and for adjusting the transconductance of the transconductance amplifier. The bias driving circuit includes a first floating-gate transistor. The first floating-gate transistor is configured for adjusting the first bias current. The common mode feedback circuit is configured for adjusting a second bias current of the cascode differential-pair amplifying circuit according to the differential output voltage so that the differential output voltage is stabilized.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: May 10, 2016
    Assignee: NATIONAL TAIWAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Tzu-Yun Wang, Min-Rui Lai, Sheng-Yu Peng
  • Patent number: 9318165
    Abstract: A sense amplifier is disclosed that includes an amplifier circuit configured to receive, at an input, an input signal including an input level, the amplifier circuit configured to provide an amplified output signal including a gain with respect to the input level; and a feedback circuit coupled to receive the amplified output signal from the amplifier circuit, the feedback circuit configured to provide, at the input of the amplifier circuit, an adjusted version of the amplified output signal including a modified output magnitude based on common mode feedback.
    Type: Grant
    Filed: March 18, 2014
    Date of Patent: April 19, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Chulmin Jung, Rui Li, Sei Seung Yoon, Gregory Ameriada Uvieghara
  • Patent number: 9312828
    Abstract: The present document relates to multi-stage amplifiers, such as linear regulators or linear voltage regulators (e.g. low-dropout regulators) configured to provide a constant output voltage subject to load transients. A multi-stage amplifier is described, having a differential amplification stage which comprises a differential transistor pair. The differential amplification stage is configured to provide a stage output voltage at a stage output node of the differential transistor pair, based on a first input voltage at a first stage input node and a second input voltage at a second stage input node. The differential transistor pair also comprises a reference node. The differential amplification stage further comprises an active load comprising a first diode transistor coupled to the reference node and a first mirror transistor coupled to the stage output node.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: April 12, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventor: Frank Kronmueller
  • Patent number: 9312764
    Abstract: An apparatus and a method for controlling a direct-current (DC)-DC converter used in a vehicle are provided. The apparatus includes a switching control unit checking a difference between voltages of an input unit and an output unit and controlling an operation of at least one switch formed in a converter according to an operation mode of the converter according to the difference of voltages; and the converter controlling the operation of the at least one switch based on a control signal applied from the switching control unit to allow a current to flow from the input unit to the output unit.
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: April 12, 2016
    Assignee: LSIS CO., LTD.
    Inventors: Se Hyung Lee, Bum Su Jun, Ung Hoe Kim, Hyoung Taek Kim, Young Min Kim
  • Patent number: 9287839
    Abstract: A DC servo loop may track DC offset changes of an input signal and apply feedback to amplifiers to adjust a DC offset of the input signal. The DC servo loop may include digital loop tracking and analog loop tracking components. The digital loop tracking components may track small changes in the DC offset. When the DC offset exceeds a certain threshold, analog loop tracking may be activated to apply feedback to the amplifiers to adjust the DC offset. The adjustments to the DC offset may be delayed until an amplitude of the input signal exceeds a threshold to reduce contribution to noise in the input signal.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: March 15, 2016
    Assignee: CIRRUS LOGIC, INC.
    Inventors: Christophe Jean-Francois Amadi, Jason Lee Wardlaw, Emmanuel A. Marchais, Dylan Alexander Hester, Daniel John Allen, John Christopher Tucker
  • Patent number: 9253569
    Abstract: In accordance with an embodiment, a cancelation circuit includes a current mirror and a low pass filter. The current mirror includes an input terminal configured to accept an input current comprising a first noise signal, a first mirrored output and a second mirrored output. The low pass filter includes an input coupled to the first mirrored output and an output coupled to the second mirrored output. A sum of a current from the second mirrored output and a current of from the output of the low pass filter includes a phase-inverted version of the first noise signal.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: February 2, 2016
    Assignee: Infineon Technologies AG
    Inventors: Wilfried Florian, Luca Valli, Richard Gaggl
  • Patent number: 9246477
    Abstract: A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: January 26, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Miao Li, Xiaohua Kong, Zhi Zhu, Jie Xu
  • Patent number: 9209788
    Abstract: A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: December 8, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Miao Li, Xiaohua Kong, Zhi Zhu, Jie Xu
  • Patent number: 9136807
    Abstract: Apparatus and methods for electronic amplification are provided. In one embodiment, an amplifier includes first and second input terminals, an amplification circuit, a feedback circuit, and a current mirror. The amplification circuit includes a non-inverting voltage input electrically connected to the first input terminal and to a bias voltage, an inverting voltage input electrically connected to the second input terminal, a voltage output, and a current output. The amplifier includes a first feedback path from the voltage output to the inverting voltage input through the feedback circuit and a second feedback path from the current output to the inverting voltage input through the current mirror, which can mirror a current from the current output to generate a mirrored current. A current source such as a transducer can provide an input current between the first and second input terminals, and the mirrored current can substantially match the input current.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: September 15, 2015
    Assignee: ANALOG DEVICES, INC.
    Inventor: Scott A Wurcer
  • Patent number: 9130520
    Abstract: A highly reliable circuit is realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.
    Type: Grant
    Filed: August 21, 2013
    Date of Patent: September 8, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Masafumi Mitsuishi, Masayasu Komyo, Souji Sunairi
  • Patent number: 9083296
    Abstract: Exemplary embodiments are directed to systems, devices, and methods for enhancing an amplifier. An amplifier may include a first cascode circuit including a first transistor and a second transistor. The amplifier may include a second cascode circuit coupled to a differential output and including a first pair of transistors including a first transistor and a second transistor and a second pair of transistors including a third transistor and a fourth transistor. Further, the amplifier may include a differential input including a first transistor coupled to each of the first transistor of the first cascode circuit and the first and second transistors of the second cascode circuit, the differential input further including a second transistor coupled to each of the second transistor of the first cascode circuit and the third and fourth transistors of the second cascode circuit.
    Type: Grant
    Filed: July 17, 2013
    Date of Patent: July 14, 2015
    Assignee: Qualcomm Incorporated
    Inventor: Omid Rajaee
  • Patent number: 9054751
    Abstract: One embodiment of the present invention provides a transmitter for wireless communication. The transmitter includes a wideband tunable modulator, a number of power amplifiers with a particular power amplifier associated with a particular frequency range, and a wideband power amplifier (PA) driver. The PA driver is configured to receive an output signal from the wideband tunable modulator, amplify the output signal, and send the amplified output signal to at least one of the power amplifiers.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: June 9, 2015
    Assignee: AVIACOMM INC.
    Inventors: Shih Hsiung Mo, Yan Cui, Chung-Hsing Chang