Abstract: Provided is a mixer including a mixing unit configured to mix high frequency data signals and local oscillation (LO) signals, generate first and second low frequency data signals, and output the first and second low frequency data signals to first and second output terminals, respectively; a common mode amplification unit coupled to the mixing unit, the common mode amplification unit configured to compare a common mode voltage of the first and second low frequency data signals and a predetermined reference voltage, the common mode amplification unit further configured to output a feedback signal at a control node based on the comparison; a first load transistor coupled to the first output terminal and the control node, the first load transistor configured to provide the first output terminal with a first load current corresponding to the feedback signal; a first calibration transistor unit connected in parallel to the first load transistor in order to calibrate an input impedance of the first output terminal;

Abstract: A voltage regulator, a method of regulating voltage and an IC including a voltage regulator. In one embodiment, the voltage regulator includes: (1) a DC precision amplifier configured to generate a DC precision signal based on a reference voltage and a regulated output of the voltage regulator and (2) a response amplifier, coupled in parallel with the DC precision amplifier, configured to generate an error signal based on the reference voltage and the regulated output, the response amplifier further configured to generate the regulated output based on a regulating signal comprised of the error signal and the DC precision signal. The DC precision amplifier may be a CMOS amplifier and the response amplifier may be a NPN amplifier.

Abstract: In one embodiment, a circuit having a chopper stabilized amplifier and a network coupled in feedback with the chopper stabilized amplifier is disclosed. The circuit also has a plurality of switches coupled to an output of the chopper stabilized amplifier, and a summing network coupled to the plurality of switches. Ones of the plurality of switches are coupled to ones of a plurality of the summing network inputs.

Abstract: Embodiments of the invention include a common mode cancellation circuit and method for correcting signal skew in a differential circuit. According to one embodiment, an op amp circuit is used to correct the mismatch between transmission line lengths in the differential circuit. The CMCC can be embodied as an ASIC and added on to an existing differential signaling systems to correct and compensate for board wiring skew or other causes of phase misalignment. The result is restoration of the cross-over intersection of the plus and minus signals of the differential pair closer to the common voltage level point, as if the signals had been in phase.

Abstract: An electrical apparatus comprising an amplifier having a first input, a second input, and an output. The apparatus further comprises a first electrical path coupled to the first input and having a first resistance and a first electrical path coupled to the second input and having a second resistance. The apparatus further comprises a second electrical path coupled to the second input and having a third resistance and a second electrical path, comprising an electrically-controllable resistance, coupled between the output and the first input. Further, the apparatus comprises circuitry for controlling the electrically-controllable resistance for adjusting a ratio between the electrically-controllable resistance and the third resistance to approximate a ratio between the first resistance and the second resistance.

Abstract: An operational amplifier is provided. The operational amplifier includes a first transistor configured to receive a first input voltage, a second transistor configured to receive a second input voltage, and a current steering module coupled to first and second transistors and configured to receive a reference voltage. The first and second transistors form a differential pair. The first transistor, second transistor, and current steering module are configured such that a current is steered from the current steering module or to the current steering module based on common-mode voltages of the first and second input voltages and the reference voltage to set a common-mode output voltage of the operational amplifier.

Abstract: An exemplary negative impedance converting circuit for functioning as a voltage buffer and/or negating the impedance of a connected load. The negative impedance converting circuit includes inputs, outputs, a first transconductance stage and a second transconductance stage. The transconductance gain value of the first transconductance stage is greater than a transconductance gain value of the second transconductance stage. Exemplary embodiments of a reference voltage buffer using the negative impedance converting circuit are also described.

Abstract: An amplifier includes a signal amplification part that outputs an output signal obtained by amplifying an input signal and a common mode voltage VCM of the output signal, and a common mode feedback part that outputs a signal according to a difference between the common mode voltage VCM and a reference potential Vref as a regulation signal SREG. The regulation signal SREG from the common mode feedback part is fed back to a current source of the signal amplification part and a current source of the common mode feedback part.

Abstract: Methods, systems, and devices are described for providing voltage level shifting that may operate reliably and at low power, even at high voltages and/or high switching frequencies. Embodiments receive an input signal representing input information, and effectively generate two voltage responses as a function of the input signal. Each voltage response includes exponential terms as a function of resistive and capacitive loading effects of components of the embodiments. A combined response signal is generated substantially as a superposition of the first response signal and the second response signal. A high-side driver signal is then generated as a function of the combined response signal, such that the high-side driver signal substantially preserves the input information represented by the input signal, and such that the first exponential response and the second exponential response are substantially absent from the high-side driver signal.

Abstract: Increasing the input common-mode range of a circuit which accepts differential signals as inputs. Such an increase may be attained by correcting an input signal at continuous levels or at 2 or more discrete levels) without changing the strength represented by the input signal. In an embodiment, the common-mode component of an input signal is measured, and a correction voltage proportional to the difference between the measured common-mode component and a reference voltage, is generated. The correction voltage is coupled to the input terminals of the differential circuit to correct for any deviations from a desired level of common-mode voltage at the input terminals of the differential circuit. The approaches are applied to a switched-capacitor differential amplifier used in a sample-and-hold portion of an ADC.

Abstract: A telescopic differential operational amplifier circuit for use in a pipelined A/D converter is provided with two auxiliary differential amplifiers connected to two cascode circuits, each including cascode-connected first to fourth transistors. During the sampling phase, first and second switches are turned on to apply a predetermined bias voltage to the gates of first and fourth transistors, and the input terminal of the differential operational amplifier circuit is set to a common mode voltage. During the hold phase, the first and second switches are turned off so that a voltage of each of the gates of the first and fourth transistors change to follow an input signal inputted via the input terminal with coupling capacitors operating as a level shifter of the input signal. Then the differential operational amplifier circuit performs push-pull operation operative only in a transconductance drive region, and is prevented from operating in a slewing region.

Abstract: An operational amplifier circuit includes a transconductance amplifier circuit which converts a differential input voltage into a differential output current; a common-mode feedback circuit which outputs a control signal to the transconductance amplifier circuit 1 so as to make a D.C. voltage level of a differential output voltage of the transconductance amplifier circuit equal to a reference voltage; a voltage supply circuit which supplies a reference voltage to the common-mode feedback circuit; and an output load to which the differential output voltage of transconductance amplifier circuit is applied, and which constitutes an output terminal of the operational amplifier circuit 5. A power source voltage is supplied to each of the circuits. The operational amplifier circuit has an improved power-source noise canceling characteristic while maintaining its dynamic range.

Abstract: A method and apparatus for extending the common mode range of a differential amplifier. A circuit has a common mode detection circuit, a common mode voltage inversion circuit, and a differential amplifier. The common mode detection circuit receives a differential signal and detects a common mode voltage. The common mode voltage inversion circuit is coupled to the common mode detection circuit. The common mode voltage inversion circuit has an input node that receives the common mode voltage and an output node that outputs body voltage, wherein the common mode voltage inversion circuit creates an inverse relationship between the common mode voltage and the body voltage. The differential amplifier includes a differential pair of transistors that have a pair of body terminals coupled to the output node of the common mode voltage inversion circuit.

Abstract: An operational amplifier and a method for amplifying a signal. Embodiments provide a convenient and effective mechanism for reducing die area, design time and design verification time by sharing compensation components between the common-mode and differential feedback networks of the operational amplifier. As such, fewer compensation components are required, thereby reducing component die area. Additionally, given that the compensation components are shared between the common-mode and differential feedback networks, the feedback networks can be stabilized together with fewer compensation components to specify and verify, thereby reducing design and design verification time. Further, embodiments provide a compensation component coupling which does not couple directly to virtual ground, thereby reducing the noise of the operational amplifier.

Abstract: A differential amplifier that has a current supply and a differential current to voltage converter with a positive current input node, a negative current input node and a voltage output node, has offset voltage trimming. The voltage output node provides an output voltage that is proportional to the difference in current values flowing into the positive current input node and a negative current input node. A trimming circuit has a plurality of trimming control inputs, an inverting trimming output, a non-inverting trimming output and trimming inputs coupled to the current supply. Trimming resistances couple the inverting trimming output to the non-inverting trimming output. Trimming selectors, controllable by a trim code provided to the trimming control inputs, provide for selectively connecting the current supply directly to the non-inverting trimming output while selectively connecting the current supply to the inverting trimming output through a first selected group of the trimming resistances.

Abstract: This invention relates to a fully differential non-inverting parallel amplifier for detecting biology electrical signal, including input buffer circuits, differential filter circuits, data selector, non-inverting parallel amplifying circuits and analog-digital circuits. The biology electrical signal, first impeded and converted by the input buffer circuits, and then low-pass filtered by the differential filter circuits, shall be amplified with its common mode signal rejected by passing through the data selector and non-inverting parallel amplifier circuits. At last, the amplified biology electrical signal is output by analog to digital conversion in the analog-digital circuits after its noises beyond signal high frequency band are filtered by anti-aliasing filter net. This invention, with low noise and high common mode rejection ratio, stable baseline, large signal input dynamic range, is reliable and not easy to be saturated. Furthermore, it can support mature PACE Detecting with a low cost.

Abstract: A differential amplifier includes a differential amplifier section to generate a current composed of a differential-mode current and a first common-mode current according to a differential-mode component and a common-mode component of an input signal, a common-mode current generator section to generate a common-mode current according to the common-mode component of the input signal, and a current amplifier section to receive the current and the common-mode current, amplify a difference between the current and the common-mode current and output a result.

Abstract: Circuits that operate with power supplies of less than 1 volt are presented. More particularly, circuits that operate with supply voltages (VDD) near or lower than the threshold voltage of the transistors (310, 312, etc.) in those circuits are presented. Various circuits and embodiments such as operational transconductance amplifiers (346), biasing circuits, integrators, continuous-time sigma delta modulators, track-and-hold circuits, and others are presented. The techniques and circuits can be used in a wide range of applications and various transistors from metal-oxide-semiconductor to bipolar junction transistors may implement the techniques presented herein.

Abstract: Disclosed is a common mode feedback circuit for a differential amplifier that eliminates the effects of low frequency noise. A modulator is placed in a common mode feedback loop that modulates the feedback loop signal at a predetermined frequency to up-convert the low frequency noise. The predetermined frequency may be selected to be above the operating range of the downstream circuitry. In addition, a low pass filter can be used to eliminate the up-converted noise.

Abstract: This disclosure relates to a common mode regulation in multi stage differential amplifiers.

Abstract: A mixer arrangement includes a mixer cell coupled by a signal input to a mixer input, and is embodied for frequency conversion of a signal present on the input side to an intermediate frequency. A first current source is coupled to the signal input of the mixer cell, and a second current source is coupled to a signal output of the mixer cell. The mixer arrangement furthermore includes a sensor circuit embodied for detection and for outputting of a value which is derived from a current of one of the current sources. A desired value regulating circuit is coupled by a feedback input to the sensor circuit and is designed for outputting a regulating signal to the one current source derived from a comparison of a signal present at a feedback input with a desired value.

Abstract: A transconductance input apparatus energized by supply voltage has an input for receiving an input signal, and an output for delivering an output signal. The apparatus also has a plurality of transconductance stages for converting the input signal into the output signal, which is substantially free of dead zones when the total supply voltage is 2.7 volts or less.

Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.

Abstract: An approach to rejecting input common-mode voltage variations in a sampler/converter that avoids the use of a differential amplifier in the signal path, and without introducing added distortion or noise. In one embodiment, the input common-mode variations are sensed on a pair of matched resistors that straddle the common mode analog inputs, on a node ‘Vcmi’. An alternative, switched-capacitor-based sensing scheme is also possible. Using this measured Vcmi, adjustments are then made to the rest of the sampler/converter to take out any variations observed at Vcmi.

Abstract: A method and apparatus for providing a low power low voltage differential signaling driver are disclosed. In an example, a low voltage differential signaling driver circuit is described, comprising a first current source to provide current to a first differential pair of PNP transistors, a pair of transresistance amplifiers driven by a corresponding pair of transconductance stages, a second current source to provide current to a second differential pair of PNP transistors, and an output port having a common mode output voltage and a differential output voltage based on a state of the first differential pair of PNP transistors and the second differential pair of PNP transistors.

Abstract: In one embodiment, the present invention includes multiple gain stages to receive and amplify a differential input signal at different common mode voltages. The stages each may include a pair of linear NMOS gain transistors coupled to a primary coil of a given output transformer. One of the stages may include commonly coupled terminals coupled to a center tap of the primary coil of an output transformer of another stage, and a supply current provided to one of the stages is re-used for the other stage(s).

Abstract: An operational amplifier has an input stage that branches a first current according to first and second input signals. An output stage generates an output signal from a second current and one of the branch currents in the input stage. A first transistor supplies the first current to the input stage. A second transistor supplies the second current to the output stage. A first gate line supplies a first bias potential to the gate terminal of the first transistor. A second gate line supplies a second bias potential to the gate terminal of the second transistor. The first gate line and the second gate line are electrically isolated from each other, preventing unwanted feedback of the output signal to the input stage by leakage through the gate lines.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers. In some examples, techniques are used to stabilize differential power amplifiers by stabilizing common-mode feedback loops.

Abstract: A fully differential amplifier circuit provided according to an aspect of the present invention contains a stabilization block to measure the common mode component at the output of an input stage, and to inject a current proportionate to the common mode component into each of a pair of paths forming the output of the input stage to stabilize a feedback loop formed by the input stage, an output stage and a common mode feedback block. In an embodiment, the stabilization block contains a buffer to receive the measured common mode component and to provide a buffered output. The injected current is generated based on the buffered output. Due to the presence of the buffer, the differential loop may not be affected by injection of the additional current, thereby avoiding any distortions in the output signal.

Abstract: Effective control of the common-mode level of amplifiers is obtained through control structures (both closed-loop and open-loop structures) which are directed to various amplifier functions such as the reduction of amplifier loading, accurate sensing of common-mode levels, mitigation of headroom restraints, and proper transistor biasing. This common-mode control is especially useful in multiplying analog-to-digital converters (MDACs) of signal processing systems.

Abstract: A class AB amplifier includes an input stage having a pair of differential input terminals, first and second differential output terminals, and a local common mode feedback circuit. The input stage includes a local common mode feedback circuit having cascode transistor to achieve relatively high gain. The amplifier also includes an output stage having first and second pairs complementary transistors coupled between first and second power supply nodes. One of the complementary transistors in each pair has a gate coupled to the first and second differential output terminals, respectively. The output stage includes a pair of cascode transistor connected to one of the pairs of complementary output transistors. The amplifier can be used to supply a bias voltage to a highly capacitive load, such as voltage sampling capacitors in a CMOS imager.

Abstract: To provide thin-film transistor circuits used for a driving circuit that realizes a semiconductor display capable of producing an image with high resolution and high precision without image unevenness. TFTs with small channel widths are used to form an analog buffer which comprises a differential amplifier circuit and a current mirror circuit and which is used in a driving circuit of an active matrix semiconductor display. A plurality of such analog buffer circuits are connected in parallel to secure an analog buffer that has a sufficient current capacity.

Abstract: A differential amplifier (10-1,2) includes an input stage (7) including first (M1) and second (M2) input transistors and first (4A) and second (4B) load devices. Sources of the first and second input transistors are connected together. Drains of the first and second input transistors are coupled by first (12) and second (13) conductors to the first and second load devices, respectively. Common mode feedback circuitry (6A) including first (M3), second (M4), and third (M5) transistors is combined with offset correction circuitry (8) including the second transistor and the third transistor. Sources of the first, second, and third transistors are coupled to a tail current source (11). Drains of the second and third transistors are coupled to the first and second conductors, respectively. A common mode voltage (VOCM) is applied to a gate of the first transistor. Offset trim voltages are applied to gates of the second and third transistors.

Abstract: Techniques and circuitry are provided for programmatically controlling signal offsets in integrated circuitry. In one embodiment, a buffer circuit having an offset cancellation circuit receives a signal and transmits the signal to programmable logic circuit. The programmable logic uses programmable resources and/or one or more algorithms to measure integrated circuit operations and/or operational errors associated with the offset. The control signal is fed back to an input of the offset cancellation circuit. In one embodiment, the offset cancellation circuit adjusts the offset of the signal in response to the magnitude of the offset cancellation signal received until changes associated with the offset and/or the magnitude of the operational errors are no longer attributable to the offset.

Abstract: A novel high-speed differential receiver is disclosed that provides a new method and apparatus receiving and amplifying a small differential voltage with a rail-to-rail common mode voltage. The receiver output signals are differential signals with low skew and high symmetry. This high-speed differential receiver is based on a common mode voltage normalization, which is based on a differential phase splitting methodology, before the resulting signal is recombined, normalized and amplified. The method involves using a differential signal splitting followed by a common mode voltage normalization stage, then a controlled gain transimpedance amplification, and then amplification using one or two rail to rail amplification stages that are symmetrical and balanced in nature.

Abstract: A differential amplifier includes: a constant current source; first and second field effect transistors whose respective gates are imparted with positive-phase and negative-phase input signals and whose sources commonly connected to each other, the constant current source being connected to a common node of the sources; first and second loads serving as current paths for respective drain currents of the first and second field effect transistors; an amplifying unit which outputs positive-phase and negative-phase output signals which are amplified in response to the respective drain voltages of the first and second field effect transistors; and a current path generator which generates first and second current paths parallel to the respective first and second field effect transistors for a predetermined period of time at the time of start-up of the differential amplifier.

Abstract: An operational amplifier including an input amplifier configured to amplify at least one differential input signal, a first common mode feedback amplifier configured to amplify a first common mode voltage, a cascode amplifier configured to cascode-amplify output signals from the input amplifier and the first common mode feedback amplifier, a first common mode voltage generator configured to generate a central voltage of the output signal from the cascode amplifier and input the central voltage to the first common mode feedback amplifier, and a frequency compensator configured to feedback the output signal of the cascode amplifier to the first common mode feedback amplifier so as to compensate a frequency of the first common mode feedback amplifier.

Abstract: A method and apparatus is provided for use in power amplifiers for reducing the peak voltage that transistors are subjected to. A power amplifier is provided with first and second switching devices and an inductor connected between the switching devices. The switching devices are driven such that the switching devices are turned on and off during the same time intervals. Differential RF power amplifiers are also provided with inductive networks coupled at various nodes of the power amplifiers. In some examples, techniques are used to stabilize differential power amplifiers by stabilizing common-mode feedback loops.

Abstract: An input stage for an audio power amplifier is provided. The input stage includes a fully differential amplifier and a supply-independent reference voltage generator. The supply-independent reference voltage generator provides a supply-independent reference voltage that is used as the common mode voltage of the output of the fully differential amplifier.

Abstract: A transmission line driver and a serial interface data transmission device including the same are provided. The transmission line driver includes a pre-driver configured to generate and output differential input data signals based on a serial transmission data signal, a differential amplifier configured to receive the differential input data signals and to output differential output data signals, and a common mode controller configured to drive the differential output data signals to a predetermined common mode voltage in an idle mode. Accordingly, power consumption can be reduced and a common mode specification can be supported.

Abstract: A differential audio amplification apparatus with common mode rejection is shown, having a first input current path (401) and a second input current path (402) with a shunting input resistance (400) therebetween. The apparatus also has a first output current path (403) and a second output current path (404) with a shunting output resistance (405) therebetween. Differential amplifiers (412, 413) are provided with feedback connecting the input paths with the output paths and providing an output signal. The output shunting resistance (405) is controlled to provide gain control while maintaining common mode rejection.

Abstract: A differential two-stage Miller compensated amplifier system with capacitive level shifting includes a first stage differential transconductance amplifier including first and second output nodes and an output common mode voltage, a second stage differential transconductance amplifier including non-inverting and inverting inputs and outputs and an input common mode voltage, and a level shifting capacitor circuit coupled between the first and second output nodes and the non-inverting and inverting inputs for level shifting between the output common mode voltage of the first stage and the input common mode voltage of the second stage.

Abstract: A method and system to use floating differential output amplifiers wired in series and parallel to achieve arbitrary output drive voltage and current for the applications load. One embodiment includes the use of multiple differential amplifiers wired in series to generate a high voltage differential amplifier, while only partially using no-feedback buffer amplifiers and obtaining performance equivalent to an implementation that uses only buffer amplifiers. This is achieved by forcing the mismatch errors of conventional amplifiers to become power supply ripple. A second embodiment includes the use of a power supply centering technique to implement a floating asymmetrical differential amplifier. A third embodiment includes the use of multiple floating differential amplifiers, sharing a common power supply with individual biasing and isolation of each section of the amplifier, to allow high power amplifiers to be built with an arbitrary number of low power modules.

Abstract: Fully differential amplifier circuits are described herein that set the common mode voltage as well as reduce the output offset voltage (offset cancellation). A circuit according to one embodiment includes a first section for generating first and second output signals on first and second outputs from first and second input signals, a first negative feedback loop coupled to the first section, and a second negative feedback loop coupled to the first section. A second section controls the first negative feedback loop for adjusting the first output signal towards a common mode voltage level, and for reducing an offset voltage of the first output signal in different loop bandwidths. A third section controls the second negative feedback loop for adjusting the second output signal towards the common mode voltage level, and for reducing an offset voltage of the second output signal in different loop bandwidths.

Abstract: A method, apparatus and system of constant output common mode voltage of a pre-amplifier circuit are disclosed. In one embodiment, a system includes a first circuit, a comparator circuit coupled with an output of the first circuit, a pre-amplifier circuit of the comparator circuit, a tracking circuit coupled with a common output location of the pre-amplifier circuit to provide (e.g., source/sink) an additional current to the common output location of the pre-amplifier circuit using an alternate current path in the tracking circuit when an input common mode of the pre-amplifier circuit is beyond a saturation range, and a second circuit of the comparator circuit coupled with the pre-amplifier circuit. A scaled version of a pair of input transistors of a pre-amplifier circuit of the tracking circuit may be created using a scaling factor (‘N’).

Abstract: System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.

Abstract: One embodiment of the invention includes a differential amplifier circuit. A first input stage generates first and second control voltages in response to a differential input signal. A second input stage generates third and fourth control voltages in response to the differential input signal. The first and second control voltages can be inversely proportional and the third and fourth control voltages can be inversely proportional. The circuit also includes a first output stage that is configured to set a magnitude of a first output voltage of a differential output signal at a first output node in response to the first and second control voltages. The circuit further includes a second output stage that is configured to set a magnitude of a second output voltage of the differential output signal at a second output node in response to the third and fourth control voltages.

Abstract: PMOS transistors are interposed parallel to each other between a node, which is a first output part, and a power supply; and PMOS transistors are interposed in parallel to each other between a node, which is a second output part, and the power supply. Output voltages in time of a balanced state in which an input potential difference between an input voltage and a reference voltage is “0” are both set to a reference output common voltage by a replica circuit and a comparator. The reference output common voltage of the replica circuit is set so that the potential difference between the power supply voltage and the output common voltage becomes a value lower than a threshold voltage of the diode connected PMOS transistors.

Abstract: The present invention relates to an amplifier circuit and system, and to a method of compensating a gain imbalance generated in a complementary amplifier stage with first and second amplifier means (22, 24) in a bridge configuration. A compensation offset current is generated in response to the values of input signals supplied to respective inputs of said first and second amplifier means, and the compensation offset current is injected to a junction node between the inputs of the first and second amplifier means (22, 24). Thereby, it can be ensured that the gain of the first and second amplifier means does not depend on the kind of input signals, i.e. balanced or unbalanced input signals. An automatic gain correction can thus be achieved and the requirement of additional control signals or control terminals for selection of gain control circuits depending on the kind of input source or input configuration of the amplifier circuit can be dropped.