Abstract: An amplifier having a high input dynamic range as well as high CMRR and PSRR values and input impedance while using a single supply voltage, includes an input stage with two transistors which are biased by a constant current, preferably of less than 1 microampere, while the collectors of the transistors are kept at fixed reference voltages. The input signal applied between the emitters of the transistors is transferred to the terminals of a first resistor which is supplied with current from a circuit which mirrors the current into a second resistor, from the terminals of which the output signal is taken.The preferred application is for forming interfaces for lambda probes fitted to catalytic converters for motor vehicles.

Abstract: Disclosed herein is a magnetic read/write circuit which causes only small fluctuation of an output offset in mode switching. When a head (HD3) is switched to a head (HD6) in read mode, amplifiers (2) and (5) are turned off and on respectively. An offset caused by the amplifier (5) is reduced by negative feedback which is provided by an offset detection circuit (46) and an offset adjusting circuit (5) so that an amplifier (19) will not enhance an offset caused by difference between the amplifiers. During a constant period after mode switching, outputs of an amplifier (40) are transmitted to differential output terminals (26, 27). Input ends of the amplifier (40) are so shorted that an offset of the outputs thereof is suppressed small. After a lapse of the constant period, the outputs of the amplifier (19) are transmitted to the differential output terminals (26, 27).

Abstract: An amplifier including first and second input transistors which are connected to respective first and second feedback amplification circuits associated with respective frequency-compensating capacitances. The second feedback amplification circuit has a two-stage structure and includes an internal compensating capacitance. The three frequency-compensating capacitances can have low values and can thus conveniently be integrated in the same chip as the amplifier. The amplifier can be used, in particular, as an interface between a zirconium-dioxide oxygen sensor and an electronic control unit which have different earth conductors.

Abstract: There is provided a composite differential amplifier with a lower voltage and a lower power consumption of the circuit thereof. An output of a differential amplifier is inputted into an emitter-follower and is delivered as a DC voltage from an emitter of each of transistors of the emitter-follower to a non-inverting input terminal or an operational amplifier. Then, an output of the operational amplifier is supplied to a variable current source. The variable current source at its current drain side is connected to a resistance side of the differential amplifier so that an external control voltage inputted to the non-inverting input side of the operational amplifier is equal to the DC output voltage of the differential amplifier.

Abstract: A distortion correction circuit having a mechanism for intercepting a distorted output signal from a receiver and for generating an Nth order signal. A circuit is provided to subtract the Nth order signal from the distorted output signal for providing a circuit output signal. Finally, a feedback loop is provided to feed back the circuit output signal for controlling the Nth order signal and for providing a distortion corrected circuit output signal. In a preferred embodiment, the distortion correction circuit includes a calibration circuit which provides a calibration signal employed to linearize a receiver channel. The receiver channel includes a plurality of receiver stages which receive the calibration signal and provide the distorted output signal which is intercepted and directed to a cubing circuit. The cubing circuit generates an error correction signal controlled by the feedback loop to cancel the distortion component of the distorted output signal.

Abstract: Sample and hold circuits are used to detect a DC component of an AC signal on an amplifier's output to generate a feedback signal that is applied to the amplifier's input to cancel out a DC component of an AC input signal. The sample and hold circuits detect the peak excursions of the AC output signal and apply the stored peaks to averaging circuitry which determines the magnitude of the DC component of the output signal.

Abstract: A VCA circuit is used at an input stage of communication device, an OA device or the like. The VCA circuit includes an output varying circuit which distributes a current supplied from a power supply side in accordance with a predetermined coefficient. The VCA circuit also includes an operational amplifier provided on an input side of the output varying circuit, and a feedback resistor connected between one of two input terminals and an output terminal of the operational amplifier. An input signal is applied to one of the two input terminals of the operational amplifier, a signal output from the output varying circuit is applied to the other input terminal. An output signal of the VCA circuit is drawn from the output terminal of the operational amplifier.

Abstract: A variable gain amplifier is provided which includes a pair of common emitter circuits. A resistance between the collectors of a pair of transistors included within the common emitter circuits is reduced by a variable resistance used for DC level correction which is connected in parallel with a variable resistance used for gain adjustment which is connected between the collectors, thereby reducing the degree of correlation between the width of a variable range of gain and a bandwidth.

Abstract: A wideband amplifier circuit having automatic offset voltage and gain control, the circuit comprising a main amplifier chain, a negative feedback loop for controlling gain, and a negative feedback loop for controlling and cancelling any possible offset voltage at its output, said main amplifier chain including a gain control amplifier block having a gain control input connected to the gain control negative feedback loop; wherein the gain control amplifier block is preceded in the main chain by a symmetrizer-adder block of fixed gain having a first input constituting the input of the amplifier circuit and a second input connected to the negative feedback loop for controlling and cancelling any possible offset voltage at the output.

Abstract: An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. According to a first embodiment, feedback circuits are coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. According to a second embodiment, a single feedback circuit controls the voltage at a first node and the same feedback circuit maintains the voltage level of a second node at a constant level.

Abstract: A dynamically limited amplifier including an operational amplifier having both non-inverting and inverting input terminals, an output terminal, and dynamic limiting circuitry connected between the inverting input and output terminals of the operational amplifier. The dynamically limiting circuitry operates to supply a feedback current between the output terminal of the operational amplifier and the inverting input terminal of the operational amplifier, whenever the output voltage of the operational amplifier exceeds a threshold potential.

Abstract: A fully differential operational amplifier has a high DC gain and a high common mode feedback gain and produces an output voltage with rise and fall times shortened to the same extent. The operational amplifier comprises a first stage composed of MOS transistors M21 through M9, a drive stage composed of MOS transistors M10 through M17, and a phase-compensating circuit composed of MOS transistors M18, M19 and capacitive elements C1, C2. The drive stage is of a push-pull configuration of the MOS transistors M10 through M15 and the MOS transistors M16, M17. The above circuit arrangement increases the DC gain and the common mode feedback gain and shortens the rise and fall times of the output voltage to the same extent.

Abstract: An apparatus automatically corrects for DC offset in a multi-level packet-switched receiver. A reference carrier frequency is used during the receiver's idle mode to establish a DC offset exiting a discriminator (302). The DC offset is amplified by a video amplifier (315) and fed into an error amplifier (320) which generates the negative of the DC offset. The DC offset and the negative of the DC offset are input into a summing network (330) resulting in a zero DC offset exiting the video amplifier (315).

Abstract: The output stage of a differential operational amplifier includes a source follower amplifier and a common source amplifier which are driven by two complementary outputs of a differential input stage. Continuous-time feedback circuits are provided to set the quiescent biasing conditions accurately. The differential operational amplifier has a low output impedance and a large output voltage swing with negligible open loop gain degradation when the size of the load resistance is varied. Floating compensation capacitors reduce the total capacitor value and the physical area needed for the operational amplifier.

Abstract: A low-noise preamplifier stage, in particular for magnetic heads, which comprises an input stage comprising a differential circuit and a single-transistor output stage, wherein the differential stage has an intrinsic offset voltage, is ground-connectable and can be directly coupled to the magnetic head, the two transistors forming the differential circuit having different bias currents in order to reduce the input equivalent noise, the base terminal of the first transistor of the differential circuit defining an input of the stage which can be connected directly to a terminal of the magnetic head, the other terminal of the head being connected directly to the ground, the base terminal of the other transistor of the different circuit being connected to the intermediate point of a pair of resistors which are mutually connected in series between the single transistor of the output stage and a line at reference voltage, so that the differential stage biases the output with its offset voltage without requiring add

Abstract: A reference voltage generator is presented for use in a differential amplifier. The reference voltage provided by the generator tracks the non-signal dc conditions of a differential input stage and provides a reference voltage to a level-shifting stage so that feedforward compensation can be used to provide extended bandwidth without settling time problems.

Abstract: A digital to analog converter comprising a differential amplifier formed of a pair of similar conductivity type field effect transistors, one transistor being connected to a load for driving the load in synchronism with a digital input signal, means for applying a reference voltage to the gate of the second transistor, and a third field effect transistor of conductivity type complementary to said one transistor, connected with its source-drain circuit in series with the source-drain circuit of the second transistor to a second reference voltage, and means for driving the gates of said one and third transistors together with said digital input signal, whereby the first and third transistors are synchronously and oppositely driven to conduct and cut off, thus ensuring substantially no current flow in the second transistor while the first transistor is conducting.

Abstract: An operational amplifier input stage includes two transistors coupled as a differential amplifier to receive input signals. At least one transistor is stacked in a load circuit of each input transistor for the purpose of lowering the voltage across each transistor. In order to eliminate the effects of error currents resulting from conventional resistor self biasing of the stacked transistors, two nodes, to which the input transistors are coupled, are identified. A feedback circuit is coupled to each node and each feedback circuit maintains the coupled node at a voltage level established by the feedback apparatus of the operational amplifier. The disclosed circuit eliminates circuit drift and offset voltages resulting from changes in common mode and/or power supply voltages by eliminating the effects of resistive loading on the input stage components.

Abstract: An amplifier arrangement includes a transistor differential pair (N1, N2) having an input terminal (3) and an output terminal (4). The transistor differential pair is coupled to a current mirror (P1, P2). A first level shifting circuit (6) and a second level shifting circuit (7) stabilize the d.c. voltage levels on the mutually coupled main electrodes of the differential pair (N1, N2) and the current mirror (P1, P2) respectively. Consequently, the influence of the Early-effect on the differential pair is suppressed and an improved linear signal transmission is obtained from the input terminal (3) to the output terminal (4). The level shifting circuit (6) also provides a base current compensation in order to produce a high input impedance and the second level shifting circuit (7) provides a base current compensation for equal adjusting currents through the differential pair to reduce any offset voltage.

Abstract: An amplifier circuit includes a negative feedback connected amplifier and a series circuit comprising a capacitor, one end of which is connected to an output terminal of the amplifier, and a resistor, one end of which is connectable to a reference potential. A comparator is provided which has first and second inputs and one output. The first input is connected to a junction between the capacitor and the resistor, the second input is connected to an output of the amplifier, and the output of the comparator is connected to one input of the amplifier. The comparator does not react to an AC signal of a specific frequency band, but operates to set the output offset voltage only to one fractional part of the transition gain, and therefore operates to accomplish offset compensation without using a large capacitor.

Abstract: An optical encoder, having an offset adjustment function for causing light receiving element outputs to have the same direct current component level, and capable of greatly reducing an adverse affection by noise, to thereby generate an accurate position signal. A combined signal (i10), generated in a third electric current mirror circuit (T17-T19) for receiving output currents (ia11, ia12) from light receiving elements (A11, A12) through first and second electric current mirror circuits (T11-T13, T14-T16) and serving as a feedback signal (i10', i10") for eliminating an offset between direct current components of the output currents of the light receiving elements, is superimposed through a variable resistor (VRa1) on these output currents.

Abstract: A precision amplifier that, in response to digital inputs, zeros its offset voltage. The precision amplifier comprises a traditional amplifier; a current source controlled by a counter; a comparator; test switches; and control logic. A digital input, such as might be generated from a microprocessor, initiates the offset adjustment. The test switches disconnect the amplifier inputs from external package connections and connect the inputs together. The counter begins to count, changing the current produced by the current source at each count. The current from the current source is applied to the offset adjust circuit of the amplifier which changes the offset voltage as the current changes. The counter counts until the comparator indicates the offset voltage has been zeroed. Alternative embodiments allow the precision amplifier to adjust for offset introduced by circuitry connected to the input and the output of the precision amplifier.

Abstract: By the use of a feedback arrangement, deleterious circuit effects of an isolation transformer in a terminal device for a telephone line can be eliminated. By this arrangement, a smaller, cheaper transformer may be used. A terminal device employing such arrangement can present a balanced termination to a telephone line, exhibit a known and controlled impedance to that line and provide for signals to be coupled to and from that line.

Abstract: An integratable amplifier circuit includes a preamplifier stage, a drive stage, a push-pull end stage, and a regulating stage forming a differential value from a reference current and from a measurement current proportional to the static current flowing through the push-pull end stage. The regulating stage stores the diferential value or a value proportional thereto upon the occurrence of a control signal at a control input indicating the non-level control of the preamplifier stage and sets the static current of the push-pull end stage by varying the operating point of the push-pull end stage as a function of the stored value.

Abstract: A combined current difference and operational amplifier circuit (10) for use either as or in a filter embodied in an integrated receiver includes inputs (I.sub.A and I.sub.B) for oppositely phased current signals which are applied to a current mirror circuit formed by first and second NPN transistors (Q1,Q2) having their bases connected to a junction (20). Equal value resistors (R1,R2) are serially connected in the emitter circuits of the first and second transistors, respectively and the current inputs are coupled to the free ends of the resistors. The base-collector path of a third NPN transistor (Q3) is connected between the free end of one of the resistors (R1) and the junction (20). A current difference signal (i.sub.b -i.sub.a) derived from the free end of the other one of the resistors is applied to the virtual ground input of an operational amplifier formed by a common emitter stage (Q4) coupled to an emitter follower (Q5).

Abstract: An integratable amplifier circuit includes a differential amplifier stage having a non-inverting input being acted upon by a first reference potential, an inverting input being acted upon by an input current, a non-inverting output, and an inverting output. A capacitor is connected between the non-inverting output and ground potential. A current source is connected between the inverting output and a supply potential. A first transistor of one conduction type has a collector connected to the supply potential, a base connected to the non-inverting output, and an emitter. A second transistor of the other conduction type has a collector connected to the inverting input, a base being acted upon by a second reference potential, and an emitter. A resistor is connected between the emitters of the first and second transistors.

Abstract: Integrated circuit amplifier (10) implements unity voltage gain and its current gain is determined by the ratio of integrated circuit resistors (R1, R2). Amplifier input stage (Q1, Q2, Q4-Q7) has a pair of transistors (Q4, Q5) connected as a differential amplifier. An output transistor (Q13) connected to the collector of one (Q4) of the differential transistors amplifies the differential signal from the input stage and provides an output signal (at terminal 22). Current mirror circuitry (Q12, Q9) develops a current mirror signal (at 24) corresponding to current drawn through the output transistor (Q13). A load balancing circuit (Q8, Q3, R8) includes a transistor (Q3) having an input terminal directly connected to and loading the collector of another one (Q5) of the differential transistors. This configuration results in equal impedance and current loading for each of the collectors of the differential transistors (Q4, Q5).

Abstract: Described is an improved differential amplifier arrangement with a temperature compensated feedback circuit which sets and stabilizes the DC bias point of the amplifier. The circuit averages the two outputs of the amplifier and generates a DC voltage which is compared with a reference voltage to generate a control signal which is amplified and is used to control the bias point of the amplifier.

Abstract: A transistor circuit comprising a first differential amplifier which is composed of a differential pair and a current mirror. The transistor circuit further comprises a second differential amplifier which measures a differential offset voltage in the first differential amplifier and reduces this offset voltage by means of common mode current feedback. The transistor circuit thus provides a stable amplifier having a high speed and a low offset voltage which can be used advantageously in a logic output buffer so that, for example, an ECL output buffer can be realized in CMOS.

Abstract: An operational amplifier circuit comprises a differential input stage (22) and an output transistor (N3) driven by an output (24) of the differential input stage. Means (N4, P3, P5) for generating a bias current for the differential input stage are constructed so that in operation the bias current is in a predetermined proportion to the current flowing in the output transistor (N3) and is substantially independent of the impedance (Z) of any load driven by the output transistor, thereby eliminating a systematic offset error. The means for generating the bias current may include a further transistor (N4) driven by the output of the differential input stage.

Abstract: An output amplifier having a pair of controlled current generators each with an output impedance that is electrically connected to the other, a pair of output controllers each of which is across a corresponding one of the output impedances, and a pair of feedback impedances each connected from a corresponding one of the output controllers to a corresponding one of the controlled current generators. A differential amplifier is provided ahead of the controlled current generators with the amlifier input capacitively connected to the input of such differential amplifier. An offset adjuster is provided between the output impedances having its output connected to the capacitively connected differential amplifier input. A current feedback arrangement is provided between the output impedances and connected to the controlled current generators to be capable of altering currents generated thereby.

Abstract: A high current drive integrated circuit amplifier in which the quiescent currents in the output transistors are controlled by control current signals which are applied to respective input signal amplifiers and which are of values determined by currents flowing in respective current sensing transistors associated with the output transistors. The control arrangement ensures that the output transistors can not be driven to a non-conducting condition.

Abstract: An operational amplifier of the folded cascode type is disclosed and includes a differential input stage, connected with a differential to single ended output stage, a current mirror is interconnected with both stages for maintaining a precise relationship between bias current in the two stages.

Abstract: A CMOS complementary, self-biased, differential amplifier provides for a rail-to-rail common-mode input-voltage range of operation. A self-biasing scheme is used to provide negative feedback to the amplifier in order to assist in providing a common-mode rejection but providing high gain amplification for differential-mode amplification.

Abstract: An output circuit built in a semiconductor integrated circuit having an output terminal comprises a first transistor having a base and a collector connected to the output terminal, a second transistor having a collector connected to a power source circuit, an input signal source connected to the emitters of the first and second transistors, and a DC amplifier circuit having an input end connected to the output terminal and an output end connected to the base of the second transistor, and operated according to a preset bias potential. A signal occurring at the output terminal is fed back to the base of the second transistor via the DC amplifier circuit.

Abstract: A chopper stabilized analog-to-digital converter includes an analog modulator (10) and a digital filter (12). The analog modulator (10) is comprised of two integrators (20) and (22). The first integrator (20) is a chopper stabilized integrator which is comprised of a chopper stabilized differential amplifier (32) and a capacitively switched input. The amplifier (32) is operable to receive a chopping frequency F.sub.CH that is one-half the sampling frequency F.sub.S and synchronized thereto. The amplifier (32) is operable to modulate the noise up to the chopping frequency F.sub.CH, which frequency is in the rejection portion of the filter response for the digital filter (12), thus rejecting 1/f noise.

Abstract: An apparatus for separating dc current and ac current signal portions of a composite signal. The apparatus has a main current path for carrying the composite signal. This path splits into a dc current path and into two dc blocked ac current paths. At the node a virtual ground potential for the ac current signal portions is generated with the aid of an inverting amplifier with negative feedback located in one of the ac current paths. Thus, only the dc current portions flow over the dc current path. In a preferred embodiment, the dc blocking is implemented by a capacitor in each ac current path, and the inverting amplifier is an operational amplifier, whose non-inverting input is at ground potential, whose inverting input is connected with the respective capacitor and whose output is connected both with the inverting input via an ohmic negative feedback resistor and with an impedance in the other ac current path.

Abstract: A substantially zero average DC output voltage is obtained in an instrumentation amplifier without degrading the gain by detecting the output of the amplifier and operating a non-galvanically coupled device responsive to the detected output to apply feedback to the amplifier for balancing out common mode output voltages.

Abstract: A voltage follower input stage having a correction or bootstrap circuit to effectively remove the parasitic capacitance by bootstrapping the capacitance so that both sides of the parasitic capacitance follows voltage level changes.

Abstract: An amplifier includes two differential amplifiers which are connected to an output stage comprising two field effect transistors of opposite conductivity typed directly coupled in series between opposite poles of a DC voltage source. The junction between the two output transistors constitutes the output of the amplifier. A negative feedback loop connects the amplifier's output to the inputs of the differential amplifiers. A correction arrangement is provided to prevent excessive current consumption and cross-over distortion. Preferably, the correction arrangement uses a pair of current mirror circuits to generate respective measuring currents proportional to the current in each of the output transistors. Each such measuring current is compared with a reference current.

Abstract: A variable frequency characteristic circuit to be used in compensating the frequency characteristics in an audio device in a vehicle. A single operational amplifier is used. Different resonance circuits of different frequencies are connected from ground to either the inverting or non-inverting inputs in order to provide local peaks and dips. Two variable resistors are connected in parallel between the inverting and non-inverting inputs. Different resonance circuits of different frequencies are connected from ground to center taps of the variable resistors to provide treble and base control.

Abstract: An apparatus for nullifying the differential output offset voltage between the outputs of a differential amplifier and for setting the DC levels of the outputs to a known reference voltage includes a circuit which cross-couples the opposing AC output signals to obtain only the DC components of each signal. The apparatus further includes a first operational amplifier to generate a compensation voltage from the DC components of the outputs of the differential amplifier proportional to the amount of offset between the DC components of the outputs of the differential amplifier. The compensation voltage is fed back to the offset control inputs of the differential amplifier to reduce the differential offset voltage to substantially zero volts. The apparatus further includes a dual voltage divider network having a second operational amplifier that supplies a variable reference voltage to one terminal of each leg of the voltage divider network.

Abstract: A method and apparatus for automatically restoring the DC signal level of recorded servo information which has been electronically recovered from a rotating disk storage device has a high gain differential amplifier which is connected to sense the DC level of the signal relative to a reference potential, and generate an error current. The resultant current is integrated to generate a potential and corresponding current, which is then applied via a feedback loop to adjust the DC level of the input signal. DC restoration is performed without altering the bias conditions of the preceeding amplifier stages, and is not dependent on waveform symmetry.

Abstract: An amplifier is provided for supplying a single output signal responsive to applied differential input signals applied to respective inputs thereof. The amplifier includes a differential input section having inputs coupled respectively to the inputs of the amplifier and a closed feedback loop including only NPN transistors which is coupled between the output of the differential input section and one of the inputs of the amplifier for providing a feedback signal to force the voltages at the inputs of the amplifier to be equal. In addition, the signal output signal is produced at an output of the closed feedback loop.

Abstract: The precision operational amplifier of the invention has at least two stages, a first input differential stage and a second high gain stage having its input coupled to the output of the first stage. A digital control circuit coupled to the output of the second stage is used to supply a correction signal to the first stage, the correction signal being calculated to compensate for the offset voltage of the first stage. A digital representation of the correction signal is stored so that it may continuously be applied to the first stage, whereby the offset voltage of the first stage is substantially reduced and such reduction can be maintained for long periods of times. In a preferred embodiment, the digital circuit supplies a second independent correction signal to the second stage. That signal is also stored so that it may continuously be applied to the second stage, whereby the offset voltage of the second stage is substantially reduced and that reduction too can be maintained for long periods of time.

Abstract: A high-frequency differential-amplifier stage. The collectors of the transistors (T.sub.1, T.sub.2) are connected to the emitters of two transistors (T.sub.3, T.sub.4) coupled to provide feedback between their collectors and their bases and which are biased by means of resistors (R.sub.1, R.sub.2). This input stage forms a resonant circuit. Two current sources (R.sub.32, T.sub.32, R.sub.31, T.sub.31) improve the operation of this stage in the saturated mode.

Abstract: A resonance compensated unity voltage gain amplifier comprises an input stage and an output stage connected in feedback to the input stage and a series resonance circuit for compensating for the resonance of the output and input stages created by the feedback. Reactance of the series resonance circuit is adjusted to be substantially zero at the resonant frequency of the amplifier. The resonance compensated amplifier is incorporated into a gain selectable amplifier. The resistance on the output stage of the amplifier across which the input voltage is applied via the output voltage may be selectively varied to change the current gain of the amplifier.

Abstract: A CMOS output stage with large voltage swing particularly suited for output buffers in monolithic analog subsystems has two, push-pull connected, complementary MOS transistors and has feedback for improving its swing and linearity characteristics in comparison with those of the output stages without feedback of the prior art and also has sufficient stability characteristics which are re-established by local compensation. Furthermore the quiescent current is stabilized by a dedicated control circuit cooperating with a local feedback circuit.

Abstract: An optical receiver comprises a plurality of sequentially-connected, symmetrically-constructed operational amplifiers having two complementary outputs. For the determination of the operating points and for suppressing the offset voltages, one output of each amplifier is connected by way of a negative feedback path to the second input of the first amplifier, whereas the useful signal is supplied to the first input of the first amplifier.

Abstract: A precision differential amplifier having unity-gain buffer amplifier input stages on each side of the amplifier includes a primary feedback path between the collector and base of the inside buffer amplifier transistor which operates when the differential amplifier is operated within its linear operating range. Under an overdrive signal condition, the primary feedback path is opened and a secondary feedback is activated to control the collector and base of the inside buffer amplifier transistor, thus preventing saturation of the inside buffer amplifier transistor and cutoff of the outside transistor. The primary and secondary feedback paths consist of only semiconductor junctions, minimizing heat and loading effects, reducing power supply voltage requirements, and facilitating rapid overdrive recovery.