Abstract: This amplifier is intended for amplifying variable signals superimposed on a continuous signal. This continuous signal serves in particular for biasing a component, a magnetoresistive resistor used as a hard disk reading head. To avoid the harmful effects of a sudden fluctuation in the continuous signal, this amplifier comprises a set of switchable reactive elements (70) for acting on said transfer function and a bias drift compensation circuit (80) for controlling the switching of said switchable elements with a view to anticipating the effects of said fluctuation.

Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: A DC offset compensation circuit, and method thereof are capable of reducing the settling time of an output signal through fast compensation of a DC offset of the output signal although a DC voltage of an input signal varies in a closed loop operational amplifier. The DC offset compensation circuit of a closed loop operational amplifier includes a first closed loop operational amplifier and a second closed loop operational amplifier. The first closed loop operational amplifier amplifies an input signal based on a compensation voltage. The second closed loop operational amplifier amplifies a signal output from the first closed loop operational amplifier based on a reference voltage to generate a final output signal.

Abstract: A circuit arrangement comprising an input amplifier stage (31) with two inputs (36, 37) and an output (34) being connectable to an input (35) of an output amplifier stage (32). The circuit furthermore comprises a comparator (33) with a first input (41), a second input (42) and a comparator output (44), a feedback capacitor (43) connected to an offset tuning input (45) of the input amplifier stage (31), and a plurality of switches (S1, S2) that are controllable by switching signals (V1, V2) to allow the circuit to be switched from a first phase to a second phase. During the first phase (1), the output (34) and the input (35) are separated by a first one of the switches (S2) and the two inputs (36, 37) are connected via a second one of the switches (S1).

Abstract: Methods and apparatus of amplifying signals. One method includes receiving a variable power supply, generating a variable bias current, and applying the bias current to a load such that an average output voltage is generated. The method further includes receiving an input signal, generating a current proportional to the input signal, and subtracting the current from the variable bias current. As the variable power supply changes value by a first amount, the variable bias current is varied such that the average output voltage varies by the first amount.

Abstract: A transconductor circuit, including a differential transconductor amplifier circuit. The transconductor circuit includes an input pair of transistors adapted to receive a differential input voltage, as well as a pair of output terminals adapted to provide a differential output current. A second pair of transistors provides current to the input pair of transistors. A floating voltage circuit is adapted to generate a floating voltage corresponding to a common-mode voltage of the differential output nodes and to control the second pair of transistors in response to the floating voltage to stabilize the common-mode voltage of the differential transconductor amplifier circuit.

Abstract: A two stage amplifier circuit (10), the first stage (12) comprising a modified quad configuration and the second stage (14) comprising a translinear current amplifier configuration. The present invention achieves the advantages of fast response time, low distortion and improved bandwidth. The current gain of the second stage is represented by: (IAout1−IAout2)/(Iout1−Iout2)=(1+R123/R124)·(I135/I134)·(A/(1+A)) where A=gmQ109·R124.

Abstract: The stage includes two channels each connecting an input to an output. Each channel includes a first device for adding to the input voltage of the channel concerned a feedback voltage from the other channel to the channel concerned. For remote power feeding a terminal, the stage further includes respective means in each channel for adding a DC voltage to the output voltage of that channel. The feedback voltage is a function only of the AC component of the output voltage of the first device of the channel concerned. Application to telephone exchanges.

Abstract: An apparatus consisting of a variable gain amplifier having an input and an output having a DC-offset compensation loop connected between the output and the input of the variable gain amplifier. The DC-offset compensation loop having a gain independent cutoff frequency.

Abstract: A signal processor which provides non-linear transfer functions provides a processor output and non-linear inflection points that are referenced to a common bias. The processor output and the non-linear inflection points each exhibit rejection to time variant common-mode variations.

Abstract: An offset voltage at an output of a differential amplifier is compensated for by a control circuit having a digital setting device. The control circuit has a control device which is controlled by an offset voltage of the differential amplifier and which feeds an offset compensation signal into the differential amplifier. Compared with analog compensation with an external storage capacitor, temporal drift effects do not distort the offset compensation on the differential amplifier. The described principle can be applied, for example, in radio frequency receiver circuits.

Abstract: Wireless communications devices must handle a wide range of useful signal levels and must also cope with large interfering signals of nearby frequencies. They often use transconductance amplifiers/filters as building blocks as such amplifier/filters exhibit good characteristics of both amplification and filtering. The transconductance cells described make use of feedbacks which involve no signal conversions. As the result, the cells have high linearity and yet can operate at low voltage.

Abstract: A level shift circuit and method for level shifting the common-mode voltage of a power-supply-referenced circuit to the common-mode voltage of a ground-referenced circuit. The level shift circuit and method entails performing a common-mode level shifting of input complementary signals derived from the power-supply-referenced circuit to produce output complementary signals for the ground-referenced circuit. Because the level shifting is performed in a common manner (i.e. the level shift or voltage drop is common to both complementary signals), pulse-width distortion is substantially reduced if not eliminated. The level shift circuit includes a voltage drop device common to both sides of a differential pair to produce the desired level shift of the output complementary signals. Yet another embodiment relates to a multi-stage level shift circuit and method for level shifting in steps an input common-mode voltage to an output common-mode voltage.

Abstract: An integrated circuit input buffer is provided, which includes a differential buffer, first and second average value circuits and a feedback amplifier. The input buffer is selectively operable in a differential operating mode and a single-ended operating mode. The differential amplifier has first and second buffer inputs and first and second buffer outputs. The first and second average value circuits have inputs coupled to the first and second buffer outputs, respectively. The feedback amplifier has first and second differential inputs coupled to outputs of the first and second average value circuits, respectively, and has an amplifier output. The amplifier output is coupled to the second buffer input when the input buffer is in the single-ended operating mode and is decoupled from the second buffer input when the input buffer is in the differential operating mode.

Abstract: The amplifier circuit includes differential amplifier circuits (3 to 4); a peak detector circuit (7) for detecting a peak value of an output voltage of a differential amplifier circuit 4 of the last stage; an offset compensation voltage generator circuit (8) for generating an offset compensation voltage for offset compensation on the basis of a detection result of the peak detector circuit (7); and an offset output limiter circuit (9) for limiting the offset compensation voltage generated by the offset compensation voltage generator circuit (8) into a predetermined range and feeding back the limited offset compensation voltage to a differential amplifier circuit (3) of the first stage.

Abstract: A variable gain amplifier is described which comprises a first device to which a first control signal (Vc, Vc1) is applied so that the gain (Ai1, Ai) of an output signal (iout, io) of the first device (11, 22, Q45-Q48) with respect to a first input signal (in, i1, ir) is a function of the exponential type of the first control signal (Vc, Vc1). The amplifier comprises a feedback network (25, Q51-Q58) connected between an output terminal and an input terminal of the first device (22, Q45-Q48) so as to assure that the gain (Ai) in decibel of the first device (22, Q45-Q48) is a linear function of the first control signal (Vc1).

Abstract: An apparatus for effecting high speed switching of a communication signal between a first component and a second component includes: (a) a switching circuit configured for receiving the signal from the first component that includes a plurality of switch elements responding to the signal to produce an interim signal that is substantially a model of the signal; (b) a follower circuit having an input locus coupled with the switching circuit for receiving the interim signal; the follower circuit has an output locus configured for presenting an output signal that is substantially duplicating the interim signal; and (c) a control circuit coupling the follower circuit with the switching circuit and receives a feedback signal from the follower circuit representative of the output signal; the control circuit responds to the feedback signal to effect operation of the switching circuit to control at least one first parameter relating to the interim signal.

Abstract: A system is provided for correcting start-up deficiencies in an amplifier. The system includes a comparing device configured to (i) receive a second circuit node voltage and a reference voltage as inputs, (ii) compare the received second circuit node voltage and the reference voltage, and (iii) produce a compensating voltage signal based upon the comparison. Next, an active device has a control terminal connected to an output port of the comparing device and is configured to receive the compensating voltage signal. The active device also includes an output terminal connected to the control terminal of the second active device, and a common terminal connected to a first circuit node. Another active device has a control terminal connected to the output port of the comparing device and is configured to receive the compensating voltage signal. The other active device also has an output terminal connected to the control terminal of the first active device, and a common terminal connected to the first circuit node.

Abstract: A data receiver circuit having a comparator that exhibits substantially variable offset that is controllable to represent a variable reference level, without a separate input to receive a reference voltage level. The comparator output provides an indication of the comparison between a fixed voltage level applied to its differential signal input and the variable reference level. While changing an offset code that is fed to an offset control input of the comparator, and while applying a fixed voltage level that represents a symbol in the transmission line analog signal, a value of the offset code which causes the output of the comparator to change states is captured. A similar process may be repeated for different symbol values that can be transmitted, such that an indication of the voltage margin may be obtained as a difference between two captured offset codes. Circuitry to perform the process may be provided on-chip to the receiver circuit.

Abstract: An amplifier circuit includes a first input device coupled to a first input node and controlling a first current, a second input device coupled to a second input node and controlling a second current, a current source device coupled to a bias node and controlling a summed current of the first and second currents, a current mirror circuit, a first feedback circuit, a second feedback circuit, and a capacitor. The current mirror circuit generates a load current by mirroring the first current so as to provide an output signal voltage to an output node couple to the second output node. The first feedback circuit supplies a mirrored first current to the bias node, and the second feedback circuit pulls a mirrored second current from the bias node. The capacitor is coupled to the bias node and provides the bias voltage to the current source device.

Abstract: First and second differential transistor pairs, where each may be intentionally unbalanced or balanced, are provided. First and second variable current generators are coupled to control respective tail currents of the first and second differential pairs. A switch circuit is coupled to equalize the voltages of the respective tail current nodes. Applications of the amplifier circuit include sense amplifiers and comparators.

Abstract: A differential amplifier includes a source coupled differential pair of transistors. A feedback loop detects the presence of an input referred offset in the differential amplifier and modifies a body bias voltage on at least one of the transistors in the differential pair. A comparator detects a differential output voltage when the differential input voltage is set to zero. In some embodiments, a charge pump in the feedback loop injects charge on the body of the transistor to modify the bias voltage. In other embodiments, a digital-to-analog converter receives a digital control word and produces a bias voltage on the body of the transistor.

Abstract: According to an embodiment, an equalization loop has a comparator with an input to receive a transmission line analog signal level. The comparator has a substantially variable offset that is controllable to represent a variable reference level. An output of the comparator provides a value that represents a comparison between the transmission line analog signal level and the variable reference level.

Abstract: The operational transconductance amplifier comprises a MOS field-effective transistor that controls the mutual conductance. The central voltage measurement circuit and the voltage addition circuit shift a gate voltage of the MOS field-effective transistor by an amount equal to the deviation of a source voltage of the MOS field-effective transistor caused by an input offset voltage Voff.

Abstract: A differential amplifier with an emitter follower input stage includes an RC network which provides negative common mode feedback to stabilize the emitter follower stage. The feedback network provides negative common mode feedback from collector to base of the emitter follower transistors.

Abstract: A noise shaped differential amplifier having a reduced common mode signal in accordance with an embodiment of the invention is described. In the described embodiment, the noise shaped differential amplifier includes a noise shaper having a common mode signal controlled by an attenuation operational amplifier that is coupled to a voltage divider circuit and a sense resistor divider. In this arrangement, the attenuation operational amplifier controls a virtual ground applied to the sense resistor divider.

Abstract: A novel operational amplifier is disclosed which is divided into an input stage, a common mode feedback stage and an output stage. The output of the operational amplifier swings rail to rail, and the input may swing nearly rail to rail. The operational amplifier combines fast response with low power consumption and low supply voltage.

Abstract: A voltage buffer and follower includes a single ended output, a source follower, and a current feedback loop. The current feedback loop is coupled to the source follower and to the single ended output. When two voltage followers are used in a differential configuration, the voltage followers can become part of a high bandwidth gain cell. The high bandwidth gain cell includes a first and a second source follower circuit that are coupled to the first and the second current feedback loops, respectively. The first and the second source follower circuits are further coupled to a first and a second current mirror circuit, respectively. The first and second current mirror circuits are coupled to a load, which is coupled to a common-mode feedback circuit. The common-mode feedback circuit controls a constant current source that sinks mirrored direct currents that flow through the first and the second current mirror circuits.

Abstract: A system, method and apparatus are disclosed for common-mode voltage feedback. The preferred system includes a plurality of differential circuits, a corresponding plurality of common-mode voltage detectors, a corresponding plurality of buffer circuits, and a common-mode control circuit. Each differential circuit is operative to produce a first differential output voltage and a second differential output voltage. Each corresponding common-mode voltage detector is operative to provide a common-mode voltage from the first differential output voltage and the second differential output voltage. The common-mode control circuit provides a control voltage signal from the common-mode voltage and from a reference voltage. Each buffer circuit is operative to adjust the corresponding common-mode voltage using the control voltage signal to provide a common-mode feedback voltage signal to the corresponding differential circuit.

Abstract: A system is provided for correcting start-up deficiencies in an amplifier. The system includes a comparing device configured to (i) receive a second circuit node voltage and a reference voltage as inputs, (ii) compare the received second circuit node voltage and the reference voltage, and (iii) produce a compensating voltage signal based upon the comparison. Next, an active device has a control terminal connected to an output port of the comparing device and is configured to receive the compensating voltage signal. The active device also includes an output terminal connected to the control terminal of the second active device, and a common terminal connected to a first circuit node. Another active device has a control terminal connected to the output port of the comparing device and is configured to receive the compensating voltage signal. The other active device also has an output terminal connected to the control terminal of the first active device, and a common terminal connected to the first circuit node.

Abstract: Constant GM models and GM-controlled current-isolated indirect-feedback instrumentation amplifiers. The constant GM models provide a transconductance that is proportional to the inverse of a resistance in the constant GM model circuits over a wide range of common mode and differential mode inputs. Current-isolated indirect-feedback instrumentation amplifiers using constant GM models to track the common mode and differential inputs of, and provide the tail currents for, the differential input pair in the transconductance amplifiers greatly enhance the instrumentation amplifier performance in numerous ways.

Abstract: An input stage for adjusting the gain or conductance Gm depending upon a control voltage applied and an output stage for securing a sufficiently high output impedance and a sufficiently wide output dynamic range are connected between the voltage source and the ground in parallel with each other.

Abstract: A high gain amplifier includes an intermediate gain stage; an output gain stage driven by the intermediate gain stage; an input stage, for driving the intermediate gain stage, which is balanced between positive and negative feedback in normal operation; bias means for driving the input stage to maintain balance between positive and negative feedback in normal operation; and a resistance for limiting the output current of the intermediate stage in response to the input stage being overdriven into positive feedback.

Abstract: A differential amplifier circuit of the present invention comprises an input circuit 10 for producing a difference voltage signal between a positive input signal and a negative input signal, a feedback bias circuit 20 for inputting the difference voltage signal supplied from the input circuit 10 to provide a bias voltage corresponding to the difference voltage signal and for performing a feedback control on the bias voltage by feeding back an output current, an output circuit 30 for supplying a load with the output current corresponding to the bias voltage, and a current detection circuit 40 for detecting the output current to provide it to the feedback bias circuit 20. The differential amplifier circuit performs class-AB amplification in such a way that the bias voltage provides a current value close to zero when the difference voltage signal is substantially zero.

Abstract: An amplifier with common mode output control including a reference circuit, a current mirror input circuit, a differential current mirror, a summing junction, first and second feedback amplifiers, first and second feedback current mirrors, and a differential output circuit. The input circuit receives the differential input voltage and develops a differential input current having polarity currents that have a constant sum based on a reference signal. The differential current mirror mirrors the differential input current into first and second high impedance nodes. The feedback amplifiers and the feedback current mirrors generate feedback current into the high impedance nodes in response to variations of summing junction voltage and maintain a constant common mode current. The output circuit develops a differential output current based on the differential input current mirrored into the high impedance nodes. RC compensation is provided to compensate open loop gain and the common mode output current loop.

Abstract: A system, method and apparatus are disclosed for common-mode voltage feedback. The preferred system includes a plurality of differential circuits, a corresponding plurality of common-mode voltage detectors, a corresponding plurality of buffer circuits, and a common-mode control circuit. Each differential circuit is operative to produce a first differential output voltage and a second differential output voltage. Each corresponding common-mode voltage detector is operative to provide a common-mode voltage from the first differential output voltage and the second differential output voltage. The common-mode control circuit provides a control voltage signal from the common-mode voltage and from a reference voltage. Each buffer circuit is operative to adjust the corresponding common-mode voltage using the control voltage signal to provide a common-mode feedback voltage signal to the corresponding differential circuit.

Abstract: A phase inversion prevention circuit for an op amp input stage includes a detection circuit which detects when either of the input pairs' intrinsic diodes is near a forward-biased condition. When such a condition is detected, a switching network switches tail current from the primary input pair to a secondary input pair which takes over the input stage's amplifying duties. For a folded cascode input stage, the detection circuit preferably detects the onset of phase inversion by monitoring the cascode voltage which drives the cascode transistors. The outputs of the secondary input pair are connected to bypass the cascode transistors. Thus, when the onset of phase inversion is detected, the primary input pair is disabled, the second input pair is enabled, and with the cascode transistors bypassed the secondary input pair avoids phase inversion.

Abstract: A different amplifier with rail-to-rail input including a single differential transistor pair utilizes a feedback circuit to control the threshold voltage of the differential transistor pair in accordance with the common mode voltage. The threshold voltage is controlled by adjusting the body bias coefficient with respect to the base to source voltage of the transistors.

Abstract: The present invention discloses a current feedback operational amplifier, whose input ends are connected to a first amplifier which transmits an output to the gate terminals of at least one input pair of current switches, and the source terminal of one transistor of the input pair of current switches is connected to one of the input ends. Therefore, a negative feedback loop will be established by the first amplifier and the input pair of current switches. By means of the negative feedback loop, the input impedance, offset voltage and gain error are all reduced. The input impedance of the present invention is reduced as 1/1+A times as the original one. Therefore, the aspect ratio of the transistors of the input pair of current switches is reduced.

Abstract: A current controlled complementary metal-oxide-semiconductor transconductive amplifier arrangement includes a first transconductive amplifier and a control circuit to control the transconductance of the first transconductive amplifier. The control circuit contains a second transconductive amplifier and an error amplifier formed in a feedback circuit, a current source to provide a current flowing through a resistor so as to supply an input voltage for the second transconductive amplifier, and a second current source and the output of the second transconductive amplifier coupled to the positive input of the error amplifier such that the transconductance of the second transconductive amplifier is in a linear relation with its bias current. The bias current of the first transconductive amplifier is mirrored from the bias current of the second transconductive amplifier by a current mirror, thus the transconductance of the first transconductive amplifier is linearly current controlled.

Abstract: A differential current mode gain stage and methods of using the same are provided. The gain stage may comprise a plurality of transistors. The gain stage is configured to keep at least one transistor of the plurality of transistors out of saturation mode while operating with a supply voltage of less than two base-emitter voltages, receiving an input signal, generating a first output signal if the input signal comprises a common mode signal, and generating a second output signal if the input signal comprises a differential signal, the second output signal having a larger amplitude than the first output signal.

Abstract: An amplifying circuit with a level-shift circuit is disclosed. An amplifying unit includes two stages of differential amplifiers cascadedly connected. A differential amplifier of the first stage has a pair of differential input terminals. The differential amplifier of the last stage has a pair of differential output terminals. A level-shift circuit constituted of a couple of level-shifters is connected to the output terminals. The level-shift circuit level-shifts the DC level of the differential output from the amplifying unit. The level-shift circuit has a pair of output terminals to deliver the level-shifted differential output. A DC-dummy dummies the DC operation of the differential amplifier of the last stage. The DC-dummy has the power supply in common with the differential amplifier of the last stage. A level-shifter shifts the output level from the DC-dummy and delivers the level-shifted dummy output.

Abstract: A circuit includes a differential amplifier that generates a differential offset signal on its output terminals. The circuit also includes an offset compensator that has input terminals respectively coupled to the amplifier output terminals and a compensation terminal coupled to the differential amplifier. The compensator maintains the differential offset signal at a predetermined value, for example 0 V. When used in an integrated read-head preamplifier, such a circuit compensates for the nonzero head bias voltage, i.e., the preamplifier input offset voltage, without using a component that is external to the integrated preamplifier circuit.

Abstract: A class AB input differential amplifier employs a single loop output common mode feedback circuit (CMFC) to achieve high performance by controlling the common mode output voltage. The CMFC includes a small amplifier to compare the common mode voltage at the output with a desired voltage specified at the common mode output voltage pin. Having only one loop to control this voltage instead of two makes the design more reliable and easier to compensate since there is no need to worry about how multiple loops will interact.

Abstract: The amplifier circuit includes differential amplifier circuits (3 to 4); a peak detector circuit (7) for detecting a peak value of an output voltage of a differential amplifier circuit 4 of the last stage; an offset compensation voltage generator circuit (8) for generating an offset compensation voltage for offset compensation on the basis of a detection result of the peak detector circuit (7); and an offset output limiter circuit (9) for limiting the offset compensation voltage generated by the offset compensation voltage generator circuit (8) into a predetermined range and feeding back the limited offset compensation voltage to a differential amplifier circuit (3) of the first stage.

Abstract: Electrical circuit (300, 500, 800, 900) has an input (301, 501, 801, 802, 901, 902) and an output (311, 502, OUT, I-OUT, Q-OUT). The circuit samples an input signal coupled to the input having a certain input frequency and converts the input signal into a certain output frequency at the output, the output frequency being lower than the input frequency. It comprises a first sampler circuit (302, 510, 803, 910) coupled to the input, a second sampler circuit (303, 520, 804, 920) coupled to the input, a buffering component (309, 509, 809, 903, 904) coupled to the output and buffer switching means (305-307, 514, 515, 811-818, 914, 915, 924, 925, 934, 935, 944, 945, 954, 955, 964, 965, 974, 975, 984, 985). The buffer switching means are arranged to respond to a buffering command (fs/N, A, B) by coupling said first sampler circuit and said second sampler circuit to said buffering component.

Abstract: A device and method for correcting the baseline wandering of transmitting signals are disclosed. The present method and device are used to correct the baseline wandering of the first output terminal and the second output terminal of a receiver as a result of induction effect of the transformer. The present device comprises a compensation current source including a first compensation output terminal and a second compensation output terminal which are respectively connected to the first output terminal and the second output terminal of the receiver. The device further includes a voltage signal generator for generating a control voltage to control the compensation current source. The voltage signal generator employs the voltage difference of the first output terminal and the second output terminal of the receiver and a reference voltage to control the control voltage.

Abstract: An analog signal gain circuit includes an input receiving an analog input signal defined by an ac signal component due to a driving force and a dc offset component independent of the driving force and an output providing an analog output signal defined by an amplified representation of the analog input signal and a dc offset component corresponding to a reference signal. A digital/analog feedback circuit includes a comparator having the reference signal as a switching threshold connected to an up/down counter having a number of digital outputs. The outputs of the up/down counter are connected to a D/A converter which converts the digital count to an analog feedback signal. The feedback signal is provided to the input of the analog signal gain circuit to minimize variations in the dc offset signal component of the analog output signal by compensating for the dc offset signal component of the analog input signal.

Abstract: First and second differential transistor pairs, where each is intentionally unbalanced, are provided. Each pair has first and second output nodes. The first output node of the first pair is coupled to the second output node of the second pair. The second output node of the first pair is coupled to the first output node of the second pair. First and second variable current generators are coupled to control respective tail currents of the first and second differential pairs. Applications of the amplifier circuit include sense amplifiers and comparators.

Abstract: An amplifier circuit which operates to level shift a differential input signal and to provide a single-ended output. The circuit includes a level shifting stage which defines two current paths, with one path being controlled by one component of the differential input and the other path being controlled by the other component. A transistor is connected in series with each of the current paths. A driver stage coupled to the first and second current paths provides first and second driver outputs indicative of voltage levels on the first and second current paths. A common mode feedback circuit operates to alter current flow in the current paths in response to the first and second driver outputs. An output stage includes one output transistor coupled between one power supply rail and an amplifier output and another transistor output transistor coupled between a second power supply rail and the amplifier output.