Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: A perpendicular magnetic recording (PMR) writer is disclosed. A write current passes through a driving coil and a bucking coil generates a magnetic flux that passes through the main pole tip and is used to write one or more magnetic bits in a magnetic medium. The improved PMR writer includes a double driving coil (DDC) design, in which a second electric current path in parallel with the driving coil through the main pole tip is added to drive the main pole in the same direction as the top driving coil.

Abstract: A current sampling circuit with on-chip real-time calibration is used to detect the on-state current of a driving transistor. The current sampling circuit includes a first resistor, a second resistor, a voltage sampling circuit, a sampling voltage operational circuit and an on-state resistance calibration circuit. The voltage sampling circuit is used to obtain on-state voltage drop value of the driving transistor Vds. The on-state resistance calibration circuit includes a reference current source and a calibrating transistor. On-state resistance value of the calibrating transistor is set to be K1 times of on-state resistance value of the driving transistor. The on-state voltage drop value Vds obtained by the voltage sampling circuit and the on-voltage drop value of the calibrating transistor Vrsns are input to the sampling voltage operational circuit to obtain proportional relationship K2 between the on-state voltage drop value Vds and the on-state voltage drop value Vrsns.

Abstract: A slew rate adjusting circuit includes an adjustment transistor configured to provide an adjustment current into an output port of an arithmetic amplifier, a first transistor connected between a power line of the arithmetic amplifier and the adjustment transistor, and a second transistor connected between the first transistor and an output node of the output port, wherein the adjustment transistor is turned on by the second transistor in response to a difference between an input voltage and an output voltage being equal to or greater than a reference voltage, and the adjustment current is provided to the output port in response to the adjustment transistor being turned on.

Abstract: Disclosed is power amplifier circuitry having a bipolar junction power transistor with a base, a collector, and an emitter. The power amplifier circuitry includes bias correction sub-circuitry configured to generate a compensation current substantially opposite in phase and substantially equal in magnitude to an error current passed by a parasitic base-collector capacitance inherently coupled between the base and collector, wherein the bias correction sub-circuitry has a compensation output coupled to the base and through which the compensation current flows to substantially cancel the error current.

Abstract: An active gate driver suitable for activating an electronic switch of an electric motor. The active gate driver includes a pull up branch, a pull down branch and a current and voltage feedback from an output of the active gate driver to at least one input of the active gate driver, wherein the current and voltage feedback is common to both the pull up branch and the pull down branch.

Abstract: A current mirror circuit includes a first current mirror transistor, a second current mirror transistor, and a bias circuit. The first current mirror transistor includes a gate and a drain. The second current mirror transistor includes a gate coupled to the gate of the first current mirror transistor. The first current mirror transistor and the second current mirror transistor are low threshold voltage transistors. The bias circuit is coupled to the gate and the drain of the first current mirror transistor. The bias circuit is configured to bias the first current mirror transistor to operate in a saturation mode when a threshold voltage of the first current mirror transistor is a negative voltage.

Abstract: A wireless device is disclosed that includes an antenna system comprising at least one inductive element and two or more capacitive elements. A switching component configured to change a circuit configuration of the capacitive elements. A controller configured to transmit a signal using the antenna system and to receive a response from a first device, to determine a communications protocol associated with the first device and to change a configuration of the antenna system in response to the detected communications protocol by actuating the switching component.

Abstract: An amplifier comprising a current-biased active device, a voltage-biased active device, the voltage-biased active device and the current-biased active device are connected in series, to form a cascade of active devices, and an input terminal and an output terminal, the cascade of active devices connected between the input terminal and the output terminal, having an output terminal for driving a load impedance with an output signal in response to an input signal applied to the input terminal.

Abstract: The present invention provides an amplifier circuit, wherein the amplifier circuit includes a DAC, an output stage and a detector. In the operations of the amplifier circuit, the DAC is arranged for performing a digital-to-analog converting operation upon a digital input signal to generate an analog signal, the output stage is arranged for receiving the analog signal to generate an output signal, and the detector is arranged for detecting a characteristic of the input signal, and referring to the characteristic of the input signal to generate at least one control signal to adjust the output stage at a zero-crossing point of the output signal.

Abstract: Methods and systems for split voltage domain receiver circuits are disclosed and may include amplifying complementary received signals in a plurality of partial voltage domains. The signals may be combined into a single differential signal in a single voltage domain. Each of the partial voltage domains may be offset by a DC voltage from the other partial voltage domains. The sum of the partial domains may be equal to a supply voltage of the integrated circuit. The complementary signals may be received from a photodiode. The amplified received signals may be amplified via stacked common source amplifiers, common emitter amplifiers, or stacked inverters. The amplified received signals may be DC coupled prior to combining. The complementary received signals may be amplified and combined via cascode amplifiers. The voltage domains may be stacked, and may be controlled via feedback loops. The photodetector may be integrated in the integrated circuit.

Abstract: An amplifier circuit includes an input amplifier; an output unity gain buffer; and a second unity gain buffer. The output unity gain buffer and the second unity gain buffer are each configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input amplifier. A unity gain amplifier includes an input unity gain amplifier; and an output unity gain buffer and a second unity gain buffer. The buffers are configured to receive a signal from an input amplifier. The output unity gain buffer is configured to provide an output voltage to an amplifier output, and the second unity gain buffer is configured to provide a bootstrap signal to the input unity gain amplifier.

Abstract: A level shifter, a digital-to-analog converter (DAC), and a buffer amplifier, and a source driver and an electronic device including the same are provided. The source driver includes a level shifter configured to receive digital bits and provide a level-shifted output signal; a DAC including a resistor string configured to provide a plurality of gradation voltages formed by an upper limit voltage and a lower limit voltage being received through one end and the other end, and an N-type metal oxide semiconductor (NMOS) switch and a P-type MOS (PMOS) switch configured to be controlled by the level-shifted output signal and output a gradation voltage corresponding to the level-shifted output signal; and an amplifier configured to amplify a signal provided by the digital-to-analog converter, and the lower limit voltage is provided to a body electrode of the NMOS switch.

Abstract: Active vibration isolation (AVI) systems are becoming more available in various markets, one such market being vehicle operator seating. Unfamiliarity with the performance of such systems may cause users initial perceptions of system performance to be unfavorable. AVI systems can include a demonstration system capable of providing simulations too users of various types of vibration isolation systems under various input conditions, so that users can be introduced to the system benefits over other systems before using an AVI equipped product in its intended application.

Abstract: Disclosed are advances in the arts with novel and useful electronic circuitry with pop and click noise reduction. A load circuit is connected with a full or single-ended half-H bridge circuit and another circuit mechanism in a configuration by which a signal may be used to selectably bring the load circuit terminals to a selected voltage level when an externally applied signal is not present.

Abstract: There are disclosed various methods and apparatuses. In some embodiments of the method an input signal is provided to an input of a first transistor of a push-pull circuit via a first slew-rate adjuster; and the input signal is also provided to an input of a second transistor of the push-pull circuit via a second slew-rate adjuster. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster to switch the first transistor on after the second transistor switches off when the amplitude of the input signal increases. The input signal is effected by the first slew-rate adjuster and the second slew-rate adjuster the input signal to switch the second transistor on after the first transistor switches off when the amplitude of the input signal decreases.

Abstract: This invention generally relates to the technical field of integrated circuits. More specifically the invention relates to output stages for providing an output signal, into which an integrated circuit may be used. An aspect relates to an integrated circuit capable of driving an external class-B output stage in a manner that allows providing a continuous output signal over the full range of desired outputs. The integrated circuit may comprise a class-AB output stage working in conjunction with the class-B output stage so as to provide a hybrid output stage. The integrated circuit may prevent dead band problems commonly faced when employing a class-B output stage. The integrated circuit may also reduce the quiescent current of the hybrid output stage. This may have further advantages, such as for example, the output stage producing less heat/power than needs to be dissipated.

Abstract: An interface for receiving electrical signals representative of a condition of a patient and for conveying representations of the electrical signals to a processing system. The interface includes at least one amplifier circuit configured to alter an amplitude of the electrical signal, a common-mode cancellation amplifier circuit coupled to the at least one amplifier circuit and configured to reduce common-mode signal noise in the electrical signals, and a bootstrap circuit coupled to the at least one amplifier circuit and configured to increase an effective input impedance at an input of the at least one amplifier circuit.

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract: An audio amplifier includes a compensation unit, an output unit and a calibration unit. The compensation unit generates a compensation signal based on a digital input signal, a digital reference code, a mode signal and a digital approximation code. The output unit generates an output signal based on the compensated input signal. The calibration unit generates the digital approximation code based on the output signal and the mode signal. The digital approximation code includes a plurality of bits that are generated sequentially.

Abstract: The invention discloses an optical communication system using grounded coplanar waveguide, comprising a current buffer and a transimpedance amplifier (TIA). Transmission lines of the optical communication system have grounded coplanar waveguide (GCPW) structures. The current buffer receives a current signal from a signal source, and outputs the current signal after reducing capacitance effects of the signal source. The TIA converts the current signal to a voltage signal, wherein a first end of the TIA receives the current signal, a second end of the TIAn outputs the voltage signal, and a shunt-shunt feedback circuit is coupled between the first end and the second end. Therefore, the present invention can minimize the circuit area and lower the power consumption as well.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: An amplifying circuit comprises: a first transistor, a second transistor, a third transistor and a fourth transistor provided to an input stage; and a first bias circuit. The input signal is input into a control terminal of the first transistor and a control terminal of the second transistor, a first terminal of the first transistor is connected to a first terminal of the third transistor, a first terminal of the second transistor is connected to a first terminal of the fourth transistor, a second terminal of the first transistor is connected to a first potential, a second terminal of the second transistor is connected to a second potential that is equal to or different from the first potential, a second terminal of the third transistor is connected to a third potential, a second terminal of the fourth transistor is connected to a fourth potential, the first bias circuit is connected between a control terminal of the third transistor and a control terminal of the fourth transistor.

Abstract: An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.

Abstract: The invention relates to a programmable filter for a radiofrequency receiver, embodiments disclosed including a filter (600) comprising an input (601) for receiving a radiofrequency signal, an output (602) for providing a filtered version of the input radiofrequency signal and a plurality of filter paths (603a-c) connected in parallel between the input (601) and output (602), each filter path comprising a buffer (604a-c) connected between the input (601) and one or more polyphase filters (605a-f), wherein each of the plurality of filter paths (603a-c) is configured to be individually selectable by providing an enable signal to a corresponding one of the buffers (604a-c).

Abstract: The first emitter follower circuit and the second emitter follower circuit can increase an input impedance on the side of the inverting input terminal in the amplifying circuit. As a result, when a feedback circuit is connected between the inverting input terminal and the output terminal of the amplifying circuit, a fluctuation in a gain of the amplifying circuit according to a configuration of the feedback circuit can be suppressed.

Abstract: Provided is a read-out circuit that is connected to a microphone and configured to linearly amplify a current signal generated by the microphone and output the amplified current signal. The read-out circuit includes an amplification unit and a feedback resistor. The amplification unit has an amplification gain between 0 and 1. The feedback resistor is connected between input and output terminals of the amplification unit. As the amplification gain of the amplification unit becomes closer to 1, an input impedance becomes higher. A preamp of the read-out circuit can have a high input impedance due to the amplification gain, and the read-out circuit can be manufactured using a CMOS process.

Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.

Abstract: An autobias vehicular microphone system (300) includes a microphone (301) uses an amplifier (306) for amplifying an output of the microphone. A first feedback path (308) provides an amplifier output signal to the amplifier input for providing amplifier linearity and a second feedback path (305) is used for providing bias to an voltage reference (303). The voltage reference (303) operates to provide an autobias to the amplifier (306) based upon amplifier loading. Thus, a DC feedback loop works as an average voltage sensing circuit operating to center the amplifier (306) to an operating point near one half its supply voltage. By allowing the bias point to vary, a constant clip level can be maintained depending on varying load conditions of electronic devices (307, 309, 311) using the microphone (301).

Abstract: An output buffer including a differential amplifier, a first and a second output stage, and a first and a second control stage is provided. The differential amplifier receives an input and a feedback signal and accordingly adjusts the level of the first and second control signals. The first control stage determines to provide a first current to an output terminal of the output buffer according to the level of the first and second control signals. The first control stage is biased under a high voltage and outputs one of the first control signal and the high voltage. The second control stage is biased under the low voltage and outputs one of the second control signal and the low voltage. The second output stage determines to provide a second current to the output terminal of the output buffer according to the signal generated by the first and second control stages.

Abstract: A current to voltage converter which includes a common gate transconductance element having at least one input and one output. The current to voltage converter further includes a common source transconductance element having at least one input and one output, where the common source transconductance element is connected to the common gate transconductance element. The current to voltage converter further includes a feedback circuit including a resistor, where the feedback circuit connects any input having a polarity to any output having an opposite polarity.

Abstract: A radio frequency wide band amplifier having a noise that does not exceed a threshold value, and a linearity better than a threshold value. The radio frequency wide band amplifier architecture includes a first stage amplifier and a second stage amplifier. The second stage amplifier includes an input source resistor (Rin) that receives an input voltage signal, a feedback resistor (Rfb) directly connected to the input source resistor, a p-type metal-oxide-semiconductor (PMOS) transistor directly connected to the input source resistor. The PMOS transistor receives an output from the input source resistor. A n-type metal-oxide-semiconductor (NMOS) transistor directly connected to the input source resistor. The NMOS transistor receives an output from the input source resistor. A lumped output resistor (Rout) that receives an output from the feedback resistor, the PMOS transistor, and the NMOS transistor. A terminal of the lumped output impedance is connected to ground.

Abstract: An operational circuit includes: a first stage having a first input terminal for receiving an input signal and a second input terminal for receiving an output signal of the operational circuit, for outputting a first control signal at a first output terminal and a second control signal at a second output terminal according to the input signal and the output signal; a second stage coupled to the first stage, for generating the output signal according to a first driving current controlled by the first control signal and a second driving current controlled by the second control signal; and a protection circuit coupled between the first stage and the second stage, for detecting the first driving current to selectively adjust the first control signal.

Abstract: An electrical circuit includes an amplifier. The amplifier includes an input circuit in communication with an input of the amplifier. A start-up circuit is in communication with the input circuit. The start-up circuit is configured to generate a start-up signal to enable subsequent operation of the amplifier. The start-up circuit turns off when an output of the amplifier reaches a threshold voltage. An output circuit is in communication with each of the outputs of the amplifier, the input circuit, and the start-up circuit.

Abstract: Various embodiments of a hybrid class AB super follower circuit are provided.

Abstract: First and second voltage buffers are added to an amplifying circuit including input and output amplifying stages in which a P-MOS transistor and an N-MOS transistor operate as a push-pull circuit. An input of the first voltage buffer is connected to an output of the amplifying circuit, and an output of the first voltage buffer is connected via a first phase compensating capacitor to a gate electrode of the P-MOS transistor, and is connected via a second phase compensating capacitor to a gate electrode of the N-MOS transistor. An input of the second voltage buffer is connected to the output of the amplifying circuit, and an output of the second voltage buffer is connected via a third phase compensating capacitor to the gate electrode of the P-MOS transistor, and is connected via a fourth phase compensating capacitor to the gate electrode of the N-MOS transistor.

Abstract: It is an object of the present invention to provide an amplifier circuit that supplies a differential output signal (Voutp?Voutn) with a stable common mode potential (½×(Voutp+Voutn)) and a stable amplification characteristic. An essential feature of the invention is a control path (24, 26, 30, 28, 36, 38, 34, 32) feeding back into a control stage of the amplifier circuit for the combined control of the quiescent currents that flow through the output transistors (T1-T4), and of the common mode potential of the differential output signal. By means of this combination of two control functions in one and the same control path (24, 26, 30, 28, 36, 38, 34, 32) any coupling between separate control loops is avoided.

Abstract: An amplifier (1) adapted to receive an input signal and to generate an output signal at an amplifier output (7) according to the input signal, the amplifier (1) comprising: a feedback circuit arranged to provide a feedback signal indicative of the output signal; an error signal generating circuit (12, 44) arranged to receive the feedback signal and generate a digital error signal according to the feedback signal; and an output signal generating circuit arranged to generate the output signal and to receive the digital error signal and to adjust the output signal according to the digital error signal; the amplifier (1) further comprising: a fault detection circuit (50) arranged to receive the digital error signal and to determine the presence or absence of a fault condition at the amplifier output (7) according to the digital error signal and to provide a signal (54) indicative of the presence or absence of the fault condition.

Abstract: Power amplifier circuit outputs an output voltage corresponding to an input voltage supplied, and includes positive and negative-side output units including a positive or negative-side output resistor and a positive or negative-side transistor having its source terminal connected to one end of the positive or negative-side output resistor to make a current corresponding to a voltage supplied to its gate terminal flow to the positive or negative-side output resistor, positive and negative-side bias generating units which generate a positive or negative-side bias voltage corresponding to the input voltage, and positive and negative-side control units which control the voltage to be applied to the gate terminal of the positive or negative-side transistor such that the positive or negative-side bias voltage and source voltage of the positive or negative-side transistor become generally equal, and the voltage at connection node between the positive and negative-side output units is output as the output voltage.

Abstract: The push-pull amplifier with transformational negative feedback is provided for amplification of variable electrical signals. It includes a signal input and a signal output, a transformational negative feedback connected with the signal input and the signal output and an amplifier circuit. The amplifier circuit includes an input and an output as well as a first transistor and a second transistor. The input of the amplifier circuit is thereby connected with the signal input and the output of the amplifier circuit is thereby connected with the signal output via the transformational negative feedback.

Abstract: A push-pull amplifier having low output impedance and low crossover distortion is provided. A least one of a current through a sourcing current path of an output stage and a current through a sinking current path of the output stage is determinative of a quiescent current control signal produced for controlling a quiescent current of the amplifier. The quiescent current is controlled by symmetrically controlling a bias voltage applied to a sourcing active output device and a bias voltage applied to a sinking active output device in response to the quiescent current control signal. An output stage sourcing control signal for controlling the sourcing active output device is referenced directly to a shared terminal of the sourcing active output device, and an output stage sinking control signal for controlling the sinking active output device is referenced directly to a shared terminal of the sinking active output device.

Abstract: Consistent with an example embodiment, there is an electronic circuit for amplification of bipolar symmetric current signals. The electronic circuit has a pair of complimentary current mirrors. Depending on the polarity of the bipolar current signal one or the current mirrors is active while the other current mirror is in an off state. This way adding a biasing current to the input signal is avoided which substantially reduces noise.

Abstract: A system and method to optimize the efficiency of an amplifier device is provided by the including a non-linear amplifier in a mobile radio device. A phase displaced signal in relation to the input signal is respectively produced in the amplifier device with a non-linear power amplifier and in a plurality of push-pull successive phase modifiers, and the outputs of the phase modifier are connected by a passive component.

Abstract: A power amplifier includes an input circuit, three power supply lines with voltages successively decreasing in an order of first, second and third power supply lines, a push-side driving circuit and a pull-side driving circuit which receive control signals from the input circuit, three driving signal lines which are led out of the driving circuits, three output transistors which have current paths connected at one ends to the first, second and third power supply lines, and have gates connected to the three driving signal lines, respectively, an output terminal which is commonly connected to the other ends of the current paths of the output transistors, an impedance circuit which adjusts a gate impedance of the output transistor connected to the third power supply line, and a feedback circuit connected between the output terminal and the input circuit.

Abstract: An op amp is arranged for low-voltage, rail-to-rail operation with a class AB output. The op amp includes a transconductance input stage, a folded cascode middle stage that includes a split cascode, a high-side driver, a low-side driver, a sampling circuit, and a split-cascode bias circuit. The split cascode includes two cascode transistors with their sources coupled to each other. Also, the sampling circuit that is arranged to sample the high-side driver current and the low-side sample current. The split cascode bias current is arranged to compare the sample current with a reference current, and to provide bias voltages to the gates of the two cascode transistors in the split cascode.

Abstract: On-chip calibrated source termination for voltage mode driver. An amplifier is disclosed having an internal amplifier with a first output and a second output, the first output interfaced to a non-inverting input through an interface. The second output is coupled to the first output through a series resistance element. The output impedance of the amplifier is determined by the ratio of the current drive of the first and second outputs. The voltage on said second output being a function of said interface and the current input to said internal amplifier.

Abstract: A class-AB output stage circuit is configured with controllable reference voltages for providing stable quiescent current. An exemplary output stage circuit comprises one or more control circuits, such as feedback loops, configured to control and/or adjust the reference voltages within the class-AB circuit based on the output voltage and/or supply rail voltage levels. In addition, an exemplary output stage circuit can also comprise one or more clamp circuits configured to facilitate operation of the output stage circuit when the output supply is proximate to or exceeds a positive or a negative supply rail.

Abstract: The present invention is provided with a first, a second and a third differential amplifier which operate at a source voltage with respect to a reference voltage or a voltage between these; an output stage having a first and a second transistor driven complimentarily; a first resistor connected to an input terminal; a second resistor connected to an output of the first differential amplifier circuit; and a first and a second feed back resistor connected to an output terminal of the output stage circuit.

Abstract: An output circuit is described, which includes a gain stage, n and p drives, coupled to the gain stage, a mean current generator, coupled to the drives, a reference current generator, coupled to the mean current generator, and feedback circuitry, coupled between the gain stage and the mean current generator. In this circuitry the feedback, provided by the feedback circuitry to the mean current generator, is a current mode feedback. The mean current generator generates the harmonic mean of currents, provided through current nodes. The described output circuit can be operated by providing currents at the current nodes of the mean current generator, generating a mean of provided currents with the mean current generator, and providing a current mode feedback by the feedback circuitry to the mean current generator. The feedback circuitry computes the difference between the generated mean current and a reference current.

Abstract: A class-AB MOS output stage that provides higher gain and significantly lower distortion. The class-AB MOS output stage includes a PMOS output transistor and an NMOS output transistor coupled between positive and negative supply voltages such that the MOS output transistors operate in a common source mode, a first biased class-AB control circuit coupled between the output transistor gates, a first current source coupled between the gate of the PMOS output transistor and the positive supply, a second biased class-AB control circuit, and a second current source coupled between the second control circuit and the positive supply. The second class-AB control circuit is coupled between the second current source and a non-inverting input of the output stage. The gate of the NMOS output transistor is employed as the inverting input of the output stage, which further includes two differential amplifiers for controlling the first and second current sources.