Abstract: An output circuit is described, which includes a gain stage, n and p drives, coupled to the gain stage, a mean current generator, coupled to the drives, a reference current generator, coupled to the mean current generator, and feedback circuitry, coupled between the gain stage and the mean current generator. In this circuitry the feedback, provided by the feedback circuitry to the mean current generator, is a current mode feedback. The mean current generator generates the harmonic mean of currents, provided through current nodes. The described output circuit can be operated by providing currents at the current nodes of the mean current generator, generating a mean of provided currents with the mean current generator, and providing a current mode feedback by the feedback circuitry to the mean current generator. The feedback circuitry computes the difference between the generated mean current and a reference current.

Abstract: An output stage provides increased current sourcing capability through a technique of local positive feedback. Current through a transistor MP2 is mirrored by the output current source IOUT that is desired to be increased. Without positive feedback, the gate of MN2 would be fixed by MP1 and MN1, and when input voltage VIN decreases by an incremental voltage &Dgr;V, the resulting current increase would distribute an increased voltage not only across MP2's VGS but also in the VGS of another transistor MN2; therefore, undesirably, not all of the &Dgr;V voltage change is mirrored in IOUT. However, if positive feedback such as MP5 is provided, the feedback dynamically increases the voltage at the gate of MN2. The increased voltage of MN2's gate essentially provides more voltage “headroom” for MP2 and MN2, and allows current through MP2 to increase with any voltage decrease in VIN.

Abstract: An output stage provides increased current sourcing capability through a technique of local positive feedback. Current through a transistor MP2 is mirrored by the output current source IOUT that is desired to be increased. Without positive feedback, the gate of MN2 would be fixed by MP1 and MN1, and when input voltage VIN decreases by an incremental voltage &Dgr;V, the resulting current increase would distribute an increased voltage not only across MP2's VGS but also in the VGS of another transistor MN2; therefore, undesirably, not all of the &Dgr;V voltage change is mirrored in IOUT. However, if positive feedback such as MP5 is provided, the feedback dynamically increases the voltage at the gate of MN2. The increased voltage of MN2's gate essentially provides more voltage “headroom” for MP2 and MN2, and allows current through MP2 to increase with any voltage decrease in VIN.

Abstract: An integrated circuit includes an analog amplifier connected to a terminal pad and has a Miller compensation of a section of the analog amplifier. The Miller compensation circuit is connected to a terminal for reference-ground potential through a capacitive element. An EMC interference radiation that can be coupled in through the terminal pad is attenuated by the capacitive element. The operating points of the internal nodes of the analog amplifier are, thereby, stabilized.

Abstract: The present invention provides an ultra linear, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage disclosed is significantly higher linearity for the same supply current, or equivalent linearity using a lower supply current. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form; &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, bandwidth is extended.

Abstract: An amplifier comprising a Low Noise Amplifier (LNA) to amplify a Radio Frequency (RF) signal. The LNA having a transconductance and including an input stage to receive the RF signal. The LNA again varying as a function of changes in conditions. A bias assembly to generate a bias current to bias the LNA input stage. The bias assembly configured to reduce variation of the LNA gain to changes in conditions.

Abstract: A three-stage transimpedance amplifier, where the first stage is a shunt-shunt feedback amplifier, the second stage is a simple voltage amplifier, and the third stage is a shunt-shunt feedback amplifier. The third stage comprises a pMOSFET serially connected with a nMOSFET, where their gates are connected together and to the output port of the second stage, and comprises a feedback pMOSFET or resistor to provide negative feedback from the drains of the pMOSFET and nMOSFET to the output port of the second stage.

Abstract: A high output amplifier includes a comparison amplifier having a first input, a second input, and an output, wherein a set voltage is applied to the first input, a voltage of the output is coupled to the second input, and the output is generated in response to a difference between the voltage applied to the first input and the voltage coupled to the second input. The high output amplifier also includes a low-pass filtering device that receives and performs low-pass filtering on the output of the comparison amplifier, a conversion device that converts the output of the low-pass filtering device to complementary signals, and a push-pull output device, driven by the complementary signals, that supplies electrical current to a load, wherein an increase in the electrical current supplied by the push-pull output device is decreased by changes in the load due to the low-pass filtering device.

Abstract: A voltage amplifier circuit inhibits excessive output phase shifts from a voltage amplifier that could result in oscillation, while still providing for rail-to-rail outputs. A first output stage that includes a blocking impedance dominates the output for low output values, while a second output stage that excludes the blocking impedance dominates for higher output voltages up to rail-to-rail. The output stages are preferably implemented with CMOS transistors, with the relative sizes of the transistors and the resistance of the blocking resistor selected to enable both phase shift inhibition and rail-to-rail outputs. The first output stage provides more AC feedback, while the second output stage provides more DC feedback for high output voltages.

Abstract: An amplifier having an improved output current drive capability includes an input stage and an output stage. An input of the output stage is operatively coupled to an output of the input stage. The amplifier further includes a current regeneration circuit operatively coupled to the input of the output stage in a feedback arrangement, the current regeneration circuit feeding back a current to the output circuit in accordance with a predetermined scale factor, the fed back current being proportional to an input current supplied to the output stage. The input current supplied to the output stage is dynamically adjustable by the current regeneration circuit in response to an input current requirement at the output stage.

Abstract: The disclosure describes a phase-splitter/level shifter comprising a first MOS transistor has a drain coupled to the first output node and a source coupled to a feedback node through a source resistor and a gate. A second MOS transistor has a drain coupled to a second output node and a source coupled to the feedback node through a source resistor and a gate. A first operational amplifier has a non-inverting input coupled to a single-ended input node, and an inverting input coupled to a second reference current source, an output coupled to the gate of the first MOS transistor. A second operational amplifier has a non-inverting input coupled to a single-ended input node, an inverting input coupled to a first reference current source, and an output coupled to the gate of the second MOS transistor. A variable resistor is coupled between the source of the first and second MOS transistor.

Abstract: An improvement in a buffer for driving a signal onto a power line is described. The buffer includes a second order filter. With the improvement, the collector-to-emitter potential of an emitter follower is maintained constant to substantially reduce the distortion associated with base-collector capacitance.

Abstract: The present invention provides an high beta, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage over conventional methods disclosed is up to &bgr;2 rather than a single beta. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form: &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, speed performance is increased and bandwidth is extended.

Abstract: A circuit for countering offset voltage in an amplifier induced by changes in the output load. The circuit comprises an input stage, an output stage, and first and second current compensation stages. The first current compensation stage is coupled to the output stage and produces a first compensation current that is a function of the output current. The input stage is coupled to the first current compensation stage from which it receives the first compensation current. The input stage is configured to cause a change in the voltage between its input terminals in response to the first compensation current. The second current compensation stage produces a second compensation current, which is also fed into the input stage to act jointly with the first compensation current. The first compensation current may be linearly related to the output current. The second compensation current may be exponentially related to the output current.

Abstract: A method and circuit control a quiescent current of an amplifier including a preamplifier, error amplifiers, and output devices driven by the error amplifiers, the error amplifiers having an input-referred offset voltage. The method includes (a) applying a calibration voltage to an input of the error amplifiers, (b) calibrating a quiescent current of the output devices by changing the calibration voltage so that the calibrated quiescent current has a predetermined current value, the calibration voltage corresponding to the calibrated quiescent current being set as a correction voltage, and (c) operating the amplifier with the correction voltage applied to the input of the error amplifiers. The circuit includes a correction voltage generator supplying a correction voltage to the error amplifier input, a quiescent current detector detecting the quiescent current, and a calibration circuit adjusting the correction voltage so that the quiescent current is calibrated to a predetermined current value.

Abstract: A negative feed-back amplifier is provided in which a distortion of signals is reduced and a dynamic range is increased. An input signal is input to a base of a transistor and is output from a collector as a reversed signal and a non-reversed signal is output from an emitter. The reversed signal is input to a base of a transistor and is output through a resistor from an emitter of the transistor. The non-reversed signal is input through a condenser to a base of a transistor and is output from a collector in a reversed form. An output signal from the transistor is input to an emitter follower of a transistor at high input impedance and output at low output impedance and then attenuated by resistors and negative feed-back signal is produced. The negative feed-back signal is input through a resistor to a base of the transistor to be added to the input signal.

Abstract: The present invention provides an ultra linear, high speed operational amplifier output stage (100). The advantages of the operational amplifier output stage disclosed is significantly higher linearity for the same supply current, or equivalent linearity using a lower supply current. The present invention achieves this using an pre-driver sub-stage (122) having a plurality of translinear loops so that there is no net signal loss to the final sub-stage (123). The output of the disclosed operational amplifier output stage takes the form; &dgr;Io≈&bgr;n*&bgr;p*&dgr;Iin. When used with a localized feedback circuitry, bandwidth is extended.

Abstract: A system for suppressing transient noise in switched-mode amplifier systems is disclosed. An amplifier, for amplifying a signal from a digital signal source includes a first complementary metal oxide semiconductor field effect transistor (MOSFET) pair. A common node of the pair is serially coupled to an output node of the amplifier by a resistor. The first MOSFET pair is configured to drive a ramp on the output node of the amplifier.

Abstract: An improved class-G amplifier (FIG. 2) is provided by adding a first capacitor (82) between the input of current mirror (18) and node p, and by adding a second capacitor (84) between the input of current mirror (20) and node m. The added capacitors (82) and (84) can be sized to stabilize frequency responses when high power supplies are enabled. The added capacitors (82) and (84) further function to reduce transient currents during switching through the crossover points between first upper and lower power supplies (Vsp1, Vsph) and between second upper and lower power supplies (Vsm1, Vsmh).

Abstract: The disclosure describes a current feedback amplifier that contains an additional pair of emitter follower transistors connected between inputs of current mirrors, with a capacitor connected to the common emitters of the emitter follower transistors to reduce discontinuities in the output current provided from the current mirrors. The capacitor is used to turn on the non-dominant current mirror prior to the time it is required to dominate the output. In this manner, glitches introduced due to delays in a current mirror switching from an off state to an on state are significantly reduced.

Abstract: An amplifier stage for a buffer with negative feedback includes an input stage having an input terminal, an output terminal, a first and a second supply terminal, a biasing branch, a first and a second balancing branch each comprising an active transistor for supplying, at the output terminal, a current depending on the current difference in the first and second balancing branches. The biasing branch and the first and second balancing branches are connected in parallel between the first and second supply terminals. The input terminal divides the biasing branch into two input branches having a constant-current generator. Each active transistor is connected to a corresponding current generator for receiving a control voltage correlated with a voltage at the terminals of the current generator.

Abstract: An amplifier circuit that includes an amplifier stage and an output stage, and local feedback between these stages to drive a biasing string associated with the amplifier stage using the potential at the output stage. In one embodiment, the local feedback line is coupled between the output stage and the biasing string to remove the loading effect of the biasing string on the amplifier stage. In another embodiment, the local feedback line is coupled between the switches of the amplifier stage and the switches of the output stage to bias the amplifier stage using the output stage.

Abstract: The improved Class AB input stage monitors the needs of base current in the slewing transistors 22-25 and supplies that base current with extremely fast and precise feedback loops 90-93. This allows the input stage quiescent current to be very small and gets rid of the non-linearities associated with the lack of base current available to drive the slewing transistors 22-25 in a conventional prior art Class AB input stage. The input stage is a very efficient, low distortion, high small signals and full power bandwidth Class AB input stage.

Abstract: An improved class-G amplifier (FIG. 2) is provided by adding a first capacitor (82) between the input of current mirror (18) and node p, and by adding a second capacitor (84) between the input of current mirror (20) and node m. The added capacitors (82) and (84) can be sized to stabilize frequency responses when high power supplies are enabled. The added capacitors (82) and (84) further function to reduce transient currents during switching through the crossover points between first upper and lower power supplies (Vspl, Vsph) and between second upper and lower power supplies (Vsml, Vsmh).

Abstract: The disclosure describes a current feedback amplifier that contains an additional pair of emitter follower transistors connected between inputs of current mirrors, with a capacitor connected to the common emitters of the emitter follower transistors to reduce discontinuities in the output current provided from the current mirrors. The capacitor is used to turn on the non-dominant current mirror prior to the time it is required to dominate the output. In this manner, glitches introduced due to delays in a current mirror switching from an off state to an on state are significantly reduced.

Abstract: An integrated circuit including a resistor that at least partially overlies a first tub of semiconductor material of a first polarity, where the first tub is formed in a second tub of semiconductor material having the opposite polarity, and the second tub is formed in a semiconductor substrate having the first polarity. The second tub forms the base of a vertical bipolar transistor, the first tub forms the emitter of the transistor, and the substrate forms the collector of such transistor. Where the vertical transistor is a PNP transistor, the first tub is the emitter and consists of P-type semiconductor material, the second tub is the base, and the substrate is the collector. Preferably, the resistor is a strip of polysilicon or a set of multiple, series-connected polysilicon segments. Typically, the integrated circuit is an amplifier and the resistor is a gain-setting resistor.

Abstract: A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output nodeconnected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage.

Abstract: Electronic circuit comprising a first and a second current mirrors, an upstream active element arranged between an input of the first current mirror and an input of the second current mirror, each current mirror being provided with an output. The circuit comprises a first current source arranged in parallel with the input of the first current mirror and a second current source arranged in parallel with the input of the second current mirror, so that the current delivered to the active element is equal to the output current of each current mirror and that the input current of each current mirror is less than the current delivered to the active element by the input of each current mirror and by the associated current source.

Abstract: A negative feed-back amplifier is provided in which a distortion of signals is reduced and a dynamic range is increased.

Abstract: According to the present invention, an apparatus having a plurality of independently operable and powerable devices is disclosed. The apparatus includes a plurality of power rails, a plurality of ground planes, and a power management circuit. One of the power rails is associated with one of the plurality of independently operable devices. One of the plurality of ground planes is selectively associated with one or more of the plurality of power rails. The power management circuit couples to the plurality of power rails and the second plurality of ground planes, for selectively deactivating at least one of the plurality of ground planes independently of any of the other plurality of power rails.

Abstract: An amplifier designed from CMOS transistors provides a high current output, despite having a unity-gain configuration. A push-pull output stage drives the output using a p-channel pull-up transistor and an n-channel pull-down transistor. The pull-down transistor's gate is driven by an output from an inverting differential amplifier, that has one differential transistor gate driven by an input voltage and the other driven by the output voltage. A second differential amplifier is configured as a non-inverting differential amplifier, with one differential transistor gate driven by the input voltage and the other driven by the output voltage. The second differential amplifier drives an n-channel gate of an inverting stage, and the output of the inverting stage drives the p-channel pull-up transistor's gate.

Abstract: A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output nodeconnected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage.

Abstract: A method and circuits are disclosed for an operational amplifier operating from a single cell 1.5 Volt supply which consumes very little power, and which can handle rail-to-rail input common mode and output signal swings. Low voltage and low power operation are made possible by biasing the CMOS transistors of the entire operational amplifier in the so called “sub-threshold” or “weak inversion” region of operation. This lowers VGSN and VGSP below VTN and VTP, and also lowers VDsat so that the operational amplifier can operate down to 0.9 Volt. The Class AB control circuit part of the operational amplifier can be applied to any conventional (normal biasing—other than weak inversion) low voltage Class AB output stage. The output stage of the operational amplifier is designed to source and sink more than 60 microAmperes of current into a 10 Kohm load while consuming only 4 micoramperes of current in the quiescent state.

Abstract: The present invention teaches a variety of output stages for amplifying high speed signals while keeping distortion low and using a low supply voltage. The invention includes the use of dual complementary signal paths that include a complementary push-pull output stage. Bias circuits are used to keep the paths symmetrical and positive feedback is used to oppose output loading effects.

Abstract: In a beam current measurement device, including an output transistor (T1) for supplying a cathode current (Ic), a measurement output (OUTM) for supplying a measured current (Im) representing the cathode current (Ic), a first current source (Ibias1) coupled to a first main terminal of the output transistor (T1) for supplying a first current (Ibias1), and a second current source (Ibias2) coupled to a second main terminal of the output transistor (T1) for supplying a second current (Ibias2) substantially equal to the first current (Ibias1), a first cascode transistor (Ta) is coupled between the first main terminal of the output transistor (T1) and the measurement output (OUTM).

Abstract: A pulse shaper circuit includes a buffer having an input, an output and two supply connections. A controllable first switch is connected between one of the supply connections and a first supply potential, a controllable second switch is connected between the other supply voltage connection and a second supply potential, a controllable third switch is connected between the output of the buffer and the first supply potential and a controllable fourth switch is connected between the output of the buffer and the second supply potential. A control device for the switches is connected to the output of the buffer and produces a first control pulse of a specific duration at the occurrence of first edges of a signal present at the output of the buffer and a second control pulse of a specific duration at the occurrence of second edges. The first control pulse changes over the first switch from the ON state to the OFF state and the fourth switch from the OFF state to the ON state.

Abstract: An operational amplifier output circuit having a low, stable quiescent current includes an input stage (22) receiving an input voltage (v.sub.in ") and producing first (v.sub.1) and second (v.sub.2) signals. An output stage (23) includes a pull-up transistor (1) and a pull-down transistor (2), a base of the pull-up transistor (1) receiving the first signal (v.sub.1). An emitter of the pull-up transistor (1) is coupled by an output conductor (30) to a collector of the pull-down transistor (2). A base of the pull-down transistor is coupled to receive the second signal (v.sub.2), and an emitter of the pull-down transistor (2) is coupled to a second reference voltage conductor (GND). A feedback stage (24) includes a first sensing circuit (36) coupled to the pull-up transistor 1 and produces a third signal (v.sub.3) representing a collector current of the pull-up transistor (1), a second sensing circuit (37) coupled to the pull-down transistor (2) and producing a fourth signal (v.sub.

Abstract: An output stage driver circuit comprising two parallel class AB stages running at slightly different quiescent currents, the difference of which is scaled up through a current mirror is disclosed which provides a temperature stable precisely controlled quiescent current for the output stage. A current limited voltage source is provided to ensure inherent short circuit protection with instantaneous response to short circuit or excessive load current conditions.

Abstract: A monolithic class AB (push-pull) low noise amplifier having feedback and self bias. The low noise amplifier exhibits low power, high intercept point, low noise figure, well matched terminal impedances over wide range of frequency, and may be monolithically implemented. The amplifier may be produced using CMOS process technologies. The amplifier comprises NMOS and PMOS transistors serially coupled between a voltage rail and ground. The amplifier uses self biasing embodied in a bias resistor coupled between an input shunt capacitor and respective drains of the NMOS and PMOS transistors, which allows for maximum gate-to-source voltage and higher transconductance for a minimum aspect ratio (W/L). This results in a wider bandwidth and reduced power for the amplifier.

Abstract: An amplifier circuit that offers high bandwidth operation and a high slew rate is disclosed. The amplifier circuit may also have an input voltage swing down to the negative rail which is particularly suitable for low voltage applications having a single power source. In one embodiment, the amplifier circuit amplifies a difference voltage between first and second input voltages to produce an output voltage, and includes: an analog voltage-to-current converter for receiving the first and second input voltages and producing complementary current signals; and a complementary mirror output stage coupled to receive the complementary current signals at respective mirror circuits.

Abstract: An improved power amplifier having complimentary power transistors connected in push-pull arrangement, and having a bias voltage source coupled to the transistors for generating a transverse idling current flowing through the complimentary pair of transistors. A regulating, feedback control circuit has a set point input and inputs connected to precision resistors connected to detect the current through the power transistors and the output current. Analog arithmetic computing circuits continuously compute the instantaneous difference between the detected transverse idling current through the power transistors and the set point input for the idling current. The output of the controller circuit is connected to the bias voltage sources to vary the bias voltage in proportion to the instantaneous difference between the detected transverse idling current and the set value of idling current to maintain a constant, transverse idling current.

Abstract: A wide bandwidth, multi-FET current sharing output stage, MOS audio power amplifier employs multiple feedback loops. An audio input is supplied to a voltage feedback amplifier stage driving a push-pull voltage gain/phase splitter stage. A bias adjustment stage driven from the push-pull voltage gain/phase splitter stage drives a current drive stage. The current drive stage drives an output stage comprising a plurality of paralleled current shared individual MOS output transistors driving an output node connected to a load. Up to three feedback loops are employed. A first voltage feedback loop comprises a voltage feedback stage having an input connected to a voltage divider driven from the first terminal of the load and an output connected to a feedback input node in the voltage feedback amplifier stage.

Abstract: A complementary Class AB output stage including a Class AB complementary common emitter quiescently biased by means of current mirrors and a Class AB complementary emitter follower circuit having its emitters connected to the common emitter stage outputs and its collectors connected to the base terminals of the common emitter transistors thus achieving large output swing and large output drive current with very low quiescent current in the common emitter portion of the circuit.

Abstract: An audio surround-sound system includes a main enclosure, an audio decoder device to decode audio source signals supplied by an audio source device to provide decoded audio signals, and at least a first and second low distortion amplifier housed within the main enclosure to receive and amplify the decoded audio signals. Also included is at least a first and a second speaker element operatively coupled to the at least first and second amplifiers, respectively, to produce the audible signals, where the audible signals are received by the listener from a first and second direction. A local radio transmitter converts a portion of the decoded audio signals into radio modulated signals and transmits the radio modulated signals where a wireless receiver receives and converts the radio modulated signals into remote audio source signals.

Abstract: According to the preferred embodiment, a buffer amplifier is provided that provides improved linearity while providing increased control over the gain without unduly limiting the amplifier frequency response. The amplifier preferably includes a series pair of transistors with their gates connected to the amplifier input and their drains connected to the amplifier output. The amplifier further includes a pair of feedback transistors connected in series with the series pair. The gates of the feedback transistors are connected to the amplifier output through a pair of feedback networks. Each network includes at least one impedance element. The impedance elements are preferably selected to maximize the linearity of the amplifier response. Furthermore, the impedance elements can be selected to modify the gain of the amplifier, increasing the amplifier gain if needed.

Abstract: An electroacoustic device such as a hearing aid having a battery, microphone, speaker, a preamplifier, a voltage regulator and power amplifier. The power amplifier includes identically configured output and bridge stages connected to opposite sides of the speaker, the output signals from the output stage being connected through a blocking capacitor to the input of the bridge stage. The output/bridge stage circuit includes an interface stage and two current gain stages. The interface stage converts voltage signals to current signals with a pair of outputs respectively connected to the two like-configured current gain stages. Each current gain stage includes two successive sections, each having a pair of transistors, one of which is configured as a diode connected in series with a resistor to shunt current from the base of the other transistor.

Abstract: In accordance with the objectives of the present invention, a variety of apparatus and methods for amplifying an electrical signal are disclosed. According to one embodiment of the present invention, a dual-output stage amplifier includes an amplifier stage having an input and an output, a first output stage having an input and an output, a second output stage having an input and an output and an error stage having an input and an output. The first output stage output is coupled with the output of the amplifier stage and responsive to the amplifier stage. If the first output stage output is coupled to an output load, the first output stage is capable of providing an output current to the output load such that a first output voltage related to an input voltage at the input of the amplifier stage is maintained across the output load. In turn, the second output stage input is coupled with the output of the amplifier stage and in parallel with the first output stage.

Abstract: Distortion control in a push-pull output stage of a speech amplifier of a telephone powered through the telephone line is more effectively and advantageously implemented by independently sensing an eventual state of saturation reached by any of the two output transistors of the amplifier, summing the current signals representative of the sensed state of saturation of either or both output transistors, integrating the resulting sum current signal to produce a DC signal and using the DC signal for activating an AGC loop. The DC signal indiscriminately accounts for any cause of saturation, though virtually representing the level of the amplified AC signal. Distortion may be controlled without penalizing output voltage swing and power consumption.

Abstract: A current sourcing output stage for a high voltage operational amplifier receives a low voltage input signal (V.sub.IN) and provides a high current output signal corresponding to the low voltage input signal at an output terminal (8). A first PNP transistor (Q1) is coupled between a voltage supply (V.sub.CC) and a plurality of cascaded PNP transistors (Q2, Q3, Q8-Q11) coupled to the output terminal (8). The base of the first PNP transistor (Q1) is coupled to receive the input signal (V.sub.IN) and the bases of the cascaded PNP transistors are coupled to receive different bias voltages A control circuit (Q5-Q7, R1-R5) is coupled to the voltage supply (V.sub.

Abstract: A high bandwidth video output amplifier circuit suitable for driving a cathode ray tube for printing high resolution images on photographic stock with good tonal reproduction includes a high voltage amplifier comprising an emitter follower amplifier with a constant current collector load circuit inputing to an emitter follower buffer current amplifier circuit which drives an output load device such as a cathode ray tube. The constant current collector load provides desired high amplifier gain. A negative feedback path is coupled from the buffer output to the input of the high voltage emitter follower amplifier circuit via an intermediate emitter follower buffer at the input to the voltage amplifier transistor. The feedback provides stable, controlled overall voltage gain and the intermediate buffer amplifier isolates the video input and feedback path from the collector-base Miller capacitance of the voltage amplifier transistor thereby providing a significant extension of the amplifier bandwidth.