Having Field Effect Transistor Patents (Class 330/269)
  • Patent number: 10938358
    Abstract: A digital power amplifier comprising two or more individually activatable amplifiers. The outputs of the amplifiers are connected causing an activated amplifier of the two or more amplifiers to load modulate another activated amplifier of the two or more amplifiers.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: March 2, 2021
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Gavin Tomas Watkins
  • Patent number: 10804863
    Abstract: System includes first and second amplifying circuits that are configured to receive input signals having a fundamental frequency. The system also includes first and second transmission lines that are configured to receive voltage and current waveforms from the first and second amplifying circuits, respectively. The system also includes a capacitively-compensated transmission line resonator (CC-TLR) that is configured to be electrically connected to a load having a load impedance. The CC-TLR is configured to receive and combine RF power from the first and second transmission lines. The CC-TLR has a compensation capacitance that causes the CC-TLR to present an open circuit at the fundamental frequency and present a short circuit at harmonic frequencies. Optionally, a characteristic impedance (Z0) of the first and second transmission lines and a load impedance (ZL) are unequal, and the first and second transmission lines cause a load impedance transformation.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: October 13, 2020
    Assignee: GENERAL ELECTRIC COMPANY
    Inventors: Andreas B├Ącklund, Dragos Dancila
  • Patent number: 10720890
    Abstract: A circuit includes a first current source of a first type, a common-source gain device, a load, a second current source of a second type, a first common-mode network, and a second common-mode network. The first current source pulls a first bias current from a source node according to a first bias voltage. The common-source gain device receives an input voltage and outputs an output current to a drain node according to the first bias current. The load provides a termination to the drain node. The second current source outputs a second bias current to the drain node according to a second bias voltage. The first common-mode network outputs the first bias voltage according to a constant-gm reference current. The second common-mode network outputs the second bias voltage according to a difference between a mean voltage at the drain node and a scaled reference voltage.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: July 21, 2020
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Chia-Liang (Leon) Lin, Chi-Kung (Richard) Kuan
  • Patent number: 10651804
    Abstract: A power amplifier circuit is capable of restraining uneven temperature distribution among a plurality of unit transistors while restraining the deterioration of the characteristics of the power amplifier circuit. The power amplifier circuit includes: a first transistor group which includes a plurality of unit transistors and which amplifies an input signal and outputs an amplified signal; a bias circuit which supplies a bias current or a bias voltage to a base or a gate of each unit transistor of the first transistor group; a plurality of first resistive elements, each of which is connected between the base or the gate of each unit transistor of the first transistor group and an output of the bias circuit; and a plurality of second resistive elements, each of which is connected between an emitter or a source of each unit transistor of the first transistor group and a reference potential.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Toshiki Matsui, Kenji Sasaki, Fumio Harima
  • Patent number: 10622977
    Abstract: One example includes a superconducting bidirectional current driver. The current driver includes a first direction superconducting latch that is activated in response to a first activation signal to provide a first current path of an input current through a bidirectional current load in a first direction. The current driver also includes a second direction superconducting latch that is activated in response to a second activation signal to provide a second current path of the input current through the bidirectional current load in a second direction opposite the first direction.
    Type: Grant
    Filed: October 2, 2018
    Date of Patent: April 14, 2020
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Ofer Naaman, Donald L. Miller, Randall M. Burnett
  • Patent number: 10615005
    Abstract: In a method of an embodiment, radio-frequency power is supplied to an electrode via a matching device from a radio-frequency power supply in order to generate plasma within a chamber. During the supply of the radio-frequency power, it is determined whether or not plasma is generated within the chamber from one or more parameters reflecting plasma generation within the chamber. When it is determined that plasma is not generated, a frequency of the radio-frequency power output from the radio-frequency power supply is adjusted to set the load side reactance of the radio-frequency power supply to zero or to bring the load side reactance close to zero.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 7, 2020
    Assignee: TOKYO ELECTRON LIMITED
    Inventors: Koichi Nagami, Kazunobu Fujiwara, Tadashi Gondai, Norikazu Yamada, Naoyuki Umehara
  • Patent number: 10566946
    Abstract: A quasi-differential amplifier with an input port and an output port. The amplifier has a phase shifter network with a first port connected to the input port, a second port, and a third port. A first amplifier has an input connected to the second port of the phase shifter network, and an output, and a second amplifier has an input connected to the third port of the phase shifter network, and an output. A balun circuit includes a first differential port connected to an output of the first amplifier, a second differential port connected to an output of the second amplifier, and a single-ended port. An output matching network is connected to the single-ended port of the balun circuit and to the output port.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: February 18, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventor: Oleksandr Gorbachov
  • Patent number: 10554131
    Abstract: A power supply unit includes primary and secondary circuits and a transformer. The primary circuit is connected to an alternating-current power supply and includes a switching device. The transformer includes primary and secondary windings. The primary winding receives an alternating current so that an alternating current is induced in the secondary winding. The received alternating current is generated through switching using the switching device. The secondary circuit rectifies, for output, the alternating current induced in the secondary winding. The primary winding includes first and second windings. When the alternating-current power supply is a power supply of a first voltage, the first winding is connected to the second winding in parallel in the primary winding. When the alternating-current power supply is a power supply of a second voltage higher than the first voltage, the first winding is connected to the second winding in series in the primary winding.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: February 4, 2020
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Takayuki Yoshida, Hajime Misumi, Tsutomu Taji, Norio Hasegawa, Hyeonju Kim, Takashi Fujii, Hideyuki Akiba
  • Patent number: 10511176
    Abstract: The present disclosure provides a power converter, including: a pre-stage circuit, configured to receive an input voltage and convert the input voltage to a bus voltage; and plurality of post-stage circuits, connected in parallel to an output terminal of the pre-stage circuit, and configured to receive the bus voltage from the pre-stage circuit and each converts the bus voltage to an output voltage. The power converter provided by the present disclosure can effectively solve the problems of isolation and the wide range of operating voltage, and can take both of high efficiency and high power density into consideration.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: December 17, 2019
    Assignee: Delta Electronics, Inc.
    Inventors: Jianhong Zeng, Peiqing Hu, Haoyi Ye, Yan Chen, Jiale Dai, Ziying Zhou
  • Patent number: 10349170
    Abstract: Microelectromechanical systems (MEMS) sensors and related bias voltage techniques are described. Exemplary MEMS sensors, such as exemplary MEMS acoustic sensors or microphones described herein can employ one or more bias voltage generators and single-ended or differential amplifier arrangements. Various embodiments are described that can effectively increase the bias voltage available to the sensor element without resorting to high breakdown voltage semiconductor processes. In addition, control of the one or more bias voltage generators in various operating modes is described, based on consideration of a number of factors.
    Type: Grant
    Filed: July 9, 2018
    Date of Patent: July 9, 2019
    Assignee: INVENSENSE, INC.
    Inventors: Kieran Harney, Adrianus Maria Lafort, Brian Moss, Dion Ivo De Roo
  • Patent number: 10045121
    Abstract: Microelectromechanical systems (MEMS) sensors and related bias voltage techniques are described. Exemplary MEMS sensors, such as exemplary MEMS acoustic sensors or microphones described herein can employ one or more bias voltage generators and single-ended or differential amplifier arrangements. Various embodiments are described that can effectively increase the bias voltage available to the sensor element without resorting to high breakdown voltage semiconductor processes. In addition, control of the one or more bias voltage generators in various operating modes is described, based on consideration of a number of factors.
    Type: Grant
    Filed: April 29, 2016
    Date of Patent: August 7, 2018
    Assignee: Invensense, Inc.
    Inventors: Kieran Harney, Adrianus Maria Lafort, Brian Moss, Dion Ivo De Roo
  • Patent number: 9966905
    Abstract: Radio frequency (RF) filters configured to filter undesired signal components (e.g., noise and harmonics) from RF signals are disclosed. In one embodiment, an RF filter includes a first inductor coil having a first winding and a second inductor coil having a second winding and a third winding. The second winding of the second inductor coil is configured to have a first mutual magnetic coupling with the first winding, while the third winding of the second inductor coil is configured to have a second mutual magnetic coupling with the first winding. The second winding is connected to the third winding such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition. In this manner, the first inductor coil and the second inductor coil may be provided in a compact arrangement while providing weak mutual magnetic coupling between the first inductor coil and the second inductor coil.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: May 8, 2018
    Assignee: Qorvo US, Inc.
    Inventors: Dirk Robert Walter Leipold, George Maxim, Baker Scott, Danny W. Chang
  • Patent number: 9859844
    Abstract: Structure and design methods of electrical power amplifiers suitable for broadband application such as television frequency or white spaces. An example broadband power amplifier passes a transmit carrier with modulations from BPSK to 256 QAM, on channel bandwidths from 6 to 32 MHz, over the entire UHF television band from 470 to 800 MHz using a low voltage, low power, narrowband power amplifier transistor. Based on a push-pull technique to lower the impedance level thus improving the match and doubling the power, the wide-band power amplification is performed with a balanced polynomial filter transform structure wherein the circuit impedance increases sequentially within the filter stage. The polynomial filtering makes high selectivity of out-of-band signals thereby cleaning up harmonic signals which prevent the need for additional high selective radio frequency filters. The invented power amplifier enables efficient broadband power amplifiers having a form factor within 300 square millimeters of space.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: January 2, 2018
    Inventor: Sebastien Amiot
  • Patent number: 9768733
    Abstract: Methods and systems for vector combining power amplification are disclosed herein. In one embodiment, a plurality of signals are individually amplified, then summed to form a desired time-varying complex envelope signal. Phase and/or frequency characteristics of one or more of the signals are controlled to provide the desired phase, frequency, and/or amplitude characteristics of the desired time-varying complex envelope signal. In another embodiment, a time-varying complex envelope signal is decomposed into a plurality of constant envelope constituent signals. The constituent signals are amplified equally or substantially equally, and then summed to construct an amplified version of the original time-varying envelope signal. Embodiments also perform frequency up-conversion.
    Type: Grant
    Filed: May 2, 2014
    Date of Patent: September 19, 2017
    Assignee: Parker Vision, Inc.
    Inventors: David F. Sorrells, Gregory S. Rawlins, Michael W. Rawlins
  • Patent number: 9531341
    Abstract: An electronic apparatus comprises a first stage that functions as a single-ended to differential converter for signals in a low frequency range and a second stage that is electrically connected to the first stage and functions as a single-ended to differential converter for signals in a high frequency range.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: December 27, 2016
    Assignee: Keysight Technoloiges, Inc.
    Inventor: Neil Adams
  • Patent number: 9508480
    Abstract: A vertical inductor structure in a semiconductor device includes a plurality of vertically oriented spirals that produce magnetic field in a dielectric material above the surface of a semiconductor substrate thereby preventing any eddy currents from propagating in the substrate. An inductor shield structure is also provided. The inductor shield structure is formed over the substrate surface and between an inductor such as the vertical inductor structure or other inductor types and also prevents eddy currents from being induced in the substrate. The inductor shield may surround the inductor to various degrees.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: November 29, 2016
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Hsiu-Ying Cho
  • Patent number: 9338546
    Abstract: A circuit assembly and a method for processing an input signal are disclosed. In one embodiment a circuit assembly comprises a voltage provider configured to receive a supply voltage and to provide an internal supply voltage higher than the supply voltage and a signal follower coupled to an output port of the voltage provider, the signal follower being configured to receive the internal supply voltage and the input signal, and to provide an output signal depending on the input signal.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: May 10, 2016
    Assignee: Infineon Technologies AG
    Inventors: Dietmar Straeussnigg, Andreas Wiesbauer, Elmar Bach
  • Patent number: 9225334
    Abstract: Buffers, integrated circuits, apparatuses, and methods for adjusting drive strength of a buffer are disclosed. In an example apparatus, the buffer includes a driver. The driver includes a pull-up circuit coupled to a supply voltage node and an output node, and also includes a pull-down circuit coupled to a reference voltage node and the output node. A drive adjust circuit is coupled to at least one of the pull-up circuit and the pull-down circuit, with the drive adjust circuit configured to receive a feedback signal and, based at least in part on the feedback signal, adjust a current conducted through the at least one of the pull-up and pull-down circuits.
    Type: Grant
    Filed: June 9, 2014
    Date of Patent: December 29, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Umberto Di Vincenzo, Marco Sforzin
  • Patent number: 9209752
    Abstract: A high-frequency amplifier includes: a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The high-frequency amplifier can achieve low distortion characteristics while ensuring operational stability in a wide band.
    Type: Grant
    Filed: March 4, 2013
    Date of Patent: December 8, 2015
    Assignee: Renesas Electronics Corporation
    Inventor: Isao Takenaka
  • Patent number: 9209760
    Abstract: According to one embodiment, a high-frequency, broadband amplifier circuit includes two drive elements, a matching circuit, a Balun circuit, a power supply, and a power supply circuit. The matching circuit includes two pattern circuits. The pattern circuits convey, in differential mode, the high-frequency signals supplied from the two drive elements. The Balun circuit converts the high-frequency signal to a single-end mode signal. The power supply circuit is connected one of the pattern circuits, and supplies at least the output of the power supply to the other pattern circuit.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: December 8, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Satoshi Ono, Takaya Kitahara, Shigeru Hiura
  • Patent number: 9190965
    Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: November 17, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hussain H. Ladhani, Gerard J. Bouisse, Jeffrey K. Jones
  • Patent number: 9166529
    Abstract: Provided is an amplifier circuit with cross wiring of direct-current signals and microwave signals, which includes: two branch sub-circuits being mirrors with each other and a third capacitor The sub-circuit includes a direct-current feeding circuit and a microwave signal circuit. The direct-current feeding circuit further comprising: a transistor core drain power-up port (Vds) of a heterojunction field effect transistor (FET), a first micro-strip inductor, a first capacitor, a pair of third inductors, a pair of branched second inductors. The microwave signal circuit further comprising: A pair of third inductors, a pair of first capacitors, a pair of second capacitors, a pair of ground inductors, a pair of fourth inductors, a serially connected fifth inductor.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: October 20, 2015
    Assignee: CHINA ELECTRONICS TECHNOLOGY GROUP CORPORATION NO. 55 RESEARCH INSTITUTE
    Inventors: Bin Zhang, Hongqi Tao
  • Patent number: 9124221
    Abstract: A wide bandwidth radio frequency amplifier is disclosed. The wide bandwidth radio frequency amplifier has a first signal path having a first input and a first output along with a first dual gate field effect transistor having a first-first gate coupled to the first input and a first drain coupled to the first output. The wide bandwidth radio frequency amplifier also includes a second signal path having a second input and a second output and a second dual gate field effect transistor having a second-first gate coupled to the second input and a second drain coupled to the second output.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: September 1, 2015
    Assignee: RF Micro Devices, Inc.
    Inventors: Ramakrishna Vetury, Jeffrey Blanton Shealy
  • Patent number: 9106187
    Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the control electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: August 11, 2015
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hussain H. Ladhani, Gerard J. Bouisse, Jeffrey K. Jones
  • Patent number: 9048793
    Abstract: A power amplifier configured to receive an AC input signal and output, based on the AC input signal, an output voltage via a first output voltage terminal and a second output voltage terminal. The power amplifier includes a first transistor and a second transistor connected in a push-pull configuration, a first inductor, a second inductor, and a first capacitor. The first output voltage terminal is located between the first inductor and the first transistor. The second output voltage terminal is located between the second transistor and ground. The first capacitor is configured to provide a first circuit path between the first output voltage terminal and the second output voltage terminal. The first circuit path functions as a short circuit for even harmonics of a fundamental frequency of the AC input signal but does not function as a short circuit for the fundamental frequency of the AC input signal.
    Type: Grant
    Filed: May 5, 2014
    Date of Patent: June 2, 2015
    Assignee: MARVELL WORLD TRADE LTD.
    Inventors: Poh Boon Leong, Ping Song, Sehat Sutardja
  • Patent number: 8766714
    Abstract: An amplifier component (1) provides a chip housing (40) and at least two amplifier elements (31, 32). Between at least two connections (51, 52 and 61, 62) of each amplifier element (31, 32), a parasitic capacitance (81, 82) is formed, wherein this parasitic capacitance (81, 82) is compensated by an inductive compensation element (2). The compensation element (2) itself is formed between two connecting contacts (101, 102) outside of the chip housing (40) by a connecting lug (2).
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: July 1, 2014
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Bernhard Kaehs
  • Patent number: 8766722
    Abstract: Disclosed is a Class-AB/B amplifier comprising a first output stage including a first plurality of amplification devices and a second output stage including a second plurality of amplification devices. According to one embodiment, the first output stage operates when the Class-AB/B amplifier is in a quiescent state and the second output stage operates when the Class-AB/B amplifier is in an active state. The Class-AB/B amplifier also comprises a level shifting circuit that adjusts a control voltage of the second output stage, where the level shifting circuit is adapted to activate the second output stage when the Class-AB/B amplifier enters the active state. Embodiments of the Class-AB/B amplifier may include a level shifting circuit that implements either a fixed or signal-dependent level shift, and a quiescent control circuit that substantially eliminates any systematic offset arising from the active feedback circuit inside the replica bias circuit.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: July 1, 2014
    Assignee: Broadcom Corporation
    Inventors: Sherif Galal, Alex Jianzhong Chen, Khaled Abdelfattah, Todd L. Brooks
  • Publication number: 20140155126
    Abstract: A push-pull amplifier has an input node and a series connection of two resistors. The series connection comprises a first terminal, a second terminal, and a third terminal. A first resistor of the two resistors is connected between the first terminal and the second terminal. A second resistor is connected between the second and third terminals. The input node is connected to the second terminal. A first controllable current source is connected to the first terminal of the series connection for sourcing a first current to the series connection. A second controllable current source is connected to the third terminal of the series connection for sinking a second current from the series connection. A first transistor and a second transistor are connected in push-pull configuration, wherein a control input of the first transistor is connected to the first terminal of the series connection and a control input of the second transistor is connected to the third terminal of the series connection.
    Type: Application
    Filed: November 30, 2012
    Publication date: June 5, 2014
    Inventors: Werner Schelmbauer, Josef Holzleitner
  • Patent number: 8688055
    Abstract: An amplifier integrated circuit (IC) including a push-pull amplifier having a push stage and a pull stage. A first loop of wire configured to form a first degeneration inductance of the push stage. A second loop of wire configured to form a first degeneration inductance of the pull stage. The first loop and the second loop are concentric. The first loop is connected to a reference potential. The second loop is connected to a supply voltage.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: April 1, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Brian T. Brunn, Sehat Sutardja, Xiaohua Fan, Gregory T. Uehara
  • Patent number: 8665024
    Abstract: An amplifier including: an output stage having two first power supply terminals capable of receiving a first voltage defined by first positive and negative variable potentials with respect to a reference potential; and a circuit for controlling the current in transistors of the output stage with a reference value, wherein the output stage includes a first and a second MOS transistors in series between the first two terminals, the junction point of this series association defining an output terminal of the amplifier; the control circuit includes two measurement MOS transistors having their respective sources and gates coupled to the respective sources and gates of the first and second transistors of the output stage; at least one control branch, comprising transistors in series between two terminals of application of a second voltage, defines nodes connected to the gates of the output transistors, said second voltage being greater than the first one.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: March 4, 2014
    Assignee: EASII IC SAS
    Inventors: Alexandre Huffenus, Serge Pontarollo
  • Patent number: 8653894
    Abstract: A push-pull amplifier is provided for amplifying an input signal, having first and second amplifier elements. Each of the amplifier elements has a current-emitting electrode, a current-collecting electrode, and a current-controlling electrode. The input signal is supplied to the current-controlling electrodes of the amplifier elements via a respective input connection and a respective input inductor arranged between the respective input connection and the respective current-controlling electrode. The current-collecting electrodes are connected via a respective supply inductor having a common supply voltage. The current-emitting electrode of each amplifier element is connected to the current-collecting electrode of the other amplifier element via a respective capacitor. The current-emitting electrodes are connected to output connections on which the output signal can be picked up, and to a reference potential via a respective output inductor.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: February 18, 2014
    Assignee: Siemens Aktiengesellschaft
    Inventor: Oliver Heid
  • Publication number: 20140009233
    Abstract: An amplification system is provided that comprises a push-pull amplifier system having a first power transistor series coupled with a second power transistor that alternately switch between a push-pull amplifier mode of operation and a single-ended amplifier mode of operation. In the push-pull amplifier mode, both the first power transistor and the second power transistor alternately conduct to provide an amplified output signal to an output load in response to an input signal having an amplitude that is greater than or equal to a threshold level. In the single-ended amplifier mode of operation, the first power transistor conducts and the second power transistor is disabled for amplification purposes in response to the input signal having an amplitude that is less than the threshold level.
    Type: Application
    Filed: July 9, 2012
    Publication date: January 9, 2014
    Inventors: George CABRERA, Dmitri BORODULIN
  • Publication number: 20130293307
    Abstract: A Doherty amplifier (100) is described which comprises an input terminal (102) for receiving an input signal (101) and an output terminal (103) for providing an amplified signal (104) of the input signal (101). The Doherty amplifier is supplied by a first supply voltage and a second supply voltage which have opposite polarities in respect to a reference level.
    Type: Application
    Filed: July 2, 2013
    Publication date: November 7, 2013
    Inventor: Lothar Schmidt
  • Patent number: 8536948
    Abstract: A power amplifier according to the present invention includes: an input-side transformer which has an annular primary coil which is a first metal line and a plurality of linear secondary coils which are second metal lines, and matches input impedance and divides the input signal into a plurality of split signals; push-pull amplifiers each including a pair of transistors for amplifying one of the split signals; and an output-side transformer which has an annular secondary coil which is a third metal line and a plurality of linear primary coils which are fourth metal lines, and combines the amplified split signals and matches output impedance, two input terminals of the pair of transistors being connected to each other via each of the second metal lines and two output terminal of the pair of transistors being connected to each other via each of the fourth metal lines.
    Type: Grant
    Filed: December 12, 2012
    Date of Patent: September 17, 2013
    Assignee: Panasonic Corporation
    Inventors: Yasufumi Kawai, Hiroyuki Sakai
  • Publication number: 20130207724
    Abstract: There is provided an amplifier arrangement comprising a main push pull amplifier (100) connected to receive an input signal and generate an amplified version of the input signal and an additional amplifier (624) that is a scaled down version of the main push pull amplifier. The main push pull amplifier (100) and the additional amplifier (624) are coupled in parallel to receive an input signal (122) and generate an amplified output signal (114), wherein the amplifier arrangement comprises optionally a high-pass filter (622) between the overall amplifier input (122) and the input of the additional amplifier (624). In order to reduce crossover distortions generated by the main push pull amplifier, the additional amplifier is designed to amplify the input signal during crossover, thus the output signal always follows the input signal.
    Type: Application
    Filed: June 13, 2011
    Publication date: August 15, 2013
    Applicant: NUJIRA LIMITED
    Inventor: Martin Paul Wilson
  • Publication number: 20130113568
    Abstract: An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 9, 2013
    Applicant: Marvell World Trade Ltd.
    Inventor: Marvell World Trade Ltd.
  • Patent number: 8405460
    Abstract: Integrated circuits with amplification circuitry are provided. The amplification circuitry may have an input terminal, an output terminal, a positive power supply terminal, and a ground terminal. The amplification circuitry may include first, second, and third stages. The first stage may provide biasing for the second stage. The second stage may provide biasing for the third stage. The second stage may provide paths for conveying an input signal from the input terminal to the third stage. The second stage may bias the amplifier to have low quiescent current and low shoot-through current. The second stage may prevent PVT variations such as supply voltage variations from affecting the quiescent current and shoot-through current of the amplifier. To increase the high-frequency response of the amplifier, capacitors may be added to the paths for conveying the input signal from the input terminal to the third stage.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: March 26, 2013
    Assignee: Aptina Imaging Corporation
    Inventor: Ken Hunt
  • Patent number: 8400220
    Abstract: Quiescent current control for Class AB output stages is provided that is responsive to a sum of current of the pull-up and pull-down transistors in the crossover region, and responsive to a minimum of the pull-up or pull-down transistors otherwise. Replicating transistors operate responsive to activation of the pull-up and pull-down transistors. Additional circuit elements provide a summed current output that corrects for quiescent current variation, while having good operation over PVT variations, and having minimal distortive effects. Use of scaled replicating transistors reduces the current in the quiescent current control circuit. Additionally, a current limiter or topology change may be used to reduce current spikes in replication of the output stage current. Adjustment of a reference current can also prevent turning off a non-active output element to reduce the need to stew the element back on.
    Type: Grant
    Filed: August 16, 2011
    Date of Patent: March 19, 2013
    Assignee: Adtran, Inc.
    Inventors: Daniel M. Joffe, Paul C. Ferguson
  • Patent number: 8368789
    Abstract: Systems and methods for providing one or more reference currents with respective negative temperature coefficients are provided. A first voltage is divided to provide a divided voltage, which is compared to a reference voltage (e.g., a bandgap reference voltage) to provide a control voltage. The first voltage and the one or more reference currents are based on the control voltage.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: February 5, 2013
    Assignee: Aptina Imaging Corporation
    Inventors: Chen Xu, Yaowu Mo
  • Patent number: 8346179
    Abstract: An amplifier integrated circuit (IC) includes a push-pull configuration including a push stage and a pull stage. A first loop of wire is configured to form a first degeneration inductance of the push stage. A second loop of wire is configured to form a first degeneration inductance of the pull stage. The first and second loops are concentric.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: January 1, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Brian Brunn, Sehat Sutardja, Xiaohua Fan, Gregory Uehara
  • Publication number: 20120313707
    Abstract: A push-pull amplifier is provided for amplifying an input signal, having first and second amplifier elements. Each of the amplifier elements has a current-emitting electrode, a current-collecting electrode, and a current-controlling electrode. The input signal is supplied to the current-controlling electrodes of the amplifier elements via a respective input connection and a respective input inductor arranged between the respective input connection and the respective current-controlling electrode. The current-collecting electrodes are connected via a respective supply inductor having a common supply voltage. The current-emitting electrode of each amplifier element is connected to the current-collecting electrode of the other amplifier element via a respective capacitor. The current-emitting electrodes are connected to output connections on which the output signal can be picked up, and to a reference potential via a respective output inductor.
    Type: Application
    Filed: January 21, 2011
    Publication date: December 13, 2012
    Inventor: Oliver Heid
  • Publication number: 20120299656
    Abstract: An amplifier component (1) provides a chip housing (40) and at least two amplifier elements (31, 32). Between at least two connections (51, 52 and 61, 62) of each amplifier element (31, 32), a parasitic capacitance (81, 82) is formed, wherein this parasitic capacitance (81, 82) is compensated by an inductive compensation element (2). The compensation element (2) itself is formed between two connecting contacts (101, 102) outside of the chip housing (40) by a connecting lug (2).
    Type: Application
    Filed: November 30, 2010
    Publication date: November 29, 2012
    Applicant: Rohde & Schwarz GmbH & Co., KG
    Inventor: Bernhard Kaehs
  • Patent number: 8279001
    Abstract: Several push-pull linear hybrid class H amplifiers are disclosed. A split power rail provides a positive supply rail and a negative supply rail in response to a power supply control voltage. A push-pull amplifier stage is powered by the positive and negative supply rails. The amplifier stage receives an input signal and provides a corresponding amplified output signal. A power supply control circuit provides the power supply control voltage in response to the smaller of the positive and negative supply rails, and the input signal.
    Type: Grant
    Filed: June 30, 2011
    Date of Patent: October 2, 2012
    Assignee: Audera Acoustics Inc.
    Inventors: John Barry French, Andrew John Mason
  • Patent number: 8279005
    Abstract: There is provided a method and apparatus for maintaining a bias current that flows through two transistors at a target level. The two transistors are both connected to form a series network between positive and negative voltage supply terminals. The bias current flows through the two transistors when the circuit is at equilibrium, and the threshold voltage of the transistors is controlled by controlling the voltage that is applied to the transistors bulk terminals. In addition to the two transistors, there is provided a control circuit that measures a circuit parameter that is indicative of the level of bias current flowing through the two transistors. In response to the measured parameter, the control circuit adjusts the bulk voltage levels of the two transistors so as to alter the transistors threshold voltages and maintain the level of bias current at a target level.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: October 2, 2012
    Assignee: NXP B.V.
    Inventors: Johannes H. A. Brekelmans, Lorenzo Tripodi
  • Patent number: 8242843
    Abstract: A push-pull amplifier including first to third current paths. The first current path includes first transistor allowing first current to flow through the first current path according to input signal. The second current path includes second transistor allowing second current having opposite phase to the first current to flow through the second current path according to the first current; first resistor; and third transistor connected to one end of the first resistor and having control terminal connected to the other end of the first resistor. The third current path includes output terminal; fourth transistor allowing current having the same phase as the first current to flow through the third current path according to the input signal; and fifth transistor allowing current having the same phase as the second current to flow through the third current path according to voltage of first node between the first resistor and the third transistor.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: August 14, 2012
    Assignee: Renesas Electronics Corporation
    Inventor: Tachio Yuasa
  • Publication number: 20120188016
    Abstract: Integrated circuits with amplification circuitry are provided. The amplification circuitry may have an input terminal, an output terminal, a positive power supply terminal, and a ground terminal. The amplification circuitry may include first, second, and third stages. The first stage may provide biasing for the second stage. The second stage may provide biasing for the third stage. The second stage may provide paths for conveying an input signal from the input terminal to the third stage. The second stage may bias the amplifier to have low quiescent current and low shoot-through current. The second stage may prevent PVT variations such as supply voltage variations from affecting the quiescent current and shoot-through current of the amplifier. To increase the high-frequency response of the amplifier, capacitors may be added to the paths for conveying the input signal from the input terminal to the third stage.
    Type: Application
    Filed: March 10, 2011
    Publication date: July 26, 2012
    Inventor: Ken Hunt
  • Publication number: 20120062320
    Abstract: Presently many audio chips suffer from pop issues, which is especially serious for single ended audio drivers. An audio pop is a disturbance in the output caused by a sudden transition of chip power, particularly when a chip is powered on or powered off. Furthermore, compensation networks included in the amplifiers on audio chips for stability offer a significant path for transmitting power disturbances to the output. Hence, circuitry is developed to suppress pops in the output stages of an amplifier.
    Type: Application
    Filed: November 18, 2011
    Publication date: March 15, 2012
    Inventors: Xin Fan, Christian Larsen, Lorenzo Crespi
  • Patent number: 8072270
    Abstract: Bias circuitry that may be used within a communications or other device includes a first current mirror having first and second transistors with sources coupled to ground and operable to receive a reference current at a drain of first transistor. A second current mirror has first and second transistors with drains coupled to a battery voltage supply. A third current mirror has first and second transistors with drains coupled to sources of the first and second transistors of the second current mirror, respectively. A biasing transistor couples between the second transistor of the first current mirror and the first transistor of the third current mirror and operable to receive a tuning input voltage at its gate. A resistive element coupled between the second transistor of the third current mirror and ground produces a bias voltage produced at a connection of the resistive element and the second transistor of the third current mirror.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: December 6, 2011
    Assignee: Broadcom Corporation
    Inventors: Ali Afsahi, Arya Reza Behzad, Vijay Ramachandra Reddy
  • Publication number: 20110248782
    Abstract: A reduction is achieved in the primary-side input impedance of a transformer (voltage transformer) as an output matching circuit without involving a reduction in Q-factor. An RF power amplifier includes transistors, and a transformer as the output matching circuit. The transformer has a primary coil and a secondary coil which are magnetically coupled to each other. To the input terminals of the transistors, respective input signals are supplied. The primary coil is coupled to each of the output terminals of the transistors. From the secondary coil, an output signal is generated. The primary coil includes a first coil and a second coil which are coupled in parallel between the respective output terminals of the transistors, and each magnetically coupled to the secondary coil. By the parallel coupling of the first and second coils of the primary coil, the input impedance of the primary coil is reduced.
    Type: Application
    Filed: June 22, 2011
    Publication date: October 13, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Masao Kondo, Yoshikuni Matsunaga, Kenta Seki, Satoshi Sakurai
  • Patent number: 8031003
    Abstract: An RF power amplifier includes a push-pull amplifier having field effect transistors. Temperature compensating bias circuitry provides a temperature compensated bias voltage to the transistors for decreasing the bias voltage thereof as temperature increases. The temperature compensating bias circuitry includes a temperature sensor generating a temperature signal. A first amplifier provides a first temperature dependent voltage based on the temperature signal. A second amplifier provides a second temperature dependent voltage based on the temperature signal. The first and second temperature dependent voltages change at substantially the same rate in response to the temperature signal. A potentiometer receives the first and second temperature dependent voltages such that a voltage across the potentiometer remains substantially constant when the first and second temperature dependent voltages change.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: October 4, 2011
    Inventor: Steven M. Dishop