Abstract: An operational amplifier wherein each of the active elements is comprised of complimentary coupled pairs of insulated gate type field effect transistors is provided. A first active stage and a second active stage are coupled together to perform a predetermined transfer function. Each active element in the first and second stages are insulated gate type field effect transistors that are coupled in complementary pairs with the first stage and second stage being coupled to define mirror pairs.

Abstract: An amplifier comprised of a field effect transistor whose gate electrode is adapted to receive an input signal. An impedance converter couples the input signal to the gate electrode of the field effect transistor, the impedance converter being formed of n impedance converting stages, each stage having a relatively low output impedance. A voltage limiting circuit is connected between the source of input signal and the gate electrode of the field effect transistor so as to limit the forward biasing of the field effect transistor. This voltage limiting circuit includes m voltage-limiting elements, wherein n and m are integers (1, 2, 3, . . . ) and n is equal to or greater than m. In a preferred embodiment, the amplifier is formed of two field effect transistors connected in push-pull relation, each field effect transistor being provided with an impedance converter and a voltage-limiting circuit as described above.

Abstract: The amplifiers of the present application all include at least two pairs of complementary, metal-oxide-semiconductor (COS/MOS) transistors, each pair quiescently biased to operate as a linear amplifier. An input signal is applied in one phase to the input circuit of one COS/MOS pair and in opposite phase to the input circuit of the other COS/MOS pair. The output signal appears across a load circuit which is connected at one terminal to the joined drain electrodes of one COS/MOS pair and at its other terminal to the joined drain electrodes of the other COS/MOS pair.

Abstract: A pulse amplifier formed of first and second field effect transistors, each exhibiting an inherent input capacitance at its gate electrode, the field effect transistors being connected in push-pull relation whereby their drain or source electrodes are connected to a common output terminal. First and second resistive circuits are connected in a pulse supply circuit to supply pulse signals to the respective gate electrodes of the field effect transistors. Each of the resistive circuits exhibits a higher resistance when a pulse is supplied therethrough to turn the respective field effect transistor ON and a lower resistance when the pulse is terminated to turn the respective field effect transistor OFF.

Abstract: A push-pull power amplifier for amplifying an input signal is described where anti-phase signals are generated from the input signal using a first hybrid junction for driving a pair of transistors and where anti-phase transistor output signals are combined in-phase on an output line by using a second hybrid junction. An independent port may be added to the hybrid junction for isolating and terminating even order harmonics and even order intermodulation products.

Abstract: A PMOS output buffer circuit permits interfacing directly with TTL, CMOS, and NMOS. A feedback circuit incorporated into the buffer acts to limit the drive current for negative potential output excursions. The feedback circuit is sensitive to device parameters that vary with processing so that the output characteristics can be set independently of process variables.

Abstract: A linear output amplifier for a charge coupled device arrangement in which the amplifier has a field effect switching transistor serially connected to a load element, the connection point between the transistor and the load element being the output of the amplifier and the gate terminal of the transistor being the input of the amplifier. The input of the amplifier is connected to the charge coupled device arrangement by either connecting it to the output diffusion zone of the same or by connecting it to a control electrode of the charge coupled device arrangement. Between the output of the amplifier and the input of the amplifier an additional transistor is provided with the aid of which the input can be connected to the output. Preferably, the load element is a field effect transistor and the load resistance which it provides can be varied by connecting a voltage source of desired amplitude to the gate terminal thereof.