Abstract: An amplifying circuit includes a first amplifier having a first input terminal, a second input terminal, and an output terminal for pushing an output current; a second amplifier having a first input terminal, a second input terminal, and an output terminal for pulling an output current; a circuit for detecting the output current of an operational amplifier in the second amplifier; and an offset voltage generating circuit for generating an offset voltage.

Abstract: A transformer-coupled amplifier includes a driver transformer in which a primary winding, a secondary winding, and a tertiary winding are wound on a core of a magnetic circuit, a drive signal source for supplying an AC drive signal superposed with a drive-stage DC current to the primary winding of the driver transformer, a power tube for extracting, from the secondary winding of the driver transformer, an AC signal corresponding to the AC drive signal supplied to the primary winding of the driver transformer, and for amplifying the AC signal from the secondary winding, and a DC magnetization control power source for supplying a predetermined magnetization control current to the tertiary winding of the driver transformer so as to change a degree of DC magnetization of the core of the magnetic circuit of the driver transformer. The DC magnetized state of the core of the transformer magnetized by the DC current is appropriately changed by the magnetization control current.

Abstract: An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness of implementation or the amplifiers excellent signal amplification characteristics.

Abstract: A transformer and an amplifier exhibiting a small lowering in self resonance frequency and having a large mutual inductance. By forming a first flat coil 12A, 31C, 86A, 96A, 102A on the semiconductor substrate surface 11A with the pattern wiring of any conductor and forming a second flat coil 12A, 31A, 31B, 86B, 96B, 102A, 102B along the pattern wiring of the first flat coil 12A, 31C, 86A, 96A, 102A on the insulator layer surface 13A spaced by an insulator layer having a predetermined thickness with the pattern wiring of any conductor, a large mutual conductance can be obtained and further a power amplification based on the class-B push-pull operation can be carried out by forming an amplifier 45, 75, 81 with the aid of a 5-terminal first output transformer 30.

Abstract: An amplifier circuit for a cable access television line amplifier has a circuit input and a circuit output and includes a first cascode amplifier having a first input and a first output, and a second cascode amplifier having a second input and a second output where the second cascode amplifier is coupled in a push-pull arrangement with the first cascode amplifier. The amplifier circuit further includes input circuitry for coupling the circuit input to the first and second inputs and output circuitry for coupling the first and second outputs to the circuit output. The first cascode amplifier includes a first field effect transistor coupled to the first input; the second cascode amplifier includes a second field effect transistor coupled to the second input; the first cascode amplifier further includes a third field effect transistor coupled to the first output; and the second cascode amplifier further includes a fourth field effect transistor coupled to the second output.

Abstract: A linear RF power amplifier employs push-pull pairs of high voltage mosfets. A minimum of transformers is employed, with an impedance matching transformer feeding an input balun supplying the input signal in push-pull to the gates of the mosfets. The drains are coupled to balanced legs of an output balun, followed by an output impedance matching transformer. Thermal sensors are employed for control of gate bias and also for control of drain voltage. The temperature sensors are mounted in the air inlet path and on the spreader plate of the heat sink. An aluminum or fiberglass strap is used to press the transistors against the spreader plate thereby ensuring good thermal contact with the transistor dies.

Abstract: The invention is an operational amplifier having an output stage for enhancing the output driver capability near the negative source voltage. The output stage of the invention includes a voltage detector in combination with a current redirector or redirecting arrangement. The voltage detector converts the voltage difference between the amplifier output and the input to the output stage of the amplifier to a control current, which is redirected at the positive source voltage and applied to the negative output driver. The current redirector, which is operably connected to the voltage detector, allows the amplifier output to be driven at full rated current (e.g., approximately 40 mA) close to the negative source voltage (e.g., within approximately 1.5 volts) while maintaining an output configuration appropriate for stability.

Abstract: A differential amplifier is connected to a push-pull-type source follower circuit that receives biphase signals. The source follower circuit has a first set of FETs including a first source follower FET and a first current source FET and a second set of FETs including a second source follower FET and a second current source FET. A first coupling capacitance element connects the first current source FET and the second source follower FET, and a second coupling capacitance element connects the second current source FET and the first source follower FET. A diode or a resistor connects the source terminals of the first and second current source FETs to a voltage source.

Abstract: An output stage of an amplifier contains N-channel high-side and low-side transistors for producing an output current. The gate drive circuitry for the transistors includes an N-channel transistor having its gate connected in common with the gate of the low-side transistor to the output of a high-gain input stage amplifier, and having its drain connected to the gate of the high-side transistor. This structure reduces distortion at the crossover between positive and negative output voltages and improves control of the quiescent current. Avoiding a P-channel low-side transistor also reduces the area required for the amplifier on an IC chip and eliminates clipping during negative swings of the output voltage. A capacitive coupling stage is used to prevent clipping during positive swings of the output voltage. When the gate drive for the high-side transistor goes low, a capacitor charges through a diode.

Abstract: An input driver stage for an audio power amplifier wherein the amplifier incorporates only N-channel VFETs in the output stage, the invention locks the currents in second stage (via a closed loop) which is directly connected to the VFET output stage thus allowing precise open loop predictive temperature compensated programming of the quiescent operating point of the VFET output stage into an acceptable linear area of operation--without fettering the amplifiers inherent straight forwardness OF implementation or the amplifiers excellent signal amplification characteristics.

Abstract: The amplifier stage comprises at the output two MOS power transistors in series between a positive supply line and earth, the gate of each of these being controlled by a respective amplifier. An input signal is applied to the input of these amplifiers so as to be compared with an output signal of the amplifier stage. The amplifiers are each provided with an inhibiting input with which it is possible to connect to earth the gate of the corresponding power transistor, and the amplifier stage comprises two transistors which act as switches achieving that either the one or the other of the inhibiting inputs is connected to earth, so that a simultaneous conduction of the power transistors is excluded.

Abstract: A high power radio frequency amplifier employs a power stage in which a bank of push-pull stages are connected in parallel. These power stages employ relatively low-cost high voltage MOSFETs. Because the devices are operated in their active regions, these MOSFETs are susceptible to drops in gain during operation due to heating of the transistor die. The gain fluctuation has a first, slower component that varies over a time of several minutes, and a second, faster component that varies over a span of seconds. The amplifier has B+ or drain voltage control to compensate for short-term (minutes) gain degradation and preamplifier gate voltage control to compensate for short-term (seconds) gain degradation.

Abstract: A detector circuit, for example for optical radiation, has a detector diode (20) and an amplifier circuit (30) integrated with the diode in the same silicon wafer for amplification of the diode signal. The diode is designed as a lateral diode. The diode and the amplifier circuit are both produced in a homogeneously weakly doped silicon wafer (1).

Abstract: A biasing arrangement for a quasi-complementary output stage having first and second transistors of a first type, where at least one of the transistors is driven by a third transistor of a second type. The inventive biasing arrangement comprises a first circuit for biasing the third transistor and a second circuit having a third circuit for providing an input signal to the first transistor and a fourth circuit for providing the input signal to the first circuit. In a particular implementation, the first circuit is connected between the input terminals of the first and the third transistors. The third circuit is a fourth transistor having a first terminal connected to a first source of supply, a second terminal connected to a source of the input signal and a third terminal connected to a second source of supply. The third terminal of the fourth transistor is connected to the second source of supply via a first resistor.

Abstract: A transformerless solid state audio amplifier which exhibits the superior linearity and saturation characteristics of a triode vacuum tube amplifier, and which has an output impedance which nominally matches the impedance of a speaker is disclosed in which the gate of a low impedance transistor having triode-like current-voltage I-V characteristics is electrically coupled to an audio input source, the drain is electrically coupled to a supply voltage, a choke is connected in series between the drain and the supply voltage, and a speaker is coupled to the drain lead in parallel with the choke. Alternatively, a high impedance current source can be used instead of the choke.

Abstract: A Dual-Sided Push-Pull Amplifier for providing a high-gain yet low-cost amplifier capable of operating at frequencies extending above 1 GHz is disclosed. The present invention may be used in any application in which low cost amplification may be desired, including transmitters, antenna arrays, radars, light wave modulators, mixers, local oscillators, driver amplifiers and microwave ovens. One of the preferred embodiments of the invention (10d/10e) utilizes two pairs of field effect transistors (FETs) (22U and 22L & 24U and 24L) mounted in registration on both faces (12a & 12b) of a dual-sided dielectric substrate (12). The sources (22US and 22LS & 24US and 24US) on both faces of the FETs (22 & 24) are electrically coupled and are located at a minimum distance from their mates on the opposite faces of the substrate (12) to reduce inter-FET source lead inductance. The FETs (22 & 24) are coupled to a set of conductors (16a, 16b, 16c & 16d) which are formed on the substrate (12).

Abstract: A linear RF power amplifier employs push-pull pairs of high voltage mosfets. A minimum of transformers is employed, with an impedance matching transformer feeding an input balun supplying the input signal in push-pull to the gates of the mosfets. The drains are coupled to balanced legs of an output balun, followed by an output impedance matching transformer. Thermal sensors are employed for control of gate bias and also for control of drain voltage. The temperature sensors are mounted in the air inlet path and on the spreader plate of the heat sink. An aluminum or fiberglass strap is used to press the transistors against the spreader plate thereby ensuring good thermal contact with the transistor dies.

Abstract: Although known because of high packaging inductances and thought to be wholly unsuitable for RF amplifiers, high voltage power switching MOSFETs of the type having coplanar leads having inductances on the order of between 8 nH and 15 nH are used in an RF amplifier. The individual devices operate on a high impedance load line to render the high inductance insignificant. The circuit configuration presents a high impedance to the output, eliminating the need for expensive combiners and low inductance packaging.

Abstract: An improved power operational amplifier device is disclosed which provides a floating buffer having a first and second RC time constant for controlling a first bank of MOSFET transistors in an output portion of the device. In addition, the power operational amplifier includes a fixed buffer having a third RC time constant for controlling a second bank of MOSFET transistors located in an output portion of the device. A current limit section is coupled to both the floating buffer and the fixed buffer, and, in addition, the current limit section of the improved power operational amplifier has an oscillation stabilizer portion for limiting oscillations of output current during output stage current limit operation. The device also includes an output portion coupled to each of the floating buffer, the fixed buffer, and the current limit section.

Abstract: An improved push-pull amplifier having a driver circuit for driving a source follower output transistor. The driver circuit includes a replicating transistor having electrical characteristics substantially similar to those of the source follower transistor, a buffer amplifier, and a circuit, coupled to the replicating transistor and the buffer amplifier, for summing the voltage across the replicating transistor and the buffer output signal to provide a gate signal to the source follower output transistor. A cross current feedback circuit regulates the quiescent current flow through the output transistors by adjusting the gate signal provided to the upper, source follower output transistor in response to a sensed current flow through the lower output transistor.

Abstract: A symmetrical amplifier includes a current mirror circuit and a current splitting circuit. The current splitting circuit splits up an input signal applied to the amplifier as a function of the signal polarity. Negative input currents are applied to the current mirror circuit whose controlled output current is applied to a control input of a first current amplifier circuit arranged in the amplifier. In order to insure symmetrical operation of the amplifier, positive input currents flowing into the amplifier are applied to a control input of a second current amplifier circuit arranged in the amplifier. The second current amplifier circuit is the same as the first current amplifier circuit. The first current amplifier circuit is connected to a positive supply voltage and the second current amplifier circuit is connected to a negative power supply voltage, and the two current amplifier circuits operate into a common load at their output ends.

Abstract: The gate of a first source-grounded transistor and the input of a buffer circuit are directly connected to an input terminal of a class-AB push-pull circuit. An input signal directly drives the first source-grounded transistor and is transmitted through the buffer circuit to a voltage-to-current converter and converted into a current signal. On receipt of the current signal, an inverting amplifier develops a voltage of reversed polarity which is applied to the gate of a second source-grounded transistor to drive the second transistor. The drains of the first and second transistors are connected to each other and their connecting point serves as an output terminal of the circuit. A class-AB push-pull drive circuit having such an arrangement requires a significantly reduced input signal voltage and a reduced power supply voltage.

Abstract: A high-frequency power amplifier comprises a pair of FETs, a divider which supplies opposite-phase versions of a signal to be amplified to the FETs, distributed-parameter transmission lines connected respectively at one ends thereof to output electrodes of the FETs, and a combiner which combines signals appearing at another ends of the transmission lines into a signal of a common phase. Stubs which short-circuit for even harmonics included in output signals of the FETs are connected respectively to the transmission lines at positions distant from the output electrodes of the FETs by a multiple of a quarter wavelength of the fundamental wave included in the output signals of the FETs.

Abstract: A high frequency amplifier containing: a constant envelope signal generation circuit for transforming an input signal to form two constant envelope signals where phases of the constant envelope signals correspond to an amplitude of an envelope of the input signal; two amplifying circuits for separately amplifying two constant envelope signals; and a power synthesizing circuit for synthesizing the first and second amplified signals to generate an amplified signal of the input electric signal, and reflecting remaining components of the first and second amplified signals which remaining components remain in the above synthesizing operation, toward the first and second amplifying circuits.

Abstract: A CMOS integrated circuit incorporating both logic functions and analog functions. The latter are subjected to noise from the logic transitions by means of supply conductors. To avoid disturbing the rest point of an amplifier by this supply noise, without using compensation circuits which would increase the number of pins of the integrated circuit, it is proposed to supply a pair of complementary transistors forming an amplifier stage by identical incoming and outgoing current generators. These generators are transistors copying a current from a current mirror circuit which includes a pair of complementary transistors connected between the two power supply lines.

Abstract: In a particular embodiment, the invention is directed to a composite MMIC amplifier comprising a plurality of active devices (e.g., FET, HBT, HEMT) arranged on a semiconductor substrate and having inputs and outputs. A pair of input and output transmission lines are coupled in antiphase arrangement to corresponding inputs and outputs of alternate active devices. Each pair of input transmission lines has branched portions extending from a common polarized input terminal. Each branched portion of like polarity extends to a corresponding alternate input and output of an active device and crosses a branched portion of opposite polarity without interference. Impedance matching means is coupled across antiphase pairs of inputs and outputs of adjacent active devices and forms a virtual ground therebetween thereby simplifying the impedance matching circuit.

Abstract: A radio frequency amplifier includes a first pair of quadrature couplers arranged to provide in response to an input signal first and second radio frequency signals having equal amplitudes and a first single-ended amplifier is fed by said first radio frequency signal to provide at an output thereof an amplified first signal having frequency components corresponding to a fundamental frequency of the input signal and second order products of the input signal. A second single-ended amplifier is fed by said second radio frequency signal for providing at an output thereof an amplified, second signal having second order products of the input signal and 180.degree. phase shifter frequency of the input signal.

Abstract: A cryogenically-cooled RF power amplifier utilizes a plurality of metal-oxide-semiconductor field-effect transistors configured on a heat sink having at least one surface in contact with a cryogenic fluid, and having input means for coupling RF driving power into the plurality of cryogenically-cooled MOSFETs and output means for coupling an amplified level of RF power from the cooled MOSFETs to an antenna.

Abstract: Apparatus and method for parallel operation of radio frequency transistor amplifier circuits in a Class D mode of operation at radio frequency signal ranges without the use of frequency limiting components is disclosed. A driver circuit provides the input signals for each radio frequency transistor amplifier circuit. A transformer is disclosed that combines the output signals of the radio frequency transistor amplifier circuits while matching the amplifier circuit impedance and the transformer load impedance (i.e., the antenna impedance). The transformer eliminates the need for DC blocking capacitors between the primary and secondary windings of the transformer. The transformer/power combiner includes a plurality of (1:1) transformer units having the unit input terminals (power amplifier output signals) coupled in parallel and having unit output terminals coupled in series.

Abstract: A push-pull output circuit which is powered by a 5-V supply voltage and in which the "push" part comprises a PMOS transistor and the "pull" comprises a PMOS transistor and an NMOS transistor. The NMOS transistor is driven via a detection circuit so that no hot carrier stress occurs in the NMOS transistor.

Abstract: The first (T.sub.1) and the second (T.sub.2) output transistor of an amplifier arrangement are push-pull driven by means of a drive circuit (10) having two transistors (T.sub.11, T.sub.12) which are each loaded by a current source (T.sub.13, T.sub.14). Currents which are a measure of the currents flowing through the first (T.sub.1) and the second (T.sub.2) output transistor are generated by first (20) and second (30) current measuring means. These currents are applied to a negative feedback means (40) which controls the current intensity of the current sources (T.sub.13, T.sub.14) in such a way that the harmonic mean value of the currents flowing through the first (T.sub.1) and the second (T.sub.2) output transistor is substantially equal to a reference value.

Abstract: A push-pull, small signal amplifier arrangement, which employs Metal Oxide Semiconductor/Field Effect Transistors. Depletion type are employed in the first stage, while enhanced type are employed in the second stage. The two stages are directly connected together and means for controlling the gain of both stages simultaneously are included. Also disclosed are a number of configurations for various applications.

Abstract: A series biasing arrangement for a pair of junction field effect transistors (JFETs), which may be used in RF amplifiers, mixers or oscillators, comprises connecting the JFETs together in series, with the gates of the two JFETs selectively connected to different reference potentials. The first FET is also connected to the DC voltage source. In one embodiment of the invention, two operational amplifiers, whose output leads are connected to the gates of corresponding JFETs have their noninverting input leads connected to selected points on a voltage divider made up of three resistors and their inverting input leads each connected to the source of a corresponding JFET. The drain to source voltage drops across the JFETs are controlled solely by the values of two of the resistors in the three resistor voltage divider. The bias current through the series-connected JFETs can be controlled independently of the drain to source voltage drops across each of the JFETs.

Abstract: Signals applied to the gate of an enhancement-mode field effect transistor by resistive coupling, via a dc-blocking capacitor, are self-biased. The self biasing is carried out by detecting the signal amplitude and applying a portion of the direct voltage from this detection to the gate of the field effect transistor through the coupling resistor.

Abstract: A high-gain, high-frequency, high-power, push-pull amplifier employing a pair of static induction transistors (SIT's) in common-source configuration. A pair of capacitances each of approximately the same capacitive value as the drain-to-gate parasitic feedback capacitance of each SIT are cross-coupled between the drains and gates of the pair of SIT's to neutralize the drain-to-gate capacitances and provide stable operation.

Abstract: A series biasing arrangement for a pair of junction field effect transistors (JFETs), which may be used in RF amplifiers, mixers or oscillators, comprises connecting the JFETs together in series, with the gates of the two JFETs selectively connected to different reference potentials. The first FET is also connected to the DC voltage source. In one embodiment of the invention, two operational amplifiers, whose output leads are connected to the gates of corresponding JFETs have their noninverting input leads connected to selected points on a voltage divider made up of three resistors and their inverting input leads each connected to the source of a corresponding JFET. The drain to source voltage drops across the JFETs are controlled solely by the values of two of the resistors in the three resistor voltage divider. The bias current through the series-connected JFETs can be controlled independently of the drain to source voltage drops across each of the JFETs. The two FETs need not be closely matched.

Abstract: High voltage, high frequency amplifier employing power transistors. The amplifier provides parallel ac signal amplification paths through each transistor and a single dc power path through the transistors in series. In one embodiment two FET's have their source electrodes connected to an input terminal and their drain electrodes connected to an output terminal so as to provide two parallel ac amplifying paths while blocking dc current flow. The drain electrode of the first FET is connected through an RF choke to source of dc operating potential, and its source electrode is connected through an RF choke to the drain electrode of the second FET. The gate electrode of the second FET is connected to ground. A single dc conductive path is thus provided between the source of operating potential and ground through the two FET's in series.

Abstract: High voltage, high frequency amplifier employing power transistors. The amplifier provides parallel ac signal amplification paths through each transistor and a single dc power path through the transistors in series. In one embodiment two FET's have their gate electrodes connected to an input terminal and their drain electrodes connected to an output terminal so as to provide two parallel ac amplifying paths while blocking dc current flow. The drain electrode of the first FET is connected through an RF choke to a source of dc operating potential, and its source electrode is connected through an RF choke to the drain electrode of the second FET. The source electrode of the second FET is connected to ground through a zener diode. A single dc conductive path is thus provided between the source of operating potential and ground through the two FET's in series.

Abstract: An operational amplifier circuit including an output stage which requires relatively low operating current to achieve a desired transconductance in order to permit improved driving of a capacitive load.

Abstract: The present invention relates to a driver circuit for use in connecting a source of RF drive voltage to a power amplifier stage. The driver is comprised of a transformer having a center tap, a first terminal connected to a first branch of the transformer and a second terminal connected to a second branch of the transformer. A first capacitor is connected between the source and the center tap. A second capacitor is connected across the first and second terminals. The first terminal is connected to the input of the amplifier and the dummy load is connected to the second terminal. The dummy load can be replaced by a second power amplifier stage having an input impedance similar to the input impedance of the first mentioned power amplifier.

Abstract: A MOS power amplifier circuit comprised of a load driver including two p-channel MOSFETs connected in series, a preamplifier for amplifying an analog input signal and supplying the amplified one to the gate of one of the MOSFETs and for rendering the impedance of the two MOSFETs low; and an inverting amplifier for invert-amplifying the output signal from the preamplifier and supplying the amplified one to the gate of the other MOSFET. The operating voltage of the preamplifier and the inverting amplifier is higher than that of the load driver.

Abstract: A low noise power amplifier in which a buffer including a field effect transistor coupled in a source follower configuration is interposed between a voltage amplifying stage and a power amplifying stage, the latter utilizing a single-ended push-pull emitter follower configuration. A cascode transistor is cascade connected with the field effect transistor. A constant current source is provided for supplying current to the source of the field effect transistor. Field effect transistor buffers are preferably provided between the voltage amplifying stage and both positive and negative amplifying portions of the power amplifying stage.

Abstract: A condenser microphone including an electrostatic transducer provided with at least one conductive vibrating plate and at least one fixed electrode arranged opposite the vibrating plate, and through which output voltages can be obtained in response to an acoustic input, and an impedance converter circuit connected to output terminals of electrostatic transducer, wherein said electrostatic transducer is arranged in such a way that two output voltages out of phase with respect to each other are obtained through its first and second output terminals, and said impedance converter circuit includes first and second field effect transistors of same conductivity channel type whose gates are connected to output terminals of electrostatic transducer, respectively, and whose drains are connected to a DC power supply, first and second impedance elements connected between gates of field effect transistors and ground to hold the DC potential of each gate at ground level, and an output circuit means for generating an output

Abstract: A class D power amplifier employing two N-channel field-effect power transistors includes an arrangement which develops a biasing voltage for the upper N-channel transistor. The biasing voltage exceeds the magnitude of the power source voltage so that the upper N-channel transistor can exhibit low channel ON resistance whereby substantially the entire supply voltage is applied to a load device. A transistor switch becomes conductive across a resistance which couples biasing voltage to the upper N-channel transistor when the biasing voltage exceeds the supply voltage.

Abstract: A broadband distributed push-pull amplifier capable of amplifying frequencies from zero to 20 Gigahertz is disclosed having a singly terminated output. The singly terminated construction of the amplifier precludes the need for a termination resistor on the output, and thereby enables substantially all the output power to be utilized.

Abstract: A CMOS operational amplifier includes a biasing scheme for supplying current to a differential stage. A push-pull output stage includes a current sinking transistor which is coupled to a first output of the differential stage. A current mirror is coupled between a second output of the differential stage and the gate electrode of a current sourcing device in the output stage.

Abstract: The output section of a musical instrument performance amplifier comprises a pair of high impedance power field effect transistors connected to an output transformer to provide a relatively low push-pull drain load that effectively presents a high impedance constant current source to a loudspeaker. The amplifier, having such high impedance constant current source output, amplifies and sustains instrument sound, provides large amounts of power to the speaker over a wide range of speaker impedances, and enables production of high power harmonics.

Abstract: A transistor amplifier of the invention comprises a low power solid state simulator for a push-pull transformer-coupled vacuum tube power amplifier. The simulator develops overtones and distortion characteristics associated with a vacuum tube power amplifier, thereby producing a vacuum tube sound from the transistor amplifier.

Abstract: An audio power amplifier comprising a first stage voltage amplifier circuit, a second stage voltage amplifier circuit and a last stage power amplifier circuit. The first stage voltage amplifier circuit is of differential amplifier type including a pair of field effect transistors for voltage amplifying an audio frequency signal. The second stage voltage amplifier circuit includes a field effect transistor for voltage amplifying the output signal from the first stage voltage amplifier circuit. The second stage voltage amplifier circuit also serves as a drive stage. The last-stage power amplifier circuit includes a pair of field effect transistors having drain voltage versus drain current characteristics similar to static plate voltage versus plate current characteristics of a triode vacuum tube for power amplifying the output signals of the second stage voltage amplifier circuit.

Abstract: A biasing arrangement comprising: a pair of gate biasing resistors for Field Effect Transistors forming a push-pull amplifier, and a constant-current supplying means having two output terminals for supplying stabilized gate bias voltages to the transistors. The constant-current supplying means can be adjusted manually or automatically for setting a suitable operation point of the transistors and for balancing their bias voltages. By this arrangement, amplifiers can have a simplified structure. This arrangement greatly simplifies biasing means which also can be easily regulated.