Having Feedback Means Acting As Variable Impedance Patents (Class 330/282)
  • Patent number: 7339434
    Abstract: A variable gain amplifier uses a geometric ladder circuit that produces a transfer function having substantially uniform steps measured in dB. Where the ladder has a plurality of substantially identical resistor rungs of a first resistance, one stile that is a conductor connecting the rungs, and another having a series of substantially identical resistors of a second resistance, then for identical inputs at different rungs, the output signal at an end of the ladder is attenuated by a number of substantially equal steps, one for each rung between input and output. For a ladder with a base rung R, an output at an end opposite the base rung, stile resistors of resistance ?R, and other rungs all of resistance (1+(1/?))R, the step size is 20 log10(1+?). By using such ladders in op-amp feedback loops, chaining different stages with different values of ?, coarse and fine gain adjustment can be provided.
    Type: Grant
    Filed: March 31, 2006
    Date of Patent: March 4, 2008
    Assignee: Marvell International Ltd.
    Inventors: Alireza Shirvani-Mahdavi, George Chien
  • Publication number: 20080032634
    Abstract: A system for controlling the power output of a power amplifier includes a power amplifier through which a transmit signal having an amplitude-modulated (AM) component and a phase-modulated (PM) component is passed and amplified, the power amplifier comprising a forward path, a feedback signal comprising a portion of the output of the power amplifier, a first control loop configured to receive the feedback signal and configured to apply an amplitude modulated (AM) signal to the power amplifier and configured to control the gain of the power amplifier, a second control loop configured to receive the feedback signal and configured to correct for offsets in the forward path and to linearize the first control loop; and a third control loop configured to receive the feedback signal and configured to control the phase of the PM component of the transmit signal.
    Type: Application
    Filed: June 29, 2007
    Publication date: February 7, 2008
    Inventors: Rahul Magoon, Morten Damgaard, Roberto Aparicio Joo, Scott D. Kee, Ichiro Aoki
  • Patent number: 7304543
    Abstract: Devices and methods for processing signals using a Burst-Mode TIA that meets EPON and GPON specifications are disclosed herein. A signal provided by a power detector is processed with the appropriate gain by using a gain selector which includes a feedback circuit to choose the gain internally, thereby eliminating the need for an external control. Further embodiments of the invention include power detectors featuring a low-pass filter, a peak detector, and/or an envelope detector. Further embodiments of the invention include a Freeze function circuit for maintaining a current gain. Further embodiments of the invention apply appropriate gains when bursts with substantially different power levels are received consecutively, and prevent the gain from being changed during a burst. In this method, a two-pole low-pass filter with an undamped response function is used.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: December 4, 2007
    Assignee: PMC-Sierra Israel Ltd.
    Inventor: Raanan Ivry
  • Patent number: 7299015
    Abstract: According to a transmitting output control circuit, one end of a coupling capacitor and one end of main line of a directional coupler are coupled with an output terminal of a power amplifier. A switch for coupling the other end of the coupling capacitor and one end of a sub line of the directional coupler with an anode of a first diode or a second terminating resistor is formed in a power amplifying apparatus. Any one of the coupling capacitor and the directional coupler is coupled by switching the switch. By using this structure, the stable transmitting power control circuit, which can be used in a wide dynamic range necessary for detecting a transmitting output signal level, can be provided.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: November 20, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroki Iwamiya, Yuji Osumi
  • Patent number: 7292097
    Abstract: In some embodiments, an apparatus includes an amplifier circuit and a bias circuit coupled to the amplifier. The amplifier circuit includes an input port and an output port, an input port circuit element coupled to the input port, an output port circuit element coupled to the output port, and an internal signal path to couple the input port circuit element to the output port circuit element. The output port is coupled to the input port, the bias circuit, and the internal signal path.
    Type: Grant
    Filed: December 10, 2004
    Date of Patent: November 6, 2007
    Assignee: Intel Corporation
    Inventor: Stewart S. Taylor
  • Patent number: 7292100
    Abstract: An interpolated variable gain amplifier (VGA) utilizes multiple active feedback cells. The active feedback cells may be implemented as transconductance (gm) cells that replicate gm cells in the interpolated input stages.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: November 6, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Vincenzo DiTommaso
  • Patent number: 7279977
    Abstract: An integrated circuit includes a resistive circuit with reduced mismatch that includes a primary resistive network with several main resistances (Rp) each having the same theoretical main value. It also includes an auxiliary resistance (Rau) having an auxiliary theoretical resistive value equal to the product or to the quotient of the theoretical main resistive value by ?{square root over (2)}. All these resistances are connected together so as to attribute a theoretical overall resistive value to the primary resistive network equal to the theoretical auxiliary resistive value.
    Type: Grant
    Filed: April 1, 2005
    Date of Patent: October 9, 2007
    Assignee: STMicroelectronics SA
    Inventor: Kuno Lenz
  • Patent number: 7265616
    Abstract: In a charge amplifier, an operational amplifier is provided. The operational amplifier has an inverting input terminal, a non-inverting input terminal, and an output terminal. An adjustable feedback resistor element is provide to be connected between the inverting terminal and the output terminal. A resistance adjusting circuit is provided to be electrically connected to the adjustable feedback resistor element. The resistance adjusting circuit adjusts the resistance of the adjustable feedback resistor element to a first resistance during a first predetermined period after power-on. The resistance adjusting circuit also adjusts the resistance of the adjustable feedback resistor element to a second resistance after the first predetermined period has elapsed. The second resistance is higher than the first resistance.
    Type: Grant
    Filed: October 20, 2005
    Date of Patent: September 4, 2007
    Assignee: DENSO CORPORATION
    Inventors: Takao Tsuruhata, Hajime Ito
  • Patent number: 7262655
    Abstract: A transimpedance amplifier is provided which includes a feedback path. The feedback path includes a feedback resistor and a voltage generator. The feedback resistor has a parasitic capacitance associated therewith. The feedback resistor also has a first node at a first voltage. The voltage generator can be capacitively coupled to the feedback resistor at a second node via the parasitic capacitance. The voltage generator is configured to generate a second voltage at the second node which is substantially equal to the first voltage. This prevents a current from flowing through the parasitic capacitance thereby reducing and/or eliminating the effect of the parasitic capacitance on the transimpedance amplifier.
    Type: Grant
    Filed: April 28, 2005
    Date of Patent: August 28, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Dejan Mijuskovic
  • Patent number: 7256648
    Abstract: In one embodiment, the present invention includes a circuit comprising an amplifier having an input terminal, an output terminal, a positive supply voltage, and a negative supply voltage. The amplifier is configured to have a first gain. A variable feedback circuit is coupled between the input terminal and the output terminal. The difference between the voltage on the output terminal and input terminal is received by the variable feedback circuit, which changes the gain of the circuit and reduces distortion.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: August 14, 2007
    Assignee: PacificTech Microelectronics, Inc.
    Inventors: Hideto Takagishi, Simon Tsai
  • Patent number: 7245179
    Abstract: A gain-controlled transimpedance amplifier circuit that comprises a first gain unit including an input for receiving a first current and an output, a current source for providing a second current, a second gain unit including an input and an output, a first impedance unit of a first impedance coupled in parallel with the second gain unit, and a comparator including an output, a first input coupled to the output of the first gain unit, and a second input coupled to the output of the second gain unit.
    Type: Grant
    Filed: October 4, 2004
    Date of Patent: July 17, 2007
    Assignee: Industrial Technology Research Institute
    Inventor: Chien-Fu Chang
  • Patent number: 7227246
    Abstract: An apparatus comprises a first substrate and a second substrate. The first substrate includes an optoelectronic device and a matching circuit. The second substrate includes a driver circuit. A frequency response of the optoelectronic device is changed by the matching circuits. The first substrate is coupled to the second substrate via respective bond pads from the first and second substrates such that the matching circuit is interposed between the optoelectronic device and the driver circuit.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: June 5, 2007
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventor: Peter Henry Mahowald
  • Patent number: 7212749
    Abstract: An Improved Signal Receiver Having Wide Band Amplification Capability is disclosed. Also disclosed is a receiver that is able to receive and reliably amplify infrared and/or other wireless signals having frequency bandwidths in excess of 40 MHz. The receiver of the present invention reduces the signal-to-noise ratio of the received signal to ?th of the prior systems. The preferred receiver eliminates both the shunting resistor and the feedback resistor on the input end by amplifing the signal in current form. Furthermore, the receiver includes transconductance amplification means for amplifying the current signal without the need for Cascode stages. Finally, the receiver includes staged amplification to amplify the current signal in stages prior to converting the signal into a voltage output.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: May 1, 2007
    Assignee: ZiLOG, Inc.
    Inventors: T. Allan Hamilton, Alan Grace
  • Patent number: 7196577
    Abstract: A selectable-gain amplifier selectively couples different capacitors and feedback networks to a gain stage to provide operating characteristics that may include constant bandwidth operation. An interpolated VGA includes pairs of gm cells with cross-connected outputs and may include output cascodes. A dual-rank interpolator utilizes a correction current with a second-order temperature characteristic which may compensate for temperature effects in the transistor ranks.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: March 27, 2007
    Assignee: Analog Devices, Inc.
    Inventor: Eberhard Brunner
  • Patent number: 7180366
    Abstract: Data signal amplification and processing circuitry with multiple signal gains for increasing dynamic signal range. An incoming data signal is processed in accordance with multiple signal gains. The resultant signals have multiple signal values which are compared to predetermined lower and higher thresholds.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: February 20, 2007
    Assignee: Varian Medical Systems Technologies, Inc.
    Inventors: Pieter Gerhard Roos, Edward Seppi, Richard Colbeth, Gary Virshup, Ivan Petrov Mollov
  • Patent number: 7157973
    Abstract: Provided a method of reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The method includes forming sets of parallel connected resistors, each set corresponding to one of the impedance devices on the IC. Each set also includes two or more parallel resistor paths, each resistor path including two or more cascaded resistors and has a total impedance value substantially equal to the predetermined impedance value of its corresponding impedance device. Finally, the method includes configuring the sets of parallel resistor paths to form an interdigital structure across the substrate when the electrical circuit is placed on the IC.
    Type: Grant
    Filed: April 12, 2005
    Date of Patent: January 2, 2007
    Assignee: Broadcom Corporation
    Inventor: David A. Sobel
  • Patent number: 7154330
    Abstract: Stability compensation for an amplifier with adjustable gain is provided via adjustable capacitance coupled to an input of a gain element within the amplifier. Gain of the amplifier is adjusted by an adjustable resistance coupled between the input and output of the gain element. The adjustable capacitance and the adjustable resistance determine the frequency of a dominant pole of the amplifier.
    Type: Grant
    Filed: May 12, 2004
    Date of Patent: December 26, 2006
    Assignee: Avago Technologies Fiber IP (Singapore) Pte. Ltd.
    Inventor: Irene Quek
  • Patent number: 7142059
    Abstract: The invention provides an amplifier arrangement which is of multistage design. The output transistor in the output stage has a coupling path between its control input and its controlled path. The coupling path comprises a series circuit comprising a Miller compensation capacitance and a resistance with a controllable resistance value. It is thus possible to ensure stable operation of the amplifier regardless of bias and load conditions while simultaneously reducing the quiescent current drawn.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: November 28, 2006
    Assignee: Infineon Technology AG
    Inventors: Axel Klein, Ralf-Rainer Schledz, Marcin Augustyniak
  • Patent number: 7138869
    Abstract: An amplifier circuit having a high time constant. An operational amplifier includes a non-converting input terminal coupled to a ground, a converting input terminal and an output terminal. A first resistor network including at least one stage is coupled between the converting input terminal and the output terminal. Each stage of the first resistor network includes a first node, a first current path and a second current path connected to the first node. The first current path of each stage of the first resistor network is connected to the first node of the next stage, the second current path of each stage of the first resistor network is grounded, and the first current path of the first stage of the first resistor network is connected to the converting input terminal. A loading unit is coupled between the converting input terminal and the output terminal.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: November 21, 2006
    Assignee: Realtek Semiconductors Corp.
    Inventors: Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai, Wen-Chi Wang
  • Patent number: 7138873
    Abstract: A low distortion filter circuit implementing variable gain amplification (VGA). An aspect of the present invention increases the degrees of freedom (number of components which can be independently programmed/changed to corresponding desired values) to achieve a desired combination of D.C. gain and filter characteristics (e.g., corner frequency, Q-factor, notch frequency, etc.). Such additional degrees of freedom are attained by including additional components in either on input block or a feedback block (implemented with reference to an operational amplifier), and by redesigning the other block using principles such as admittance concellation to remove the effects of such additional components. The blocks are designed such that a terminal of the programmable components is connected to a fixed/constant voltage (e.g., ground). Embodiments implementing bi-quad single amplifier with and without notch are disclosed.
    Type: Grant
    Filed: November 17, 2004
    Date of Patent: November 21, 2006
    Inventors: Gaurav Chandra, Prakash Easwaran, Sumantra Seth
  • Patent number: 7123098
    Abstract: A method and apparatus to provide automatic gain control and offset correction in a transimpedance amplifier.
    Type: Grant
    Filed: March 15, 2004
    Date of Patent: October 17, 2006
    Assignee: Intel Corporation
    Inventors: Brandon Bongkee Bae, Martin Sandor
  • Patent number: 7076224
    Abstract: A method and device are disclosed for receiving digital television signals by a frequency tuner. The power of the signal is measured after an analog/digital conversion in the frequency tuner, and the gain thereof is controlled on the basis of this power measurement according to a predetermined control law. The power of the analog signal, tapped between an input amplifier stage and a first frequency transposition stage, or immediately after the first frequency transposition stage, is also measured. The measured power is compared with a predetermined power threshold so as to obtain first binary information, and the gain control law is set on the basis of the value of the first binary information.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: July 11, 2006
    Assignee: STMicroelectronics S.A.
    Inventors: Florence Giry-Cassan, François van Zanten
  • Patent number: 7068107
    Abstract: The variable gain amplifier of the present invention includes at least an operation amplifier. By choosing one of output stages, a feedback resistor is selected and the gain of the variable gain amplifier is decided according to the resistance of the selected feedback resistor, as desired. By adjusting the gain of the variable gain amplifier, the received signals can be amplified or attenuated in accordance with design requirement. The variable gain amplifier can include a two-stage architecture, in which a first stage is used for coarse gain adjustment and a second stage is used for fine gain adjustment. The gain of the two-stage variable gain amplifier can be easily adjusted to a desired value.
    Type: Grant
    Filed: March 22, 2004
    Date of Patent: June 27, 2006
    Assignee: Realtek Semiconductor
    Inventors: Wen-Chi Wang, Chao-Cheng Lee, Jui-Cheng Huang, Jui-Yuan Tsai
  • Patent number: 7065336
    Abstract: A feedback circuit for amplification of the output signal of an analog front end and suppression of its DC and low frequency components comprises a variable gain amplification unit (2) controlled by a gain control signal and a reverse path unit (6) comprising a filter unit (8) with variable time constant. A control unit (13) produces the gain control signal as well as a reverse path control signal (S) which causes adaptation of variable resistances (12) and capacitances (10) in such a way that the time constant of the filter unit (8) varies essentially proportionally with the gain of the variable amplifier unit (2). Thereby the gain of the feedback circuit as a function of the frequency retains its shape with varying gain.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: June 20, 2006
    Assignee: u-blox ag
    Inventor: Solon Spiegel
  • Patent number: 7057457
    Abstract: A low-noise amplifier circuit is specified which has a switchable gain ratio. For this purpose, a parallel circuit comprising a first and a second current path (3, 4) is provided between a radio-frequency signal input and output (1, 2), with the first current path (3) having a transistor which is connected in a common-base circuit for signal amplification, and the second current path (4) having a transistor which is connected in a common-emitter circuit (7) for signal amplification, and has input impedance matching (25, 27). Owing to the good noise characteristics and the good linearity characteristics, the described low-noise amplifier circuit is suitable for use in radio-frequency receivers in which adaptive pre-amplification is required even before a frequency converter, that is to say at the radio-frequency level, because the input signal has a wide dynamic range, such as that in the case of UMTS.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Robert-Grant Irvine, Harald Pretl, Claus Stoeger, Wolfgang Thomann
  • Patent number: 7057454
    Abstract: A DSM variable high-gain circuit includes a differential amplifier and a negative feedback loop comprising low resistance poly resistors and switches configured in a T-structure having a junction point as part of the negative feedback loop. A third resistor branch of the T-structure includes a switch that connects the junction point through the third resistor branch to ground when in a closed state and that turns the third resistor branch into an open circuit when in an open state The switch of the third resistor branch, when in the closed state, produces a gain at the output of the variable high-gain circuit.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Fan Yang Ma, Wen Yu
  • Patent number: 7026875
    Abstract: Provided is system for an improved programmable gain amplifier (PGA). The system includes an amplifier and a first gain control mechanism. The first gain control mechanism includes a circuit input port and is positioned along a feedback path of the amplifier. The first gain control mechanism is configured to (i) receive an input signal and (ii) moderate gains applied to the received input signal, the applied gains including gain values of greater than or equal to one. A second gain control mechanism is coupled to the first gain control mechanism and is integrated with a function of the amplifier. The second gain control mechanism (i) provides gain values of less than one and (ii) decreases a feedback factor of the amplifier when the gain values are provided having values of less than one.
    Type: Grant
    Filed: September 20, 2004
    Date of Patent: April 11, 2006
    Assignee: Broadcom Corporation
    Inventor: David A. Sobel
  • Patent number: 7006070
    Abstract: An output of an operational amplifier circuit is set to the high impedance state in a given period including a transition between a period T1 (positive polarity) in which a voltage level of a counter electrode VCOM becomes VC1 and a period T2 (negative polarity) in which VCOM becomes VC2. In the period T1, data line is driven by a P-type operational amplifier OP1 having a P-type driving transistor, while in the period T2, the data line is driven by an N-type operational amplifier OP2 having an N-type driving transistor. By positively using a parasitic capacitance between the counter electrode and the data line, the voltage level of the data line is changed before driving. The excess charge is returned to the power source side by clamping the output of the operational amplifier circuit to a voltage range equal to or wider than a voltage range of power sources VDD and VSS.
    Type: Grant
    Filed: May 29, 2002
    Date of Patent: February 28, 2006
    Assignee: Seiko Epson Corporation
    Inventor: Hisanobu Ishiyama
  • Patent number: 7002408
    Abstract: Data signal amplification and processing circuitry with multiple signal gains for increasing dynamic signal range. An incoming data signal is processed in accordance with multiple signal gains. The resultant signals have multiple signal values which are compared to predetermined lower and higher thresholds.
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: February 21, 2006
    Assignee: Varian Medical Systems Technologies, Inc.
    Inventors: Pieter Gerhard Roos, Edward Seppi, Richard Colbeth, Gary Virshup, Ivan Petrov Mollov
  • Patent number: 6970038
    Abstract: A switch capacitor amplifier using a “bottom plate sampling” type arrangement in the feedback network to mitigate the reduction in linearity due to feedback switch charge injection. The switch (18A) connecting the feedback capacitor (Cf) to the opamp (15) input is opened prior to the switch (19A) connecting the feedback capacitor (Cf) to the output such that the charge injected into the opamp input nodes come from the switch connected to the opamp input, and is independent of the signal value to the first order as the switches are at the opamp input common mode voltage.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: November 29, 2005
    Assignee: Texas Instruments Incorporated
    Inventor: Ramesh M. Chandrasekaran
  • Patent number: 6958654
    Abstract: Provided a method of reducing impedance variations in an electrical circuit structured and arranged for placement on an integrated circuit (IC) substrate. The method includes forming sets of parallel connected resistors, each set corresponding to one of the impedance devices on the IC. Each set also includes two or more parallel resistor paths, each resistor path including two or more cascaded resistors and has a total impedance value substantially equal to the predetermined impedance value of its corresponding impedance device. Finally, the method includes configuring the sets of parallel resistor paths to form an interdigital structure across the substrate when the electrical circuit is placed on the IC.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: October 25, 2005
    Assignee: Broadcom Corporation
    Inventor: David A. Sobel
  • Patent number: 6958655
    Abstract: A variable gain amplifier circuit using a variable impedance circuit, includes an input terminal, an operational amplifier, a first variable impedance connected with the input terminal and the operational amplifier, a second variable impedance connected with a reverse input terminal of the operational amplifier and an output terminal of the operational amplifier, a third variable impedance whose first end is connected with the reverse input terminal of the operational amplifier, a fourth variable impedance whose first end is connected with the input terminal and second end is connected with a second end of the third variable impedance, and a fifth variable impedance whose first end is connected with the second end of the third variable impedance and second end is connected with the output terminal of the operational amplifier, wherein the first variable impedance, the second variable impedance, and the third variable impedance are controlled in accordance with an upper bit group, and the fourth variable imped
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: October 25, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takahiro Shirai
  • Patent number: 6958648
    Abstract: A programable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA.
    Type: Grant
    Filed: August 30, 2004
    Date of Patent: October 25, 2005
    Assignee: Broadcom Corporation
    Inventors: Felix Cheung, Kevin T. Chan, Siavash Fallahi
  • Patent number: 6946910
    Abstract: A configurable feedback path is included in an amplitude control system having a signal source and an amplitude controller, and provides accurate tracking between a signal provided at a test port and a reference signal, whether or not the configurable feedback path is in an internally-leveled configuration or an externally-leveled configuration. The configurable feedback path includes a series of access ports, a detector that has an input coupled to the first access port, a filtered output coupled to the amplitude controller, and an unfiltered output providing the reference signal. The configurable feedback path also includes a signal separator that has an input terminal coupled to the signal source, a thru-terminal coupled to the third access port, and a coupled terminal that is coupled to the second access port. The fourth access port is coupled to the test port.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: September 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventor: Chen-Yu Chi
  • Patent number: 6937103
    Abstract: A voltage generating circuit for generating an output voltage according to an input voltage is arranged to be able to generate the output voltage with desired rise characteristics. The voltage generating circuit includes a resistor circuit that is serially implemented with respect to the input voltage, a condenser unit that cooperates with the resistor circuit to generate the output voltage, a digital delay circuit that delays at least one of a rise and a fall of the input voltage and generates a delay output based thereon, and a bypass circuit that controls bypassing of a predetermined resistor included in the resistor circuit according to the delay output from the digital delay circuit.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: August 30, 2005
    Assignee: Mitsumi Electric Co., Ltd.
    Inventor: Yasuhiko Inagaki
  • Patent number: 6930554
    Abstract: A variable gain control amplifier (10) and method provides a substantially constant input impedance and output impedance, and provides a substantially constant noise figure and third order harmonic. The variable gain control amplifier (10) includes an amplifier stage including at least a first intermediate fixed gain stage (22) operative to produce a first intermediate signal (30) in response to the input signal (20). The variable gain control amplifier (10) further includes at least a second intermediate fixed gain stage (24) operative to produce an output signal (18) in response to the first intermediate signal (30). A feedback circuit (16) is operative to produce a gain control signal (32) in response to the output signal (18). A gain control circuit (26) is coupled to the at least first intermediate fixed gain stage (22) and the second intermediate fixed gain stage (24), and receives the gain control signal (32) to control an amplitude of the intermediate signal (30).
    Type: Grant
    Filed: July 18, 2003
    Date of Patent: August 16, 2005
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jyoti Mondal, Neil L. Calanca, Matthew R. Miller
  • Patent number: 6920334
    Abstract: Methods and apparatus for providing gain control feedback in rf amplifiers in such transmitting devices as cell phones. In a cell phone application, the transmit level is set by the base station. In the cell phone, the transmit level received from the base station is used to select the coupler sensing the output power of the power amplifier in the cell phone, as well as to set the power amplifier gain. This allows the selection of couplers from multiple couplers to achieve the desired coupler output sensitivity and linearity for any part of the power amplifier output power range.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: July 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: Murat F. Karsi, Patrick O. Nunally
  • Patent number: 6919761
    Abstract: Disclosed is a wideband variable gain amplifier with high linearity that operates in a switch mode. The variable gain amplifier includes a first amplifier unit, a second amplifier unit and a third amplifier unit. The first amplifier unit includes an amplifier, a wideband-matching element, an attenuator and first switching means. The first amplifier unit supports a high gain mode operation and a low gain mode operation. In the high gain mode, the first switching means is short-circuited and an input signal is amplified with a high gain. It is thus possible to reduce noise characteristics of the entire system by a rear stage. In the low gain mode, the first switching means is opened and the input signal is attenuated by the attenuator without an amplification operation. It is thus possible to reduce a non-linearity occurring by the rear stage of the first amplifier unit.
    Type: Grant
    Filed: December 1, 2003
    Date of Patent: July 19, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Young-Ho Cho, Bo-Eun Kim, Bon-Kee Kim
  • Patent number: 6909323
    Abstract: A variable gain amplifier device comprises a variable gain amplifier circuit which amplifies a difference between an input signal and a feedback signal to output an output signal, a feedback circuit which supplies the feedback signal to the variable gain amplifier circuit, and a controller which controls the variable gain amplifier circuit and the feedback circuit to decrease a cutoff frequency of the feedback circuit according to increase of a gain of the variable gain amplifier circuit or vice versa.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: June 21, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takashi Ueno, Tadashi Arai, Tetsuro Itakura
  • Patent number: 6906595
    Abstract: An apparatus comprising an amplifier, a first resistor and a second resistor. The amplifier (i) comprises a first transistor and a second transistor and (ii) may be configured to generate an output signal in response to an input signal. The first resistor may be connected between an emitter of the second transistor and a signal ground. The second resistor may be connected between the emitter of the second transistor and a base of the first transistor. A gain of the amplifier may be adjusted by varying a value of the first resistor and a value of the second resistor.
    Type: Grant
    Filed: August 30, 2003
    Date of Patent: June 14, 2005
    Assignee: LSI Logic Corporation
    Inventors: Heung S. Kim, Lapoe E. Lynn
  • Patent number: 6888405
    Abstract: A programable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: May 3, 2005
    Assignee: Broadcom Corporation
    Inventors: Felix Cheung, Kevin T. Chan, Siavash Fallahi
  • Patent number: 6882226
    Abstract: A broadband variable gain amplifier with improved linearity and gain characteristic is provided. According to the present invention, the broadband variable gain amplifier comprises: an amplification unit for amplifying an input signal applied to an input terminal and outputting an amplified signal to an output terminal; and a gain control unit which is connected between the input and output terminals, and for controlling gain of said amplification unit, wherein said gain control unit comprises: a variable resistance unit whose resistance value is varied according to a control signal; and a broadband matching unit for proving an optimal impedance characteristic to the input terminal said amplification unit in a broad band, where in said variable gain resistance unit and said broadband matching unit is connected in parallel.
    Type: Grant
    Filed: May 15, 2003
    Date of Patent: April 19, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Youngho Cho, Bo-Eun Kim, Bonkee Kim
  • Patent number: 6876253
    Abstract: This amplifier is intended for amplifying variable signals superimposed on a continuous signal. This continuous signal serves in particular for biasing a component, a magnetoresistive resistor used as a hard disk reading head. To avoid the harmful effects of a sudden fluctuation in the continuous signal, this amplifier comprises a set of switchable reactive elements (70) for acting on said transfer function and a bias drift compensation circuit (80) for controlling the switching of said switchable elements with a view to anticipating the effects of said fluctuation.
    Type: Grant
    Filed: September 25, 2002
    Date of Patent: April 5, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Thierry Tellier, Lionel Guiraud, Joao Nuno Ramalho
  • Patent number: 6859105
    Abstract: A variable gain control circuit is provided comprising a bipolar transistor for amplifying an input signal applied to a base, and outputs an output signal via a collector; a serial exchanging unit connected between an emitter of the bipolar transistor; a first voltage node; a parallel exchanging unit connected between the collector of the bipolar transistor and the first voltage node, and wherein the gain of the variable gain control circuit increases in a high gain mode by activating the serial exchanging unit and deactivating the parallel exchanging unit, and the gain of the variable gain control circuit decreases in a low gain mode by deactivating the serial exchanging unit and activating the parallel exchanging unit.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: February 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kwang-ho Ahn
  • Patent number: 6844709
    Abstract: A programmable voltage supervisory circuit and method with minimum programming pins and low quiescent current is provided to monitor a supply voltage, by which only one programming pin can configure three voltage levels for the threshold voltage to be compared to the supply voltage. The programming pin is connected with a voltage select signal that is defined to be high, low or floating states each determines a setting voltage among three levels corresponding to the three threshold voltages, respectively, by a voltage select circuit. A sample/hold circuit in combination with a switch arrangement is further connected to the voltage select circuit such that the programmable voltage supervisory circuit is only operationable during the duty of a clock and thereby to reduce the power consumption thereof by squeezing the duty.
    Type: Grant
    Filed: October 30, 2002
    Date of Patent: January 18, 2005
    Assignee: Richtek Technology, Corp.
    Inventors: Chao-Hsuan Chuang, Jing-Meng Liu, Cheng-Hsuan Fan, Kent Hwang
  • Patent number: 6833759
    Abstract: Provided is system for an improved programmable gain amplifier (PGA). The system includes an amplifier and a first gain control mechanism. The first gain control mechanism includes a circuit input port and is positioned along a feedback path of the amplifier. The first gain control mechanism is configured to (i) receive an input signal and (ii) moderate gains applied to the received input signal, the applied gains including gain values of greater than or equal to one. A second gain control mechanism is coupled to the first gain control mechanism and is integrated with a function of the amplifier. The second gain control mechanism (i) provides gain values of less than one and (ii) decreases a feedback factor of the amplifier when the gain values are provided having values of less than one.
    Type: Grant
    Filed: July 31, 2002
    Date of Patent: December 21, 2004
    Assignee: Broadcom Corporation
    Inventor: David A. Sobel
  • Patent number: 6818879
    Abstract: An operational amplifier including a pair of differential input transistors is provided with a feedback resistor switching circuit and a variable current source. When a loaded optical disk is a DVD-ROM, the feedback resistor switching circuit reduces a gain of the operational amplifier and the variable current source selects a large current (of, for example, 1 mA) as a common bias current supplied to the differential input transistors. When the loaded optical disk is a DVD-RAM with low reflectance and low recording/reproducing speed, the feedback resistor switching circuit enhances the gain of the operational amplifier and the variable current source selects a small current (of, for example, 0.5 mA) as the common bias current.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: November 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroshi Yamaguchi, Masaki Taniguchi
  • Publication number: 20040217815
    Abstract: A variable gain amplifier circuit using a variable impedance circuit, includes an input terminal, an operational amplifier, a first variable impedance connected with the input terminal and the operational amplifier, a second variable impedance connected with a reverse input terminal of the operational amplifier and an output terminal of the operational amplifier, a third variable impedance whose first end is connected with the reverse input terminal of the operational amplifier, a fourth variable impedance whose first end is connected with the input terminal and second end is connected with a second end of the third variable impedance, and a fifth variable impedance whose first end is connected with the second end of the third variable impedance and second end is connected with the output terminal of the operational amplifier, wherein the first variable impedance, the second variable impedance, and the third variable impedance are controlled in accordance with an upper bit group, and the fourth variable imped
    Type: Application
    Filed: April 28, 2004
    Publication date: November 4, 2004
    Applicant: Canon Kabushiki Kaisha
    Inventor: Takahiro Shirai
  • Patent number: 6806771
    Abstract: An output block for an in-system programmable analog integrated circuit. The output block features an output amplifier that accepts a differential current-mode input signal and provides a single-ended output voltage. The output amplifier is also selectably operable as a linear amplifier, an integrator or a comparator. The output block also includes a common-mode feedback circuit (CMFB), an analog trim circuit (OATRM), a CLAMP circuit, and an offset calibration circuit (CLDAC), all coupled to the differential input of the output amplifier. The CMFB exhibits bandwidth comparable to that of the output amplifier and a drive capability that enables the differential-input to single-ended output conversion. The CLAMP is connected to the differential input in the comparator mode in order to avoid slow recovery from an overdrive condition. The OATRM forces a difference current into the differential input that compensates for a (gain independent) offset voltage that results from various mismatches.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: October 19, 2004
    Assignee: Lattice Semiconductor Corp.
    Inventors: Paul Hildebrant, Jian Li, Hans W. Klein
  • Patent number: 6798284
    Abstract: A reference circuit having a variable-impedance function for reducing current consumption is provided. By switching an output impedance of the reference circuit so that the output impedance is large when transmitting a high-frequency signal to a sensor coil, and the output impedance is small when receiving a response signal from the sensor coil, current consumption is reduced. The reference circuit includes a loop gain adjusting circuit having a switch for switching a gain. The magnitude of the output impedance of the reference circuit is switched by opening and closing the switch to switch the gain.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 28, 2004
    Assignee: Wacom Co., Ltd.
    Inventor: Yasuo Oda