Abstract: An automatic transimpedance control amplifier is disclosed. The amplifier incorporates an automatic gain control circuit which simultaneously and automatically adjust the value of transimpedance and the voltage gain at each gain stage of the amplifier according to the input current. The amplifier has wide bandwidth, high sensitivity/and more importantly, wide dynamic range.

Abstract: A Compressing Capacitively Coupled Transimpedance Amplifier (CCTIA) circuit (10) has an amplifier (AMP) with a variable capacitance feedback network (C1, C2, C3, Q1, Q2) coupled between a current receiving amplifier input node and an amplifier output node. The output node outputs a voltage in response to a received current. The variable capacitance feedback network is responsive to the output voltage for establishing one of a plurality of different transimpedance values for the circuit such that the circuit exhibits a greatest transimpedance value for an input current having a magnitude below a threshold magnitude, and a lesser transimpedance value for an input current having a magnitude equal to or above the threshold magnitude.

Abstract: A communication apparatus for use in a portable telephone is disclosed which has a transmit-receive common amplifier for amplifying a transmitted signal or received signal, and a mixer for frequency-mixing the transmitted signal or the received signal with a local oscillator output, wherein connection between the mixer and an input side of the amplifier and connection between the mixer and an output side of the amplifier are made by means of respective signal-path selector switches. During reception, a deep bias is applied to an FET of the transmit-receive common amplifier to reduce current consumption, and during transmission, a shallow bias is applied to the FET of the transmit-receive common amplifier for increased output.

Abstract: A non-attenuating automatic variable gain amplifier (VGA) circuit includes an operational amplifier (op amp) with a feedback resistor connected between its output and inverting input terminals. A variable gain setting resistance circuit having a variable resistance is the gain setting resistor positioned between the op amp's inverting input and a low voltage supply. By varying the resistance of the variable resistance circuit, the gain of the VGA circuit can be manipulated without requiring attenuation of the input signal. A resistance setting control for the variable resistance circuit can operate open loop, fed back from the amplifier output, or fed forward from the amplifier input.

Abstract: An AGC amplifier used in a radio transmitter-receiver such as an portable telephone, in which a transistor for amplification is connected in series to a transistor for buffer as in direct current, and a third transistor is connected to the transistor for amplification, or to the transistor for amplification and the transistor for buffer to vary a feed-back quantity by varying a bias at a base or gate of the third transistor so as to vary a gain, thereby preventing a saturation characteristics of the circuit current from changing even In a change of the gain of the amplifier.

Abstract: A bus leveling system for automatically monitoring and maintaining the amplitude of a radio frequency (RF) signal carded on a bus. A two-stage variable gain amplifier (64) is connected in series with the bus. Each stage of the variable gain amplifier is constructed with a PIN diode (84, 86) in a feedback path of the stage. The amplification of the variable gain amplifier is varied by the injection of current into the feedback path to adjust the resistance of the PIN diodes. A control circuit having an RE detector (78) is provided to monitor and adjust the gain generated by the variable gain amplifier. Preferably, the control circuit and the variable gain amplifier are incorporated into an Application Specific Integrated Circuit (ASIC) (62). The RF detector is constructed of two Gilbert multipliers (202, 204) to minimize errors caused by operating condition changes, including variations in power supply voltage, temperature, or process.

Abstract: An audio amplification circuit includes a ganged pair of logarithmic potentiometers, each potentiometer of the pair having an input terminal, an output terminal, and a wiper terminal. The input terminals of each potentiometer are adapted for connection to an audio input signal from an audio device such as a microphone. A preamplifier stage having an input is connected to the wiper terminals of both logarithmic potentiometers. An amplification stage has a matched pair of operational amplifiers with each operational amplifier having an input connected to the output of the preamplifier stage. Each operational amplifier has a feedback loop which includes the resistance of at least one of the logarithmic potentiometers between the output terminal and the wiper terminal of said logarithmic potentiometer. The outputs of the matched pair of operational amplifiers constitute the outputs of the amplification stage. The outputs may be daisy-chained together, and a floating output stage is also provided.

Abstract: A transimpedance amplifier circuit for converting an input current to an output voltage includes a feedback resistor variable circuit which is connected in parallel to a feedback resistor and a load resistor variable circuit which is connected to a collector of an amplifying transistor. The feedback resistor variable circuit includes a first resistor and a first P-N junction diode connected in series. After the first P-N junction diode turns on in accordance with the increase in the input current, the transimpedance is decreased. As a result, a wide input dynamic range can be achieved. The load resistor variable circuit includes a reference voltage source and a series circuit of a second P-N junction diode and a second resistor. After the second P-N junction diode turns on in accordance with the increase in the input current, an effective load resistance value of the amplifying transistor is decreased, whereby the gain of the amplification transistor is decreased.

Abstract: A digitally controlled variable gain circuit which receives an analog input voltage and produces an analog output voltage. The digitally controlled variable gain circuit includes a first resistor string having first and second ends and a plurality of resistors connected in series between the first and second ends, the second end of the first resistor string being grounded and the analog input voltage being applied across the first and second ends of the first resistor string. A first selection mechanism, coupled to the first resistor string and responsive to a first digital control signal, provides a selectively determinable voltage divided output from the first resistor string.

Abstract: A non-linear circuit includes a first variable resistor one end of which is applied with an input signal, an amplifier whose inverting input is connected to the other end of the first variable resistor and whose non-inverting input is connected to ground, a second variable resistor one end of which is connected to the inverting input of the amplifier, a third variable resistor one end of which is connected to the output of the amplifier and the other end being connected to the other end of the second variable resistor, and a fourth variable resistor one end of which is applied with the input signal and the other end being connected to the third variable resistor.

Abstract: A low power consumption amplifier that is essentially insensitive to the process used to fabricate the active devices of the amplifier employs feedback to minimize variations in electrical characteristics of the devices. For weight-sensitive microwave applications, a high electron mobility transistor (HEMT) or a pseudomorphic high electron mobility transistor (PHEMT) may be selected as an active device for each stage of the amplifier. HEMTs and PHEMTs typically exhibit greater device gain than do MESFETs, especially at the upper portion of X-band and above, so that a HEMT- or PHEMT-based stage of an amplifier where additional overall gain is required, can be achieved without significantly adversely affecting power consumption demands, and attendant electrical energy storage/generation requirements while achieving and/or maintaining an overall flat gain characteristic of the amplifier.

Abstract: A programmable gain amplifier including first and second gain elements are connected by an impedance selector which allows programmability of the gain of both gain elements. The impedance selector is connected in series with the output of the first gain element. The impedance selector places an impedance in the feedback path of the first gain element or the input path of the second gain element. Errors introduced in the signal path due to the switches are attenuated by the open loop gain of the first gain element. The gain may be equally divided between both stages of the amplifier to allow for optimum band width. Optimum noise performance may be obtained by placing most of the gain in the first stage. An instrumentation amplifier may also be made which further includes a third gain element connected to the gain element with a second impedance selector in a manner similar to the connection of the first gain element to the second gain element.

Abstract: There is provided a light-receiving and amplifying device capable of changing its gain at high speed. A cathode of a photodiode PD is connected to a power source V.sub.CC via a current mirror circuit. An anode of the photodiode PD is connected to an input of an amplifier circuit AMP. The amplifier circuit AMP receives a photocurrent from the photodiode PD, converts the photocurrent into a voltage, and amplifies the voltage to form an output signal V.sub.OUT. A control signal of a current having the same magnitude as that of the photocurrent and output from the current mirror circuit is input to a control input terminal of a gain switching circuit. The gain switching circuit is composed of a resistor Rf.sub.1, a resistor Rf.sub.2, and a switch SW. The resistor Rf.sub.1 is connected across the input and the output of the amplifier circuit AMP, and the resistor Rf.sub.2 and the switch SW connected in series are connected across the input and the output of the amplifier circuit AMP.

Abstract: An air bag system is provided with a gain variable amplifier which corrects an output from an acceleration sensor by amplifying it with a set gain and a microcomputer which controls a gain of the gain variable amplifier so that a desired output is obtained when a predetermined input is supplied to the sensor and stops the gain control under a mounted condition after the gain has been set. For the gain control by the microcomputer, a shift register is used.

Abstract: An amplifying circuit includes: amplifying device for amplifying an input signal and outputting the amplified signal; feedback device for feeding the output signal from the amplifying device back to an input terminal of the amplifying device so that the output signal may have a predetermined frequency characteristic; and a variable impedance circuit which, included in the feedback device, operates on the basis of a current from a current source, and which has its impedance altered in accordance with the current.

Abstract: An automatic transimpedance control amplifier is disclosed. The amplifier incorporates an automatic gain control circuit which simultaneously and automatically adjust the value of transimpedance and the voltage gain at each gain stage of the amplifier according to the input current. The amplifier has wide bandwidth, high sensitivity, and more importantly, wide dynamic range.

Abstract: A variable gain voltage signal amplifier is provided for incorporation in an automatic gain control circuit, such as for a disk drive. The variable gain voltage signal amplifier comprises: an amplifier including an inverting input voltage signal terminal and an output voltage signal terminal. The amplifier includes an input signal path coupled to the input voltage signal terminal and further includes a feedback signal path coupling between the input voltage signal terminal and the output voltage signal terminal. The input signal path comprises a capacitor coupled in series with a resistor, and the feedback signal path comprises a resistor. At least one of the resistors comprises an electronic signal-controlled resistor.

Abstract: A feedback network for linear operational amplifiers comprising n+1 identical non-linear devices which nonetheless yield a linear gain.

Abstract: An automatic power control circuit controls the output power of a transmitting RF signal having envelope fluctuations generated by the modulation. The circuit uses a feedback signal which is a difference signal between an envelope provided by detecting the RF output signal, and a reference voltage corresponding to the transmitting power. At this time, fluctuation components included in the envelope and generated by the modulation is removed by the use of a low-pass filter. This circuit secures the sharpness in the leading edge of the burst signal by reducing the time constant of the low-pass filter in the rise time of the burst signal and increasing the time constant of the low-pass filter in the data periods.

Abstract: A variable gain amplifier is provided which includes a transistor amplifier having a first bipolar transistor with a base connected to an input for receiving an input signal. The first transistor has a collector coupled to an output. A parallel feedback path is connected between the collector and the base of the first transistor. A series feedback path is connected to an emitter of the first transistor. The series feedback path has a PIN diode which operates as a variable resistance element and receives a variable gain control signal so as to generate a variable gain. A bias compensation network is connected to the variable resistance element for generating a variable current source that provides current bias to the variable resistance element. In addition, a buffer transistor may be further coupled between the collector of the first transistor and the output to further enhance gain performance. The buffer transistor may be biased through a current source transistor.

Abstract: A gain-controllable output buffer amplifier circuit includes an operational amplifier having a grounded non-inverting input and an inverting input connected through an input resistor to a signal input node. A tapped feedback resistor having a plurality of intermediate taps is connected between an output and the inverting input of the operational amplifier. Each of the intermediate taps is connected through a transistor switch in common to a non-inverting input of an output buffer amplifier, which has its output connected to a signal output node and an inverting input of the output buffer amplifier itself. The transistor switches are controlled by a switch control circuit in such a manner that only one of transistors switches is selectively turned on.

Abstract: An impedance transformation circuit for transforming a two-pole electrical impedance (Z) includes a first controllable current source for producing a current (I.sub.1) flowing through the impedance during operation. An operational amplifier is coupled to the first current source for providing a control signal (V.sub.0) corresponding to the impedance current (I.sub.1). A second controllable current source is coupled to the operational amplifier for providing at an input terminal of the circuit a further current (I.sub.2) proportional to the impedance current (I.sub.1) as a function of the control signal (V.sub.0). As a result of using a first and second controllable current source and applying the control signal delivered by the operational amplifier to the control inputs of the two current sources, an impedance transformation is obtained which is dependent on similar parameter ratios. The circuit is suitable for use as an integrated semiconductor circuit.

Abstract: A linear amplifier has an input signal controller for controlling the level of an input signal to a field-effect transistor (FET) using a DC gate current measured by a gate current detector arranged between a gate bias terminal and a drain bias terminal of the FET and a nonlinear resistor whose resistance can be varied corresponding to an inter-terminal voltage between the gate and the drain of the FET, in which the voltage at the gate of the FET is adjusted to a rate such that a particular drain current which has been determined just before the starting of burst signal transmission corresponding to the level of a power output of the linear amplifier is obtained, and is maintained for a given period of time.

Abstract: A combined programmable gain and integrating amplifier comprises an operational amplifier having an inverting input terminal coupled to a reference voltage. A plurality of capacitors are selectively connectable in parallel between the inverting input terminal and the amplifier output terminal. At least one terminal of each capacitor is connected to the inverting input terminal. A plurality of controllable switches are connected in series circuit between a corresponding one of the capacitors and the amplifier output terminal for coupling the capacitors in circuit between the inverting input terminal and the output terminal. In a first operational state, each of the switches connects the capacitors between the input and output terminals. In a second operational state, the switches connect selected ones of the capacitors the reference voltage.

Abstract: A variable gain amplifier includes a first transistor including a base, and an emitter, and a collector. A first parallel feedback device connected to the collector and the base of the first transistor provides an inductive impedance. A second parallel feedback device connected to the collector and the base of the first transistor provides a variable resistive impedance and includes a monolithically integrated p-i-n diode having a quiescent bias current flowing therethrough. The gain response of the first transistor is related to the variable resistive impedance of the second parallel feedback device.

Abstract: Variable-gain amplifier stages, such as may be used in a television receiver intermediate-frequency (IF) amplifier, each comprise a pair of transistors connected as an emitter-coupled differential amplifier with resistive collector loads. An electrically controlled conductance is connected between the collector electrodes of the transistors, to shunt the resistive collector loads in controllable amount to set the voltage gain of the stage. The electrically controlled conductance in each variable-gain amplifier stage is constructed so as not to change the DC operating conditions of the emitter-coupled differential amplifier and its resistive collector loads with variation in the conductance of the electrically controlled conductance. Front end portions of television receivers or video tape recorders are described each of which uses separate intermediate-frequency (IF) amplifiers for the FM sound carrier and vestigial-AM picture carrier.

Abstract: A circuit for reducing input offset error and improving gain switching speed in a programmable gain amplifier includes a level shifting buffer that senses a signal on a common mode conductor in a differential input stage of an operational amplifier, and shifts the level of that signal up to the level corresponding to a level of an input signal applied to a non-inverting input of the operational amplifier. If a gain select signal is at a first logic level, the voltage produced by the buffer is applied to a gate electrode of one of a plurality of gain switching JFETs coupling a gain network to the inverting input of the operational amplifier, turning that JFET on. If the gain select signal is at a second logic level, the output of the buffer is isolated from the gain switching JFET and a turn off voltage is applied to the gate of the gain switching JFET.

Abstract: A single chip operational amplifier wherein the gain is programmable by means of a digitally controlled feedback loop wherein the parameters of the feedback circuit are digitally programmable under control of a microprocessor, microcontroller, control logic and the like. There is provided an operational amplifier with a feedback loop from output terminal to input terminal. The feedback loop contains components which are switched into the feedback loop circuit under control of digital signal provided by an external device, such as, for example, a microprocessor, microcontroller, control logic and the like. The digital signals from the external device cause the appropriate resistors and/or capacitors and/or other components, as may be required, to be switched into the feedback loop of the operational amplifier to provide the desired gain. These digital signals can be derived from a monitoring source which is designed to provide automatic gain control (AGC) or the like.

Abstract: A gain control circuit includes a first FET for serving as an active load, a second FET serving as an amplifier, and a third FET for serving as a current source. The first, second, and third FETs have substantially the same characteristics and are mutually connected in a series. The gain control circuit further includes a fourth FET for serving as a variable active load connected in parallel with the third FET and a capacitor connected between the third and fourth FETs. The fourth FET is also connected to a gain control terminal. The gain of the second FET is controlled by the voltage applied to the gate of the fourth FET through said gain control line.

Abstract: The present invention relates to an amplifier for amplifying an input signal. In a sensor amplifier construction according to the present invention, a series arrangement made up of a resistor and a transistor is inserted in a feedback path for an amplifier, and the collector of the transistor is connected to one input of the amplifier and a capacitor is connected between the emitter and the base of the transistor. According to the above-described arrangement, there is provided a sensor amplifier which can eliminate noise with a small-scale construction.

Abstract: The present invention is a monolithic integrated differential amplifier having an operational amplifier and a digitally controlled means for setting the gain of said differential amplifier wherein the gain is adjustable by means of a resistive feedback network formed by a resistor chain whose taps are coupled via a multiplexer to the operational amplifier. The operational amplifier in the present invention is designated as an adaptive amplifier because its gain-bandwidth product is digitally adjustable in steps, with the respective gain-bandwidth product selected being adapted to the gain setting of the monolithic integrated differential amplifier.

Abstract: An anti-clipping mixer circuit is provided within an integrated circuit. The mixer circuit allows for the independent level control of each input signal, thereby allowing the optimization of the signal-to-noise ratio. A master level control is provided to limit the overall combined output signal to a level below the operational amplifier's maximum voltage level. A control circuit may be used to automatically adjust the input signal levels as well as the combined output signal level.

Abstract: A programmable gain amplifier including first and second gain elements are connected by an impedance selector which allows programmability of the gain of both gain elements. The impedance selector is connected in series with the output of the first gain element. The impedance selector places an impedance in the feedback path of the first gain element or the input path of the second gain element. Errors introduced in the signal path due to the switches are attenuated by the open loop gain of the first gain element. The gain may be equally divided between both stages of the amplifier to allow for optimum band width. Optimum noise performance may be obtained by placing most of the gain in the first stage. An instrumentation amplifier may also be made which further includes a third gain element connected to the gain element with a second impedance selector in a manner similar to the connection of the first gain element to the second gain element.

Abstract: A multiple range amplifier capable of providing a large number of ranges with great accuracy is provided by a circuit free of discrete resistors and which includes two inverting operational amplifiers and two, two-quadrant multiplying DACs which are externally controllable. The output of the first inverting amplifier is fed back through the first DAC and is also fed through the second DAC to the second inverting amplifier. Each of the DACs is externally controllable to provide the desired range with great precision. The gain of the system is the product of the gain of the two amplifiers. Also, a programmable filter is provided to optimize system performance, for example, in the removal of noise. This is accomplished by providing a fundamental filter circuit having an operational amplifier, a two quadrant multiplying DAC, a capacitor and several resistors. The output of the operational amplifier is fed back to the input via a capacitor and a DAC input control circuit and an RC circuit.

Abstract: A VCA circuit is used at an input stage of communication device, an OA device or the like. The VCA circuit includes an output varying circuit which distributes a current supplied from a power supply side in accordance with a predetermined coefficient. The VCA circuit also includes an operational amplifier provided on an input side of the output varying circuit, and a feedback resistor connected between one of two input terminals and an output terminal of the operational amplifier. An input signal is applied to one of the two input terminals of the operational amplifier, a signal output from the output varying circuit is applied to the other input terminal. An output signal of the VCA circuit is drawn from the output terminal of the operational amplifier.

Abstract: A MOS voltage trim amplifier which can multiply an input voltage with a quantized value to generate an output voltage. The MOS trim amplifier comprises a MOS op-amp, a multiplying feedback network, a gate-bias network and startup circuit. The MOS op-amp has a noninverting terminal for receiving the input and an inverting terminal for receiving the feedback network. The multiplying feedback network uses two MOSFETs as feedback elements to provide the voltage ratio for the multiplication. The gate-bias network provides a reference voltage which is a fraction of the input voltage through a MOSFET voltage divider to the feedback MOSFETs. Current mirrors are employed in the gate-bias network to provide a constant stable current through the MOSFET voltage divider to avoid loading the input. The startup circuit generates a bias current to the two feedback MOSFETs to drive them out of their natural off state.

Abstract: A servo distortion trim circuit for a DBX VCA is disclosed. The circuit comprises a feedback to the VCA which includes an inverting integrator. The input to the non-inverting terminal of the integrator is chosen to minimize distortion.

Abstract: In a circuit arrangement with a electronically controllable transfer characteristic, the input signal is applied to an amplifier with a controllable negative feedback. The amplifier has its output connected to a voltage-divider circuit having a frequency-dependent characteristic. This circuit has a plurality of taps (9 to 13, 31 to 35) which are connected to an inverting input of the amplifier via a first electronically controllable switch (8) and to the output of the arrangement via a second electronically controllable switch (30). The two switches (8, 30) are controlled in a manner so as to influence the Q-factors of different filter curves. Therefore, in order to boost the input signal in a frequency band determined by the frequency-dependent voltage divider, the first switch (8) is set a position such that boosting is effected with the desired frequency bandwidth. Furthermore, the position of the second switch (30) is selected so as to obtain boosting to the desired degree.

Abstract: A MOS voltage trim amplifier which can multiply an input voltage with a quantized value to generate an output voltage. The MOS trim amplifier comprises a MOS op-amp, a multiplying feedback network, a gate-bias network and startup circuit. The MOS op-amp has a noninverting terminal for receiving the input and an inverting terminal for receiving the feedback network. The multiplying feed back network uses two MOSFETs as feedback elements to provide the voltage ratio for the multiplication. The gate-bias network provides a reference voltage which is a fraction of the input voltage through a MOSFET voltage divider to the feedback MOSFETs. Current mirrors are employed in the gate-bias network to provide a constant stable current through the MOSFET voltage divider to avoid loading the input. The startup circuit generates a bias current to the two feedback MOSFETs to drive them out of their natural off state.

Abstract: A voltage-controlled amplifier employs an operational amplifier with negative feedback for setting the gain. A voltage variable resistance such as a junction-field-effect transistor (JFET) is employed as part of a variable voltage divider for controlling the amplifier gain. Resistors in series and in parallel with the JFET determine minimum and maximum resistances corresponding to upper and lower limits for the amplifier gain. Thus, multiple channels of an amplifier can be provided with closely matched characteristics even using separate JFETs in each separate channel which have unmatched characteristics.

Abstract: A multichannel amplifier employs field-effect transistors to vary the gain of operational amplifiers in each respective channel. Gain matching of the respective channels is obtained by providing each channel with a respective DC bias voltage which compensates for differences in pinch-off voltage of the field-effect transistors. The invention permits the use of inexpensive, unmatched JFETs in the amplifier. Close gain tracking achieves very accurate stereo imaging in an audio system.

Abstract: The precision programmable attenuator of the present invention makes use of a pair of non-interactive parallel connected divider circuits to provide a flat frequency response over a wide bandwidth. A first of these divider circuits is a low frequency divider circuit which provides a predetermined attenuation of low frequency signals. The second high frequency divider attenuates the high frequency signals and does not interact with the low frequency attenuator. Therefore, each of these dividers can be separately tuned independent of the other. The implementation of the low frequency divider is a resistive divider network which provides a DC coupling of the input signal to the output. The high frequency divider is comprised of an adjustable capacitor divider network which is automatically electronically tuned to obtain the desired high frequency gain response.

Abstract: A processing circuit is provided for use in an optical combustion monitor for an internal combustion engine. The circuit includes a variable gain amplifier for amplifying a signal from one or more opto-electric transducers sensitive to combustion light in the engine cylinders. A gain control circuit including a peak detector controls the variable gain amplifier so that the peak amplitude of the amplifier output signal is substantially constant.

Abstract: A feedback circuit couples a base amplifier output to the amplifier input for feeding back a portion of an amplified input signal. The feedback circuit includes an inductor coupled in series with a variable resistance. The variable feedback resistance is provided by a feedback FET having a gate for receiving a control signal for varying the resistance between the source and drain. The gain of the base amplifier is determined over the predetermined frequency range by the combined impedance of the inductor and resistance. The base amplifier is a field-effect transistor (FET). The feedback inductance is taken from a portion of a coil coupling the drain of the base FET with an output terminal.

Abstract: A gain control circuit for an amplifier having a stepwise variable gain is disclosed, which includes a peak detector detecting and holding a peak value of an output voltage of the amplifier, a reference voltage generator generating first and second reference voltages having values different from each other, a comparator circuit comparing the peak value with the first and second reference voltages, and a control circuit responding to a comparison output derived from the comparator circuit and controlling the gain of the amplifier one step by one step such that the peak value becomes to intervene between the first and second reference voltages. When the peak value exists between the first and second reference voltages, the control circuit holds the gain of the amplifier at the current value, so that the amplitude of the output voltage is controlled to be substantially constant.

Abstract: A variable gain wideband bipolar monolithic amplifier has first and second bipolar transistors connected together in a Darlington configuration. A resistive shunt feedback loop connected between the output and the input of the amplifier controls the gain of the amplifier. The feedback loop includes a field effect transistor, formed on the same chip substantially by the same bipolar process as the bipolar transistors, for varying the impedance of the shunt feedback loop thereby varying the gain of the amplifier. The gain of the amplifier is controlled in response to the application of a control voltage to the gate of the FET. Further, the FET is dc biased for inhibiting the FET from drawing dc current.

Abstract: A method of adjusting the gain of an operational amplifier using a digital-to-analog converter (DAC) based upon R-2R resistive ladder technology inserts the DAC between the output of the operational amplifier and the non-inverting input to form a positive feedback loop. Variations of a digital control code applied to the DAC to control the gain are not affected by corresponding variations in the output resistance of the DAC so that undesirable changes in the magnitude of output noise, drift, bandwidth and offset voltage are minimized.

Abstract: An amplifier drive control circuit having a power combiner for combining an RF input signal with a feedback signal to provide a composite RF signal, a power control circuit for providing a selectively attenuated replica of the composite RF signal to the input of the amplifier, and feedback circuitry connected between the output of the amplifier and the power combiner for providing a level controlled portion of the output of the amplifier as the feedback signal. The power control circuit selectively attenuates the replica of the composite RF signal when the power of the composite RF signal exceeds a predetermined threshold, while the feedback circuitry controls the level of the feedback signal as a function of the gain of the amplifier as determined by the level of the composite RF signal and the level of the amplifier output. The feedback circuitry includes a feedback phase control circuit for controlling the phase of the feedback signal relative to the input to the amplifier.

Abstract: In an amplifier system for a cable-TV converter, the amplifier system having an amplifier having a transistor with a base connected to an input port of the amplifier system that provides a video IF signal and a collector for connection to an output port of the amplifier system, a variable gain device is connected between the collector of the transistor and the output port for varying the gain therebetween. A variable negative feedback device forms a closed loop between the collector and the base of the transistor for varying negative feedback of the variable negative feedback device inversely with the gain of the variable gain device. An impedance matching device is connected between the variable gain device and the output port for maintaining a substantially constant output impedance at the output port.

Abstract: A gain control circuit includes a network (112) for splitting a first signal into first and second signal paths with the ratio of the values of the signals in the respective first and second paths being determined in operation by a digital control signal. The circuit includes an input stage (101) the output of which is connected to the input of network (102) so as to provide said first signal, said input stage (101) having a gain which is set by the value of the signal in said first signal path, and an output stage (104) the output of which is controlled by the signal in said second signal path.