Having Emitter Degeneration Patents (Class 330/283)
  • Publication number: 20100283542
    Abstract: Various amplifier configurations having increased bandwidth, linearity, dynamic range, and less distortion are shown and disclosed. To increase bandwidth in a transimpedance amplifier, a replica circuit is created to replicate a degeneration resistance, or the resistance or value that relates to a feedback resistance. From the replica circuit, the replicated values are mirrored and processed to control a FET switch which modifies a degeneration resistance. The FET switch control signal is related to the feedback resistance and modifies the degeneration resistance to thereby maintain the product of the feedback resistance and the degeneration resistance as a constant. In another embodiment, a second switch controlled by an automatic gain control signal is established between a first stage amplifier and a second stage amplifier to improve dynamic range and bandwidth without degrading other amplifier specifications.
    Type: Application
    Filed: May 6, 2009
    Publication date: November 11, 2010
    Inventors: Krishna Shivaram, Kashif A. Ahmed
  • Patent number: 7737785
    Abstract: An amplifier circuit has an amplifier element having an amplifier element input and an amplifier element input impedance, an amplification adjuster adapted to adjust an amplification of the amplifier element, an amplifier circuit input coupled to the amplifier element input, an impedance element having a alterable impedance value and being coupled to the amplifier circuit input, and an impedance adjuster adapted to adjust the impedance value of the impedance element as a function of the amplification of the amplifier element.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: June 15, 2010
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Thomas Stuecke, Niels Christoffers, Stephan Kolnsberg, Rainer Kokozinski
  • Patent number: 7705682
    Abstract: Two or more low noise amplifiers are configured to amplify received radio frequency input signals and one or more shared load or source degeneration inductors are configured to be used for each of the two or more low noise amplifiers. Further, the one or more shared inductors can be configured to be used for processing two or more signal bands in a multi-band communication system.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: April 27, 2010
    Assignee: NanoAmp Mobile, Inc.
    Inventors: Minzhan Gao, Ann P. Shen, Chien-Meen Hwang
  • Patent number: 7701288
    Abstract: Variable gain amplifiers with wider linear range are provided, in which first and second loads are coupled to a power voltage, and a transconductor cell comprises first and second transistors, a gain control transistor, and first and second current sources. The first and second transistors comprise control terminals receiving a set of input signals, first terminals coupled to the first and second loads respectively, and second terminal coupled to first and second nodes respectively. The first and second current sources are coupled between the first node and a first voltage and between the second node and the first voltage respectively. The first gain control transistor is coupled between the first node and second node, receiving a gain control voltage, in which the grain control transistor has a threshold voltage lower than that of the first and second transistors.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: April 20, 2010
    Assignee: Mediatek Inc.
    Inventors: Chun-Chih Hou, Wei-Hsuan Tu
  • Patent number: 7696828
    Abstract: A modified derivative superposition (MDS) low noise amplifier (LNA) includes a main current path and a cancel current path. Third-order distortion in the cancel path is used to cancel third-order distortion in the main path. In one novel aspect, there is a separate source degeneration inductor for each of the two current paths, thereby facilitating tuning of one current path without affecting the other current path. In a second novel aspect, a deboost current path is provided that does not pass through the LNA load. The deboost current allows negative feedback to be increased without generating headroom problems. In a third novel aspect, the cancel current path and/or deboost current path is programmably disabled to reduce power consumption and improve noise figure in operational modes that do not require high linearity.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: April 13, 2010
    Assignee: QUALCOMM, Incorporated
    Inventor: Li-Chung Chang
  • Patent number: 7667539
    Abstract: An improved low-voltage, low-power, wide range, and linear Gm Cell is disclosed. In one embodiment, a method of linearizing output current with an input voltage using a Gm Cell includes receiving an input differential voltage by an emitter degenerated input stage and outputting a current including a linear part and a nonlinear part at signal output terminals Iout_P and Iout_M, converting the non-linear part of the output current to a voltage difference via a compression stage, converting the voltage difference to a linear output current by a linear voltage to current converter stage, outputting the linear output current using a current mirror output stage to the signal output terminals Iout_P and Iout_M, and summing the output currents of the emitter degenerated input stage and the current mirror output stage at the signal output terminals Iout_P and Iout_M to obtain a linear output current with the input differential voltage.
    Type: Grant
    Filed: January 21, 2008
    Date of Patent: February 23, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Shengyuan Li
  • Patent number: 7626457
    Abstract: An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: December 1, 2009
    Assignee: Intel Corporation
    Inventors: Mark Mudd, Isaac Ali, Ruiyan Zhao, Nick Cowley, Colin Perry, Richard Goldman
  • Patent number: 7616059
    Abstract: The invention relates to an differential amplifier circuit comprising an amplifier stage comprising a first and a second transistor, the gates of which are connected to differential input terminals of the amplifier stage. The differential amplifier further comprises a temperature compensation circuit comprising a third and fourth transistor. The third transistor is connected to the source of the first transistor and the fourth transistor is connected to the source of the second transistor. Further, the temperature compensation circuit comprises a constant current source connected to the respective sources of the third and fourth transistors. Thereby the temperature compensation circuit is arranged to provide a feedback resistance in dependence on the operating temperature so as to compensate for variations of the resistance of the first and second transistors.
    Type: Grant
    Filed: April 18, 2007
    Date of Patent: November 10, 2009
    Assignee: Infineon Technologies AG
    Inventors: Christian Grewing, Detlev Theil, Stefan Van Waasen
  • Patent number: 7616061
    Abstract: A low noise amplifier (LNA) for ultra wide band receives and amplifies identical RF signals in different frequency bands, and includes more than one pair of narrow band LNAs coupled in parallel, and a load circuit which increases load impedance of the entire circuit of the narrow band LNAs. The LNA can not only amplify the RF signal in the UWB but also obtain the low noise and the high gain that are features of the conventional narrow band LNA.
    Type: Grant
    Filed: January 23, 2006
    Date of Patent: November 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Choong-yul Cha, Hoon-tae Kim, Sang-gug Lee
  • Publication number: 20090256634
    Abstract: An output distortion circuit includes a first transistor arrangement receiving a nonlinear current associated with a nonlinear differential error signal. The first transistor arrangement produces a reflected base current that is applied to one side of a differential input pair. A second transistor arrangement eliminates the nonlinear differential error signal by producing a replicated base current that replicates the reflected base current. The replicated base current is applied to an opposite side of the differential input pair thus the output distortion cancellation circuit creating a deflection of approximately equal magnitude to the reflected base current so as to eliminate the nonlinear differential error signal.
    Type: Application
    Filed: April 15, 2008
    Publication date: October 15, 2009
    Inventors: Moshe Gerstenhaber, James Bundock
  • Patent number: 7592869
    Abstract: An electronic amplifier circuit that provides improved gain control linearity characteristics resulting from having a controllable field effect transistor (FET) acting as a degeneration resistance (degeneration resistance FET) and a controllable load resistance FET. The overall gain function of the amplifier exhibits improved linearity in part due to the presence of the load FET, which tends to cancel the nonlinear behavior emanating from the degeneration FET. The circuit also includes a control circuit for generating non-linear control signals that are responsive to process characteristics of the FETs, such that the degeneration resistance FET and load resistance FETs may be controlled more consistently and independently from process variations.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: September 22, 2009
    Assignee: Finisar Corporation
    Inventors: Hyeon Min Bae, Naresh Ramnath Shanbhag, Jonathan B. Ashbrook
  • Publication number: 20090219092
    Abstract: There is provided a highly linear differential amplifying circuit. The highly linear differential amplifying circuit includes: a differential amplifying unit including a main differential amplifying unit having a differential pair of transistors for amplifying a difference of two input signals and an auxiliary amplifying unit connected in parallel with the main differential amplifying unit, wherein second-order derivatives of transconductances of the main differential amplifying unit and the auxiliary differential amplifying unit are properly set to have an offset; and a source degeneration resistor unit including a first source degeneration resistor to a fourth source degeneration resistor. Accordingly, the linearity of the differential amplifying circuit is improved at a wide output power region.
    Type: Application
    Filed: May 29, 2008
    Publication date: September 3, 2009
    Inventors: Jongsik KIM, Sangwon Han, Hyunchol Shin
  • Patent number: 7583166
    Abstract: The present invention provides an apparatus for enhancing Q factor of an inductor. The apparatus includes a negative resistance generator coupled to the inductor for providing a negative resistance, and a bias circuit coupled to the negative resistance generator for biasing the negative resistance generator.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: September 1, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ying-Yao Lin, Ying-Hsi Lin
  • Patent number: 7532070
    Abstract: An automatic gain control (AGC) system and method for implementing a wide dynamic range automatic gain control (AGC) are disclosed. The AGC system features a large gain adjustment suitable for integration in silicon tuners. The AGC structure employs a pair of classical current steering stages, architecturally arranged to share the gain back-off characteristic in a novel “ping-pong” arrangement. The AGC system and method deliver a wide dynamic range at low power dissipation in radio frequency (RF) systems, but may be implemented as well in other applications.
    Type: Grant
    Filed: September 24, 2007
    Date of Patent: May 12, 2009
    Assignee: Intel Corporation
    Inventors: Nick Cowley, Ruiyan Zhao
  • Publication number: 20090085671
    Abstract: Sharing one or more load inductors comprises receiving a first input signal at a first terminal of a first amplifier and amplifying the first input signal using the first amplifier. The first amplifier is coupled to one or more load inductors at a second terminal of the first amplifier and is coupled to one or more dedicated source inductors at a third terminal of the first amplifier. Also, a second input signal is received at a first terminal of a second amplifier amplifying the second input signal using the second amplifier. The second amplifier is coupled to the one or more load inductors at a second terminal of the second amplifier and is coupled to one or more dedicated source inductors at a third terminal of the second amplifier.
    Type: Application
    Filed: September 23, 2008
    Publication date: April 2, 2009
    Applicant: NANOAMP SOLUTIONS INC. (CAYMAN)
    Inventors: David H. Shen, James Burnham, Ali Tabatabaei, Ann P. Shen
  • Publication number: 20090079500
    Abstract: An automatic gain control (AGC) system and method for implementing a wide dynamic range automatic gain control (AGC) are disclosed. The AGC system features a large gain adjustment suitable for integration in silicon tuners. The AGC structure employs a pair of classical current steering stages, architecturally arranged to share the gain back-off characteristic in a novel “ping-pong” arrangement. The AGC system and method deliver a wide dynamic range at low power dissipation in radio frequency (RF) systems, but may be implemented as well in other applications.
    Type: Application
    Filed: September 24, 2007
    Publication date: March 26, 2009
    Inventors: Nick Cowley, Ruiyan Zhao
  • Patent number: 7495514
    Abstract: A low noise amplifier including a first-stage signal amplifier, a second-stage signal amplifier and a gain control unit is disclosed. The first-stage signal amplifier is for receiving an input signal and outputting a first output signal accordingly. The second-stage signal amplifier is coupled to the first-stage signal amplifier for outputting a second output signal according to the first output signal. The second-stage signal amplifier includes a first output transistor for outputting the second output signal. The gain control unit includes a first variable resistance device coupled to an input terminal of the first output transistor for adjusting voltage gain of the second output signal.
    Type: Grant
    Filed: February 17, 2006
    Date of Patent: February 24, 2009
    Assignees: Himax Technologies Limited, NCKU Research and Development Foundation
    Inventors: Da-Rong Huang, Huey-Ru Chuang, Yuan-Kai Chu
  • Patent number: 7489192
    Abstract: A low-noise amplifier, that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance, is shown. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without Noise Figure degradation.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: February 10, 2009
    Assignee: Theta Microelectronics, Inc.
    Inventors: Georgios Vitzilaios, Yannis Papananos
  • Patent number: 7486135
    Abstract: A configurable LNA architecture for a multi-band RF receiver front end comprises a bank of LNAs, each optimized to a different frequency band, wherein each LNA has a configurable topology. Each LNA comprises a plurality of amplifier stages, each stage including an RF transistor having a different width. The transistor widths in adjacent amplifier stages may be binary weighted, or may be sized to achieve a constant gain step. By selectively enabling and disabling RF transistors, the effective transistor width of the LNA can be controlled with a fine granularity. A DAC generates a bias voltage with a small quantization step, additionally providing a fine granularity of gain control. The LNAs are protected by overvoltage protection circuits which shield transistors from a supply voltage in excess of their breakdown voltage. A source degeneration inductor presents a real resistance at inputs of the LNAs, without introducing thermal noise.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: February 3, 2009
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Fenghao Mu
  • Patent number: 7474715
    Abstract: A variable load circuit for adjusting a phase of a differential signal including a first transistor having a first terminal adapted to receive a first component of the differential signal, a second transistor having a first terminal adapted to receive a second component of the differential signal and a second terminal coupled to a second terminal of the first transistor, and a variable current source coupled to a third terminal of both the first and second transistors. The variable current source generates a bias current based on a control signal. For each of the first and second transistors, a first capacitance is created between the first and second terminals, and a second capacitance is created between the first and third terminals. The first and second capacitances are each a function of the bias current and thus the control signal and operate to adjust the phase of the differential signal.
    Type: Grant
    Filed: May 27, 2004
    Date of Patent: January 6, 2009
    Assignee: RF Micro Devices, Inc.
    Inventors: Wenhai Ni, Kelvin Kai Tuan Yan, Mark Alexander John Moffat
  • Patent number: 7433656
    Abstract: A multi-stage amplifier includes first and second amplification stages and a loading stage, all of which generate flicker noise. A degeneration block is operably disposed between circuit common and the loading stage wherein the degeneration block is operable to reduce flicker noise generated by at least one of the loading stage, the first amplification stage and the second amplification stage. The degeneration block further includes at least one active MOSFET operably biased in a linear region to provide a specified resistive value and coupled to receive and conduct the common mode portion of the intermediate stage output signal based upon a gate terminal bias signal. A degeneration block amplifier is operable to generate a replica device bias signal wherein the replica device is operable to set the gate terminal bias signal for the at least one active MOSFET based upon the replica device bias signal.
    Type: Grant
    Filed: January 9, 2006
    Date of Patent: October 7, 2008
    Assignee: Broadcom Corporation
    Inventors: Michael Steven Kappes, Arya Reza Behzad
  • Patent number: 7432765
    Abstract: A variable gain amplifier includes a voltage-to-current converter for converting the input voltage to a current, a current amplifier for amplifying the current converted by the voltage-to-current converter, a current-to-voltage converter for converting the current amplified by the current amplifier into a voltage, and a controller for controlling an amplification factor of the current amplifier.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: October 7, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Iwao Kojima
  • Patent number: 7423487
    Abstract: A variable gain feedback amplifier circuit comprising a degenerated common emitter circuit coupled to an emitter follower circuit, an output of the emitter follower circuit being coupled to an input of the degenerated common emitter circuit via a variable feedback impedance. An automatic gain controller is coupled to the variable feedback impedance in order to reduce a closed loop gain of the variable gain feedback amplifier circuit when required. The degenerated common emitter circuit also comprises a variable emitter impedance that is also controlled by the automatic gain controller so as to counteract a lowering effect of a reduction in the variable feedback impedance on the open-loop gain of the variable gain feedback amplifier circuit.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: September 9, 2008
    Assignee: Avago Technologies General IP Pte Ltd
    Inventors: Marco Fornasari, Fesseha Tessera Seifu, Samir Aboulhouda
  • Patent number: 7378908
    Abstract: Disclosed are a variable gain differential amplifier, and variable degeneration impedance control device and method for use in the variable gain differential amplifier, which can adjust an amplification gain and ensure linearity. A DC level of a differential signal to be amplified by the amplifier is adjusted according to a control signal to adjust a gain of the amplifier, and the impedance of a variable degeneration impedance part is adjusted according to the differential signal of which the DC level is adjusted. That is, the gain of the differential amplifier is adjusted and the linearity is ensured by varying the impedance of the variable degeneration impedance part using the differential input signal of which the DC level is adjusted.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: May 27, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chun-deok Suh, Hoon-tae Kim, Jung-eun Lee
  • Publication number: 20080079499
    Abstract: A power amplifier amplifying an input signal to generate an output signal, comprising a cascode unit and a bias circuit. The cascode unit comprises a cascode stage, a first input stage, and a second input stage. The cascode stage generates the output signal. The first input stage, in cascode with the cascode transistor, has a first signal input to be biased to provide a first amplifier gain. The second input stage, in cascode with the cascode transistor, has a second signal input to be biased to provide a second amplifier gain. The bias circuit, coupled to the first and the second input stages comprises first and second switches. The first switch, coupled to the first input stage, is switched on to bias the first input stage with a bias voltage. The second switch, coupled to the second input stage, is switched on to bias the second input stage with the bias voltage.
    Type: Application
    Filed: September 28, 2006
    Publication date: April 3, 2008
    Applicant: VIA TECHNOLOGIES, INC.
    Inventor: Ming-Lin Tsai
  • Patent number: 7319364
    Abstract: Disclosed herein is an amplifier circuit having improved linearity and frequency band using a MGTR. The amplifier circuit comprises an amplification unit including a main transistor and an auxiliary transistor, an attenuation unit including inductors respectively connected to the source of the main transistor and the source of the auxiliary transistor, a capacitor connected at one end thereof to the sources of the main transistor and auxiliary transistor and connected at the other end thereof to the gates of the main transistor and auxiliary transistor, and an output unit connected to the drains of the main transistor and auxiliary transistor.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: January 15, 2008
    Assignee: Integrant Technologies Inc.
    Inventors: Tae Wook Kim, Bonkee Kim, Kwyro Lee
  • Publication number: 20080001673
    Abstract: An inductively degenerated low noise amplifier arrangement is shown having a transistor and a bonding pad connected to the input terminal of the transistor, wherein the bonding pad has parasitic capacitance, and wherein the bonding pad includes a metal layer connected to a second terminal of the transistor. In case of a field-effect transistor the second terminal may be the source and in case of a bipolar transistor the second terminal may be the emitter. The metal layer may be the ground plane of the bonding pad or an additional, intermediate layer.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventors: Jussi Ryynanen, Jouni Kaukovuori
  • Patent number: 7298213
    Abstract: An input impedance matching circuit for a low noise amplifier includes a source pad, a gate pad, an input transistor, a source degeneration inductor and a matching capacitor. The gate pad receives an input signal and the input transistor amplifies the input signal transmitted from the gate pad. The source degeneration inductor electrically coupled to an external ground voltage is adapted for input impedance matching of the low noise amplifier. The source pad is coupled to a source electrode of the input transistor and the matching capacitor is formed between the gate pad and the source pad extending the source pad to be disposed under the gate pad. Accordingly, impedance matching of the low noise amplifier may be facilitated and the gain and noise figure of the low noise amplifier may be improved.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: November 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Hoon Kang
  • Patent number: 7292104
    Abstract: A variable gain amplifier is disclosed where the gain of the amplifier is controlled by a variable emitter resistor that is responsive to a control signal. The variable resistor includes a resistor connected between the collector and emitter of a control transistor. A control signal applied to the base of the control transistor varies the gain of the amplifier from a minimum gain when the control transistor is cut-off to a maximum gain when the control transistor is saturated.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: November 6, 2007
    Assignee: Anadigics, Inc.
    Inventor: Henry Z. Liwinski
  • Patent number: 7233205
    Abstract: A differential amplifier can include input transistors for receiving a differential input signal and an inductor connected to the input transistors. The inductor can protect a voltage supply from radio frequency in the differential input signal. The accuracy of this differential amplifier can be significantly improved by including a bias network. This bias network advantageously allows a bias current in the input transistors to be set independently of a voltage drop across the inductor.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: June 19, 2007
    Assignee: Atheros Communications, Inc.
    Inventor: Keith K. Onodera
  • Patent number: 7230490
    Abstract: A voltage to current converter comprises a signal stage (1) with a first transistor (11) and a first resistor (12). The first transistor (11) is adapted to be fed with an input signal voltage (Vin). The converter is adapted to generate an output current, comprising an output DC bias current (IB1) and an output signal current (iout), and to provide a gain adjustment through the variation of the first resistor (12). The converter further comprises a bias stage (2), adapted to generate and feed the signal stage (1) with an input DC bias voltage (VDC), which input DC bias voltage (VDC) is adapted to keep the output DC bias current (IB1) constant during the variation of the first resistor (12).
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: June 12, 2007
    Assignee: Infineon Technologies AG
    Inventor: Jan Dahlin
  • Patent number: 7221227
    Abstract: In one embodiment, a method is provided for reducing output current oscillations of a driver provided with i) a current sensing circuit that senses excessive current draws of an output stage of the driver, and ii) a feedback control circuit that reduces the excessive current draws. In accordance with the method, an output of the current sensing circuit is coupled to an input of a common source amplifier with source degeneration. The output of the common source amplifier is coupled to a node between an input stage and an amplification stage of the driver. The common source amplifier is configured to be activated when the current sensing circuit senses an excessive current draw of the output stage, at which time the feedback control circuit is also activated. Related apparatus is also disclosed.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: May 22, 2007
    Assignee: Avago Technologies ECBU IP (Singapore) Pte. Ltd.
    Inventors: Kah Weng Lee, Bin Zhang
  • Patent number: 7202743
    Abstract: An emitter of a transistor (1) for high frequency amplification and a cathode of a diode (5) for generating reference voltage are grounded via an inductance (20). Anode electric potential of the diode (5) decreases with increase in output power of the transistor (1) and thus the operation of the transistor (1) is limited. Since the diode is an on linear element, it is possible to quickly limit the operation of the transistor (1) in response to an increase in output current, thereby preventing a breakdown caused by overcurrent.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: April 10, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Shingo Enomoto
  • Patent number: 7167053
    Abstract: An integrated circuit amplifier includes, in an exemplary embodiment, a first field effect transistor (FET) device configured as a common source amplifier with source degeneration and a second FET device configured as a tunneling gate FET, the tunneling gate FET coupled to the source follower. The tunneling gate FET is further configured so as to set a transconductance of the amplifier and the common source amplifier with source degeneration is configured so as to set an output conductance of the amplifier.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: January 23, 2007
    Assignee: International Business Machines Corporation
    Inventors: Wagdi W. Abadeer, Anthony R. Bonaccio, Kiran V. Chatty, John A. Fifield
  • Patent number: 7164318
    Abstract: Continuous variable-gain low-noise amplifier. The amplifier continuously adjusts its gain between well-defined high and low values by using a cascode current-steering circuit to partition signal current between two different nodes of an output loading network. A shunt feedback network connected from an intermediate node of the loading network to the input provides negative feedback that linearizes the amplifier as its gain is decreased. The circuit degrades the noise figure at lower gains by varying the gain without directly dumping the signal current to the power supply. The circuit produces only small changes in input and output impedances and preserves an improved reverse-isolation cascode characteristic as the gain is controlled.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: January 16, 2007
    Assignee: Sequoia Communications
    Inventors: Damian Costa, Joseph Austin, John Groe, Michael Farias
  • Patent number: 7145395
    Abstract: A transconductance cell is disclosed. The transconductance cell may be single-ended or differential. The transconductance cell may include a tunable degeneration circuit. The tunable degeneration circuit may have a plurality of field effect transistors connected in series with each of the field effect transistors having a gate configured to receive a tuning voltage.
    Type: Grant
    Filed: September 16, 2004
    Date of Patent: December 5, 2006
    Assignee: Qualcomm Incorporated
    Inventors: Prasad Gudem, Gurkanwal Kamal Sahota
  • Patent number: 7123091
    Abstract: A Darlington differential amplifier includes a differential pair of Darlington transistors, with each pair including a first transistor and a second transistor connected in cascade to the first transistor. The first transistor is controlled by an externally generated voltage and drives the second transistor. The first and second transistors each include first and second conducting terminals, with the first conducting terminals being connected together and forming an output node of the amplifier. A first degeneration impedance is connected between the second conduction terminals of the second transistors in the pair of Darlington transistors. A second degeneration impedance is connected between the second conduction terminals of the first transistors in the pair of Darlington transistors for reducing harmonic distortion of the amplifier.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: October 17, 2006
    Assignees: STMicroelectronics S.r.l., STMicroelectronics SA
    Inventors: Philippe Sirito-Olivier, Pietro Antonio Calo′
  • Patent number: 7106138
    Abstract: A radio frequency (RF) driver amplifier system and method that provides linear in decibel gain control is provided. The RF driver amplifier system comprises a linear transconductor receiving an input voltage and providing a controlled current based on input voltage received, temperature compensation circuitry for varying current from the linear transconductor according to absolute temperature, an exponential current controller receiving current varied according to temperature and providing an exponential current in response, and an inductive degeneration compensator receiving exponential current and providing a control current to driver amplifier circuitry, thereby compensating for inductive degeneration due to at least one inductor in the driver amplifier circuitry. Control current passes from the inductive degeneration compensator to the driver amplifier circuitry. Output gain from the driver amplifier circuitry varies linearly in decibels with respect to the input voltage.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: September 12, 2006
    Assignee: Qualcomm Incorporated
    Inventors: Kenneth Barnett, Brett C. Walker, Kevin Gard
  • Patent number: 7098737
    Abstract: An amplifier comprises an amplifier circuit which comprises a first inductor as an impedance element for degeneration, and a control circuit which has a second inductor electro-magnetically connected to the first inductor, and changes a control current flowing through the second inductor to change an inductance value of the first inductor, thereby changing amplification characteristics of the amplifier circuit.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: August 29, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryuichi Fujimoto, Tetsuro Itakura
  • Patent number: 7095279
    Abstract: An AC differential amplifier includes a pair of identical differential transconductance stages. Each transconductance stage includes a pair of inputs and a pair of outputs. The pairs of output of the transconductance stages are connected in common, and form a pair of output nodes of the AC differential amplifier. The pair of output nodes is also connected to a supply line through respective load resistors. One input of one transconductance stage is coupled through a capacitive device to an input of the other transconductance stage. The other inputs of the transconductance stages form the input terminals of the AC differential amplifier.
    Type: Grant
    Filed: August 26, 2004
    Date of Patent: August 22, 2006
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giacomino Bollati
  • Patent number: 7084704
    Abstract: A system for controlling gain in a polar loop is disclosed. Embodiments of the invention provide for a substantially constant gain tolerant of changes in supply voltage, ambient temperature, and/or manufacturing process.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: August 1, 2006
    Assignee: Skyworks Solutions, Inc.
    Inventor: Tirdad Sowlati
  • Patent number: 7057457
    Abstract: A low-noise amplifier circuit is specified which has a switchable gain ratio. For this purpose, a parallel circuit comprising a first and a second current path (3, 4) is provided between a radio-frequency signal input and output (1, 2), with the first current path (3) having a transistor which is connected in a common-base circuit for signal amplification, and the second current path (4) having a transistor which is connected in a common-emitter circuit (7) for signal amplification, and has input impedance matching (25, 27). Owing to the good noise characteristics and the good linearity characteristics, the described low-noise amplifier circuit is suitable for use in radio-frequency receivers in which adaptive pre-amplification is required even before a frequency converter, that is to say at the radio-frequency level, because the input signal has a wide dynamic range, such as that in the case of UMTS.
    Type: Grant
    Filed: June 19, 2002
    Date of Patent: June 6, 2006
    Assignee: Infineon Technologies AG
    Inventors: Robert-Grant Irvine, Harald Pretl, Claus Stoeger, Wolfgang Thomann
  • Patent number: 6977552
    Abstract: An impedance matching low noise amplifier (“LNA”) having a bypass switch includes an amplification circuit, a bypass switching network and a match adjustment circuit. The amplification circuit has an amplifier input and an amplifier output, and is configured to receive a radio frequency (RF) input signal at the amplifier input and apply a gain to generate an amplified RF output signal at the amplifier output. The bypass switching network is coupled to a low-gain control signal and is also coupled between the amplifier input and the amplifier output. The bypass switching network is configured to couple the amplifier input to the amplifier output when the low-gain control signal is enabled in order to feed the RF input signal through to the RF output signal. The match adjustment circuit is coupled to the low-gain control signal and the RF input signal, and is configured to couple the RF input signal to an impedance when the low-gain control signal is enabled.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: December 20, 2005
    Assignee: Research In Motion Limited
    Inventor: José A. Macedo
  • Patent number: 6972625
    Abstract: Continuously tuning a transconductance. Coupling a degeneration resistance from a first source of a first transistor in a differential pair of transistors to a second source of a second transistor in the differential pair of transistors. Applying a second variable degeneration resistance in parallel to the first degeneration resistance in response to the application of a first variable control voltage. And applying a third variable degeneration resistance in parallel to the first degeneration resistance and the second degeneration resistance in response to the application of a second variable control voltage having a fixed voltage offset from the first variable control voltage.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: December 6, 2005
    Assignee: Broadcom Corporation
    Inventors: Thinh Cat Nguyen, Arnoldus Venes
  • Patent number: 6972624
    Abstract: Circuits and methods for providing a variable gain while powered from a low-voltage supply. In a specific embodiment, an input signal is converted to a current by an emitter-degenerated pair. A portion of the input current is discarded, while the remainder is variably steered between a shunt stage or an AC ground such as VCC. The output of the shunt stage is buffered by a high speed output, the bandwidth of which is increased by feed-forward capacitors. This arrangement may be optionally repeated for additional gain.
    Type: Grant
    Filed: August 8, 2003
    Date of Patent: December 6, 2005
    Assignee: Linear Technology Corporation
    Inventor: Petrus Martinus Stroet
  • Patent number: 6946908
    Abstract: A radio frequency (RF) predistortion linearizer with a transistor and a control circuit, an input matching circuit and an output matching circuit. The control circuit is electrically coupled to a control voltage source that supplies control voltages via a control node. A resistor and a coupling inductor electrically couples the control circuit to the control node to receive the control voltages. These control voltages set two varactors of the control circuit to provide a capacitance. The capacitance and an inductance provided by an inductive block of the control circuit can thus provide a resonant frequency. This resonant frequency is thus controllable and is based on a centre frequency of an RF input signal provided to an input node of the RF predistortion linearizer.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: September 20, 2005
    Assignee: Agency for Science, Technology and Research
    Inventors: Jia Sun, Michael Yan Wah Chia
  • Patent number: 6933779
    Abstract: The present invention is related to a variable gain low noise amplifier that optimizes input matching, gain and noise characteristics, and linearity. The variable gain low noise amplifier according to an embodiment of the present invention includes a first amplifying cell that operates in a high gain mode, a second amplifying cell that operates in a low gain mode, a selectively matching circuit, and a first short-circuit means. The variable gain low noise amplifier according to the present invention selects the best operation in each gain mode so that the circuit operated in high and low gain modes does not affect a load of another circuit.
    Type: Grant
    Filed: August 5, 2003
    Date of Patent: August 23, 2005
    Assignee: Integrant Technologies Inc.
    Inventors: Kwyro Lee, Tae Wook Kim
  • Patent number: 6927633
    Abstract: A first circuit which is constituted by a thin film resistor is connected between the collector of a transistor and a power supply terminal, and a second circuit which is constituted by a semiconductor resistor is connected between the emitter of the transistor and a grounding terminal. The film thickness of a thin film resistor is set to not more than its skin depth at a frequency to be compensated for.
    Type: Grant
    Filed: March 21, 2001
    Date of Patent: August 9, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Seiichi Banba, Yasuhiro Kaizaki
  • Patent number: 6914488
    Abstract: A broadband amplification apparatus for extending a bandwidth includes a first and a second amplifying unit for amplifying an input signal, a buffering unit and a first inductive buffer. The buffering unit disposed between the first and the second amplifying unit buffers an output signal of the first amplifying unit to thereby maintain a bandwidth of the output signal, increases a gain and returns back a portion of the buffered signal to the first amplifying unit. The first inductive buffer, which is connected to the buffer unit, enhances input impedance as a frequency increases within a predetermined range, thereby introducing little gain changes while serving to extend a bandwidth.
    Type: Grant
    Filed: July 3, 2003
    Date of Patent: July 5, 2005
    Assignee: Information and Communications University Educational Foundation
    Inventors: Sang-Hyun Park, Dong Yun Jung, Chul Soon Park
  • Patent number: 6906592
    Abstract: A radio frequency (RF) driver amplifier system and method that provides linear in decibel gain control is provided. The RF driver amplifier system comprises a linear transconductor receiving an input voltage and providing a controlled current based on input voltage received, temperature compensation circuitry for varying current from the linear transconductor according to absolute temperature, an exponential current controller receiving current varied according to temperature and providing an exponential current in response, and an inductive degeneration compensator receiving exponential current and providing a control current to driver amplifier circuitry, thereby compensating for inductive degeneration due to at least one inductor in the driver amplifier circuitry. Control current passes from the inductive degeneration compensator to the driver amplifier circuitry. Output gain from the driver amplifier circuitry varies linearly in decibels with respect to the input voltage.
    Type: Grant
    Filed: November 3, 2003
    Date of Patent: June 14, 2005
    Assignee: Qualcomm Inc
    Inventors: Kenneth Barnett, Brett C. Walker, Kevin Gard