Having Particular Biasing Means Patents (Class 330/285)
  • Publication number: 20090091392
    Abstract: A bias circuit for the wireless transceiver is disclosed, which can be used for modulating the gain of the amplifier. The bias circuit comprises a first stage bias unit for receiving a constant current, a control voltage, and a first reference voltage and outputting a first outputting current, wherein the control voltage is used for controlling the value of the first outputting current, and further, the first outputting current can be increased or decreased by representing as an analog form, thus, the gain of the amplifier can be modulated according to the first outputting current, and the modulation of the gain can be represented as an analog form, such that the transient response occurred while the gain is modulated can be reduced.
    Type: Application
    Filed: July 3, 2008
    Publication date: April 9, 2009
    Inventors: John-San Yang, Shu-Fen Wei
  • Publication number: 20090091390
    Abstract: Programmable-gain amplifier systems are provided that are particularly suited for reducing degrading audio effects such as zipper noise. In one embodiment, these systems switchably couple an electronic potentiometer between an amplifier's inverting input terminal and interleaved tap points along a resistor that is coupled to the amplifier's output terminal. This arrangement introduces a number of fine gain steps between the gain steps that are realized with adjacent ones of the interleaved tap points to substantially reduce or eliminate zipper noise in a audio system that processes the system's output signal. The interleaved tap points facilitate efficient operation of the potentiometer during gain changes. They also permit the potentiometer to be effectively bypassed between gain changes so that distortion effects are substantially eliminated.
    Type: Application
    Filed: September 30, 2008
    Publication date: April 9, 2009
    Inventors: David M. Hossack, Rama Thakar, Robert Adams, Joseph Burke
  • Patent number: 7515001
    Abstract: An AC amplifier has an amplification circuit, and a bias circuit connected together by connecting wiring. The bias circuit receives an input of an AC signal from the amplification circuit via the connecting wiring. A DC voltage of the bias circuit conformed to the amplitude of the AC signal of the amplification circuit is supplied to the amplification circuit via the connecting wiring.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: April 7, 2009
    Assignee: Interchip Corporation
    Inventor: Masaaki Kamiya
  • Patent number: 7515000
    Abstract: A low-noise amplifier comprises a first amplification circuit that includes a control terminal and a first terminal. An impedance load communicates with the first terminal. A feedback circuit outputs an output current to the first terminal and that generates a bias current, which is output to the control terminal and is based on a difference between the output current and N times a reference current, where N is greater than zero.
    Type: Grant
    Filed: August 28, 2007
    Date of Patent: April 7, 2009
    Assignee: Marvell International, Ltd.
    Inventors: Xiaodong Jin, Shuran Wei
  • Patent number: 7511576
    Abstract: In an amplifying circuit using a grounded-emitter high frequency signal amplifying bipolar transistor, the value of impedance of a bias circuit as seen from the base terminal of the bipolar transistor is made optimum in the baseband frequency. More specifically, the resistance value of a base ballast resistor Rbias connected to the base terminal of the bipolar transistor is set to a range within ±50% of [Vt/Ibq?(?·Re+Rb)] being “ideal resistance value”, where Ibq is static base current, ? is the gain of the transistor, Re and Rb are parasitic resistance of the emitter terminal and base terminal, respectively, and Vt is voltage defined by (kT/q).
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: March 31, 2009
    Assignee: Hitachi Metals, Ltd.
    Inventor: Yuta Sugiyama
  • Patent number: 7508261
    Abstract: A system of compatible modules includes a radio frequency (RF) module with a power amplifier configured to produce an amplified RF signal at an output RF terminal; and a first row of pads and a first column of pads intersecting at a corner pad of the module, and wherein the corner pad is coupled to the output RF terminal.
    Type: Grant
    Filed: August 30, 2006
    Date of Patent: March 24, 2009
    Assignee: Micro-Mobio, Inc.
    Inventors: Ikuroh Ichitsubo, Kanya Kubota, Masaya Kuwano, Koshiro Matsumoto
  • Patent number: 7508266
    Abstract: A method and apparatus for linearizing the gain of a common-source field effect transistor (FET) amplifier. The method involves connecting a capacitive load in parallel with the gate of the FET through a switch, and opening and closing this switch depending on the voltage on the gate of the FET. The result is a FET amplifier circuit that has a substantially linear transcapacitance characteristic, making it a useful circuit for low-distortion high-power amplifiers such as xDSL line drivers.
    Type: Grant
    Filed: August 29, 2007
    Date of Patent: March 24, 2009
    Assignee: PMC-Sierra, Inc.
    Inventors: Jurgen Hissen, Matthew W. McAdam
  • Publication number: 20090072906
    Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient ? due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.
    Type: Application
    Filed: September 22, 2008
    Publication date: March 19, 2009
    Inventors: Hirokazu TSURUMAKI, Hiroyuki Nagai, Tomio Furuya, Makoto Ishikawa
  • Patent number: 7505742
    Abstract: An operating voltage applied to a transmitter's power amplifier in a mobile wireless transceiver is dynamically controlled so as to improve the efficiency of the transmitter at all output power levels. In one embodiment, the bias current levels within the transmitter are also varied to optimize the efficiency of the transmitter at all output power levels. In a preferred embodiment, a highly efficient switching regulator is controlled by a control circuit to adjust the operating voltage and/or bias current for the power amplifier in the transmitter. The control circuit has as its input any of a variety of signals which reflect the actual output power of the transmitter, the desired output power, or the output voltage swing of the transmitter.
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: March 17, 2009
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Steven J. Sharp, Stewart S. Taylor, Samuel W. Hammone, Ronald R. Ruebusch
  • Patent number: 7498552
    Abstract: An electronic microwave circuit with GaAs field-effect transistors, which are integrated onto a semiconductor substrate, for switching high frequency electrical input signals has at least one light source for illuminating the GaAs field-effect transistors. The intensity of the light source and/or the color of the light source are changeable during operation. A calibrating device calibrates the intensity and/or color of the light source using a method according to the invention.
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: March 3, 2009
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Wilhelm Kraemer
  • Publication number: 20090051437
    Abstract: An emitter follower circuit applies to an input terminal of a second amplifying device a voltage according to a reference voltage applied to a reference terminals. First and second resistors are connected in series between the reference terminal and an input terminal of a first amplifying device. The collector of a first transistor is connected to the reference terminal, and a control voltage is applied to the base of the first transistor. A third resistor is connected between the emitter of the first transistor and a grounding point. A current mirror circuit draws a current proportional to a current input from the collector of the first transistor from a connection point of the first and second resistors.
    Type: Application
    Filed: November 29, 2007
    Publication date: February 26, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Kazuya Yamamoto, Miyo Miyashita
  • Publication number: 20090039961
    Abstract: Circuitry for increasing the maximum output current magnitude of a diamond buffer (Q57,58,74,75) having increased maximum output current provides a bias current of a first magnitude (I) into an emitter of a PNP first input transistor (Q57) and sinks a bias current of the first magnitude out of an emitter of an NPN second input transistor (Q55). The decrease is sensed in a collector current of the first input transistor caused by a demand for increased base current by a NPN first output transistor (Q74) of the diamond buffer. A collector current (Ic(65)) in a NPN first transistor (Q65) is increased in response to the decrease in the collector current of the first input transistor. The increased collector current in the first transistor is mirrored into a base of the first output transistor to boost its base current and maintain operation of the first input transistor when the amount of base current demanded by the first output transistor exceeds the first magnitude.
    Type: Application
    Filed: August 7, 2007
    Publication date: February 12, 2009
    Inventor: Paul G. Damitio
  • Patent number: 7489196
    Abstract: Precision and reliability of a current limited mode output power control of an RF amplifier is enhanced by sensing the base current of the current controlled output power transistor. The base current is compared to a control current that is normalized by scaling it as a function of the current gain of a bipolar junction transistor of similar characteristics as the output power transistor. Fabrication process spread of current gain figures of bipolar junction transistors is effectively compensated. Moreover, by using a band-gap temperature compensation control current that is eventually ?-scaled before comparing it with the sensed base current of the output power transistor, the output power may be effectively controlled and maintained constant over temperature as well as process spread variations.
    Type: Grant
    Filed: May 11, 2007
    Date of Patent: February 10, 2009
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Michele Vaiana, Giuseppe Gramegna
  • Patent number: 7486142
    Abstract: The present invention is directed to compensate electric properties of an RF power module depending on changes with time, temperature dependency, variations, and the like of grounded emitter current amplification factor of an HBT. A compound semiconductor integrated circuit supplies reference current of a reference HBT depending on hFE of an HBT to an input terminal of a first current mirror of a bias circuit of a silicon semiconductor integrated circuit. The base of an output HBT of the compound semiconductor integrated circuit is biased with bias current which increases in response to decrease in hFE of the HBT from an output of the first current mirror of the silicon semiconductor integrated circuit.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: February 3, 2009
    Assignee: Renesas Technology Corp.
    Inventors: Hirokazu Tsurumaki, Hiroyuki Nagai, Tomio Furuya, Yoshiaki Harasawa, Makoto Tabei
  • Patent number: 7482873
    Abstract: A method and circuit for preserving linearity of a RF power amplifier, the power amplifier including a RF power output unit (4, 24, 62) having a characteristic drive level and fed by a supply voltage, comprising measuring the output voltage of the RF power output unit (4, 24, 62); comparing the measured output voltage to at least one threshold voltage to produce a control signal; and adapting the drive level or the supply voltage of the RF power output (4, 24, 62) unit by means of the control signal to operate the output unit below its saturation level. A method and circuit for stabilizing an antenna circuit comprising a RF power amplifier and a matching circuit by preserving linearity of a RF power amplifier, where the above power amplifier is used.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: January 27, 2009
    Assignee: NXP B.V.
    Inventors: Adrianus Van Bezooijen, Christophe Chanlo
  • Publication number: 20090015336
    Abstract: A system for amplifying a signal is provided. The system includes a plurality of driver stages, each having an input, an output, and a disable control. An output stage having an input is coupled to the outputs of the plurality of driver stages. A plurality of disable control signals is provided to the driver stages so as to controllably enable and disable one or more of the driver stages.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 15, 2009
    Inventors: Ichiro Aoki, Scott D. Kee, Seyed-Ali Hajimiri, Roberto Aparicio Joo, Rahul Magoon, Donald McClymont
  • Patent number: 7477102
    Abstract: A post-distortion method for cascading amplifier stages in a two-stage microwave power amplifier and a dynamic biasing method using back-end processing for correcting nonlinearity in the power amplifier output. A first or driver stage biased in a near-A region with low distortion is cascaded with a second or power stage biased in a near-C region with high efficiency. The amplitude and phase responses of the two stages compensate another to yield a more linear overall gain for the overall power amplifier. The dynamic biasing scheme modulates the source to drain voltages of the transistors used in the amplifier stages based on the harmonics in amplifier output in order to minimize the harmonics and correct non-linearity in the output.
    Type: Grant
    Filed: July 11, 2006
    Date of Patent: January 13, 2009
    Assignee: HRL Laboratories, LLC
    Inventors: Grant Andrew Ellis, Miroslav Micovic, Keh-Chung Wang, JeongSun Moon
  • Publication number: 20080315953
    Abstract: There is provided a variable gain mixer capable of controlling a gain at a low source voltage in a wide range without additional current consumption. The mixer includes: mixers constructed with variable gain amplifiers having two transistor pairs Qp+/Qp? and Qn+/Qn? to have a predetermined gain by using LO+ and LO? signals; and LO bias circuits connected to have bias voltages different from each other with respect to the LO+ and LO? signals of the mixers and share an input signal. Accordingly, by integrating the variable gain amplifiers into the mixers, a gain change can be obtained at a low source voltage in a wide range without connecting a number of variable gain amplifiers.
    Type: Application
    Filed: June 30, 2006
    Publication date: December 25, 2008
    Applicant: FCI INC.
    Inventor: Sung Ho Beck
  • Patent number: 7469133
    Abstract: RF power detector employing an envelope amplifier circuit and a current mirror circuit. The output of the current mirror circuit supplies a bias voltage for biasing the output of the envelope amplifier circuit. Furthermore, the output of the envelope amplifier circuit is fed back to the output of the current mirror circuit so as to reduce the magnitude of the bias signal according to the magnitude of the amplified RF signal envelope. In this manner, the overall gain of the RF power detector can be selectively reduced, resulting in an RF power detector having a more linearized dynamic range and greater ability to compensate for variation in gain caused by temperature.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: December 23, 2008
    Assignee: Silicon Storage Technology, Inc.
    Inventor: Liyang Zhang
  • Publication number: 20080309413
    Abstract: In a gain switching LNA including a first transistor, a first transistor group (for example, second to ninth transistors) and a second transistor group (for example, tenth to seventeenth transistors), a first resistor connected between an emitter of the tenth transistor and a collector of the first transistor and a second resistor connected to emitters of eleventh to seventeenth transistors and the collector of the first transistor and having a resistance one seventh as high as that of the first resistor are provided. In a high-gain mode, since isolation of the tenth to seventeenth transistors which are turned OFF and the first and second to ninth transistors is secured by the first resistor and the second resistor, there is no deterioration in the noise factor.
    Type: Application
    Filed: April 14, 2008
    Publication date: December 18, 2008
    Inventors: Yutaka Igarashi, Akio Yamamoto
  • Patent number: 7463091
    Abstract: The present invention provides a communication semiconductor integrated circuit device equipped with a high-frequency power amplifier circuit including a gain control amplifier and a bias circuit which supplies such a bias current as to linearly change the gain of the gain control amplifier, and a wireless communication system using the same. A bias current generating circuit which supplies a bias current to a linear amplifier that constitutes the communication high-frequency power amplifier circuit, comprises a plurality of variable current sources respectively different in current value and start level. These variable current sources are controlled according to an input control voltage and thereby combine their currents into a bias current. The combined bias current changes exponentially with respect to the input control voltage.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: December 9, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Toyota, Kazuaki Hori, Kazuhiko Hikasa
  • Patent number: 7463095
    Abstract: An analog signal processing circuit comprises a bias circuit, a first circuit including a control input that communicates with the bias circuit, a first terminal that generates an output current, and a second terminal, and a device that communicates with the second terminal of the first circuit, that includes a variable resistor, and that has a resistance that is modulated in response to an input signal to the analog signal processing circuit.
    Type: Grant
    Filed: August 7, 2007
    Date of Patent: December 9, 2008
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse, King Chun Tsai, George Chien
  • Patent number: 7456693
    Abstract: An amplification apparatus includes an amplifier. The amplification apparatus includes a bias voltage circuitry coupled to the amplifier to provide a bias voltage thereto. The amplification apparatus includes a supply voltage circuitry coupled to the amplifier to provide a supply voltage thereto. The supply voltage circuitry is coupled to the bias voltage circuitry. The bias voltage circuitry is configured to provide the bias voltage depending on the supply voltage.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: November 25, 2008
    Assignee: Infineon Technologies AG
    Inventors: Markus Zannoth, Winfried Bakalski
  • Patent number: 7453147
    Abstract: The variation of the parasitic inductance generated at the output terminal of a transistor in the final stage of a multistage amplifier unit is reduced. One side of the semiconductor chip that includes the final stage transistor is put in contact with the inner wall of a square recess formed in a wiring substrate. The semiconductor chip is positioned and fixed accurately at the bottom of the recess, whereby the drain wire of the transistor is fixed. Then, a chip edge at which the drain electrode is disposed on top of the chip is put in contact with the inner wall of the recess, which is closer to the drain bonding pad. A metallized layer is formed of the same size as that of the chip at the bottom of the recess and a fusion bonding material is supplied on the metallized layer.
    Type: Grant
    Filed: January 6, 2006
    Date of Patent: November 18, 2008
    Assignees: Renesas Technology Corp., Renesas Eastern Semiconductor, Inc.
    Inventors: Tsutomu Ida, Yoshihiko Kobayashi, Masakazu Hashizume, Yoshinori Shiokawa, Sakae Kikuchi
  • Patent number: 7449954
    Abstract: A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: November 11, 2008
    Assignee: Black Sand Technologies, Inc.
    Inventors: Ryan M. Bocock, Timothy J. Dupuis
  • Patent number: 7443246
    Abstract: A constant current bias approach that receives an input bias voltage and maintains a temperature independent constant current bias in a linear amplifier device. Integrated sense circuitry protects against unacceptable input voltages to guarantee bias stability. Fabrication in multiple semiconductor technologies and assembly into a single package allows for optimum cost and performance of DC bias and RF amplifier sections.
    Type: Grant
    Filed: October 21, 2003
    Date of Patent: October 28, 2008
    Assignee: Skyworks Solutions, Inc.
    Inventors: Paul Andrys, Mark Bloom, Hugh J. Finlay, David Ripley, Terry Shie, Kevin Hoheisel
  • Patent number: 7443244
    Abstract: A method for controlling a supply voltage for a radio frequency power amplifier, that includes the steps of: determining (210) at least one parameter; determining (220) a constant voltage based on the at least one parameter; and automatically adjusting (230) the supply voltage to the constant voltage.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: October 28, 2008
    Assignee: Motorola, Inc.
    Inventor: Rodney Hagen
  • Patent number: 7443245
    Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient ? due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: October 28, 2008
    Assignee: Renesas Technology Corporation
    Inventors: Hirokazu Tsurumaki, Hiroyuki Nagai, Tomio Furuya, Makoto Ishikawa
  • Patent number: 7444124
    Abstract: An architecture, circuits, systems and a method for amplifying an analog signal. The architecture and/or circuit generally includes a first fixed stage (e.g., a predriver) and an adjustable stage. The first fixed stage may be configured to amplify an analog signal and provide a first amplified analog output at a first common node. The adjustable stage may comprise a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at a second common node, a transistor having a control terminal, and a first inductor in electrical communication with the control terminal of the transistor. The adjustable stage may be configured to apply a bias to the control terminal of the transistor in a selected segment and to provide an output signal in one of a plurality of a power ranges corresponding to a number of selected parallel amplifier segments.
    Type: Grant
    Filed: February 10, 2004
    Date of Patent: October 28, 2008
    Assignee: Marvell International Ltd.
    Inventors: Wayne Loeb, King Chun Tsai
  • Publication number: 20080258817
    Abstract: The present invention provides a system and method for operating hybrid concurrent and switched dual-band low noise amplifiers. Embodiments use a concurrent design at the input block of a hybrid LNA to advantageously achieve better impedance matching while using a switch capacitor design at the output block to advantageously achieve a better gain than typical concurrent multiband LNAs. Embodiments might be integrated into wireless devices configured to simultaneously receive on multiple frequency bands while providing gains of 30 dB or more by combining the advantages of concurrent multiband LNAs with the advantages of switched multiband LNAs. In addition to the higher gains provided by embodiments of the hybrid LNA described herein, hybrid multiband LNAs according to embodiments of the present invention provide a smaller device footprint and power requirements than would be required for a receiver including multiple single-band LNAs for amplifying signals for each frequency band individually.
    Type: Application
    Filed: April 17, 2007
    Publication date: October 23, 2008
    Applicant: RedDot Wireless Inc.
    Inventors: Lin Zhou, Shih Mo
  • Patent number: 7439806
    Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.
    Type: Grant
    Filed: February 27, 2007
    Date of Patent: October 21, 2008
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventor: Gee Samuel Dow
  • Patent number: 7436258
    Abstract: A multi-operational amplifier system comprises a plurality of operational amplifiers and a controller to configure the plurality of operational amplifiers. The operational amplifiers may be selectively configured to operate individually or in combination with other of the operational amplifiers. The operational amplifiers may have different common node inputs. In one aspect, the different inputs may be selected from groups of PMOS, N-type NMOS and NZ NMOS inputs. The operational amplifiers may include the different inputs that are arranged as differential pairs.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: October 14, 2008
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Anh Ly, Sang Thanh Nguyen, Vishal Sarin
  • Publication number: 20080224780
    Abstract: A transconductance control circuit, comprising: a test transconductance circuit for providing an output current from a reference voltage; apparatus for deriving a bias current for the test transconductance circuit from the output current, the bias current including a component that varies with temperature and a component that varies with process; and apparatus for providing the bias current to other transconductance circuits.
    Type: Application
    Filed: March 13, 2007
    Publication date: September 18, 2008
    Inventor: Kim LI
  • Publication number: 20080204145
    Abstract: A bias control circuit for an RF amplifier having an output device for providing an output signal to a load and a driver device for driving the output device includes a current mirror circuit for providing a driver device bias current to the driver device and an output device bias current to the output device. When the amplifier operates in a high power mode, the current mirror circuit supplies the driver device bias current at a level to turn on the driver device at a high current level and an output device bias current to turn on the output device. When the amplifier operates in a low power mode, the current mirror circuit supplies a driver device bias current to turn on the driver device at a reduced current level and an output device bias current to turn off the output device.
    Type: Application
    Filed: February 27, 2007
    Publication date: August 28, 2008
    Inventor: Gee Samuel Dow
  • Patent number: 7414479
    Abstract: According to an exemplary embodiment, an amplification module includes a power amplifier configured to receive an RF input signal and provide an RF output signal. The amplification module further includes an autobias control circuit configured to receive and convert the RF output signal to a control signal. The control signal can cause the power amplifier to have a quiescent current that increases substantially linearly in response to an increase in the RF output power of the RF output signal. The autobias control circuit can include a peak detector/log converter circuit coupled to a first input of a differential amplifier, where the differential amplifier outputs the control signal. The autobias control circuit can further include a DC reference circuit coupled to a second input of the differential amplifier. The amplification module further includes an analog bias circuit coupling the control voltage to a bias input of said power amplifier.
    Type: Grant
    Filed: September 21, 2007
    Date of Patent: August 19, 2008
    Assignee: Skyworks Solutions, Inc.
    Inventors: David S. Ripley, Paul R. Andrys, Keith Nellis
  • Patent number: 7411457
    Abstract: The present invention is to provide a technique which optimizes a gate resistor of a bias circuit to thereby make it possible to greatly improve a distortion characteristic of a power amplifier. A bias circuit used as for biasing the gate of a final-stage power transistor is included in a power amplifier provided in a communication mobile system. In the bias circuit, an inductance and a resistor are series-connected between a power supply voltage and the gate of the power transistor. The resistance value of the resistor is set to approximately the same order as an input impedance of the power transistor. When the input impedance of the power transistor is about 10? or so, for example, the resistor is set to about a few ? to about 100?. Thus, the gain of the power transistor at a low-frequency band can greatly be suppressed.
    Type: Grant
    Filed: May 11, 2006
    Date of Patent: August 12, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hideyuki Ono, Toru Fujioka, Masahito Numanami
  • Publication number: 20080186100
    Abstract: Disclosed herein is a variable-gain amplification circuit, wherein the sources of first and second MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are tied to a common connection point connected to a current source. An input signal is supplied to the gates of the first and second MOSFETs. The drains of the first and second MOSFETs are connected to the sources of third and fourth MOSFETs respectively whereas the drains of the third and fourth MOSFETs are connected to two output terminals respectively, a gain control voltage is supplied to the gates of both the third and fourth MOSFETs. When control is executed in order to lower the gain control voltage supplied to the gates of both the third and fourth MOSFETs, other control is also executed in order to raise a bias voltage applied to the gates of both the first and second MOSFETs.
    Type: Application
    Filed: February 1, 2008
    Publication date: August 7, 2008
    Applicant: SONY CORPORATION
    Inventor: Taiwa Okanobu
  • Publication number: 20080186099
    Abstract: A bias circuit 22 in a power amplifier 1 is provided with a VBE-controlled voltage source circuit 20 and a Nagata current mirror circuit 21. The Nagata current mirror circuit 21 includes a transistor Tr5 and a transistor Tr6. The transistor Tr5 has its emitter grounded, its base connected to a control input terminal 17 via a resistor R3, and its collector connected to that base via a resistor R4. The transistor Tr6 has its emitter grounded, its base connected to the collector of the transistor Tr5, and its collector connected to the base of the transistor Tr3. The arrangement is capable of compensating both the temperature characteristics of the gain of the power amplifier 1 and the control input voltage characteristics of the gain of the power amplifier 1. In other words, the arrangement is capable of reducing the temperature dependence and control input voltage dependence of the gain of the power amplifier 1.
    Type: Application
    Filed: January 28, 2008
    Publication date: August 7, 2008
    Inventors: Yoshiteru Ishimaru, Motoko Furukawa
  • Patent number: 7408412
    Abstract: There are provided a power amplifying transistor, a bias circuit which supplies a bias current to the base of the power amplifying transistor, a current mirror circuit which detects a peak value of the collector voltage of the power amplifying transistor, and a control circuit which, when the peak value of the collector voltage becomes higher than a voltage set in advance, controls the bias circuit to increase the bias current.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: August 5, 2008
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Tomoyuki Asada
  • Patent number: 7408413
    Abstract: According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.
    Type: Grant
    Filed: September 7, 2007
    Date of Patent: August 5, 2008
    Assignee: Skyworks Solutions, Inc.
    Inventor: David S. Ripley
  • Publication number: 20080180169
    Abstract: According to an exemplary embodiment, a multimode power amplifier configured to receive an RF input signal and provide an RF output signal in linear and saturated operating modes includes an output stage configured to receive a fixed supply voltage and to provide the RF output signal. The multimode power amplifier further includes at least one driver stage coupled to the output stage, where the at least one driver stage is configured to receive the RF input signal and an adjustable supply voltage. The adjustable supply voltage controls an RF output power of the RF output signal when the multimode power amplifier is in the saturated operating mode. The at least one driver and the output stage are each biased by a low impedance voltage in the linear and saturated operating modes. The adjustable supply voltage can be controlled by a fixed control voltage in the linear operating mode.
    Type: Application
    Filed: December 4, 2007
    Publication date: July 31, 2008
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: David S. Ripley, Pat Reginella
  • Patent number: 7405625
    Abstract: Control structures are provided to accurately maintain amplifier common-mode levels at the predetermined level of a common-mode reference voltage Vcm. The disclosed control structures provide amplifier feedback along a first feedback path that is configured to provide high gain and low bandwidth to closely maintain amplifier common-mode level at the predetermined level of a common-mode reference voltage Vcm. They also provide amplifier feedback along a second feedback path that is configured to provide wide bandwidth to substantially reduce perturbations of the common-mode level that would have otherwise been induced by input signal transients. In an important amplifier feature, these controls are obtained without use of structures (e.g., capacitors and switching transistors) that use substantial current which reduces amplifier efficiency.
    Type: Grant
    Filed: April 25, 2007
    Date of Patent: July 29, 2008
    Assignee: Analog Devices, Inc.
    Inventors: Joseph Michael Hensley, Michael R. Elliott
  • Patent number: 7400201
    Abstract: An apparatus and a method for reducing drain modulation in a high power amplifier are provided, in which an adder supplies a current corresponding to a voltage reduced by a drain modulation, and a bias unit adds the current supplied from the adder to a DC bias and supplies the added current to a drain of a transistor. Accordingly, the drain modulation occurring in the transistor can be minimized and an output characteristic of the high power transistor can be improved.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: July 15, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyoung-Tae Kim
  • Patent number: 7400197
    Abstract: A gain control circuit capable of keeping a constant gain without being affected by ambient temperature includes a variable resistor element connected to a power supply terminal, a control unit for controlling the resistance value of the variable resistor element on the basis of a gain control voltage, an amplifying transistor that is supplied with a power supply voltage through the variable resistor element, a current detecting resistor that is interposed between the variable resistor element and a collector of the amplifying transistor, and a voltage detecting unit that detects a drop dropped by the current detecting resistor. The dropped voltage detected by the voltage detecting unit is fed back to the control unit to control the resistance value of the variable resistor element such that a current flowing through the current detecting resistor does not vary.
    Type: Grant
    Filed: March 22, 2006
    Date of Patent: July 15, 2008
    Assignee: Alps Electric Co., Ltd.
    Inventors: Shoichi Asano, Kazuharu Aoki
  • Patent number: 7394317
    Abstract: An amplifying circuit having a bias voltage setting mechanism includes: a first amplifying element that amplifies an input signal and outputs the amplified signal as an output signal; a bias voltage setting unit that generates a bias voltage from the output signal on the basis of a control signal, such as an AGC voltage; and a high impedance element (third resistor) by which the bias voltage is applied to an input portion of the first amplifying element and which, when a component for bias voltage setting, such as a fourth resistor, is externally provided in the bias voltage setting unit, prevents a capacitive component of the component for bias voltage setting from being equivalently connected with respect to the input portion.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: July 1, 2008
    Assignee: ALPS Electric Co., Ltd.
    Inventor: Masaki Yamamoto
  • Patent number: 7394318
    Abstract: An amplifier control system for regulating the gain of a controlled amplifier. The control system comprises a first signal source for generating a first reference signal. A replica amplifier representative of the controlled amplifier generates an output signal in dependence on the first reference signal. A second signal source generates a second reference signal representative of the product of the first reference signal and a worst case value of the gain of the controlled amplifier. A comparator generates an error signal in dependence on any difference between the second reference signal and the output from the replica amplifier. A negative feedback loop varies the gain of the controlled amplifier and the replica amplifier in dependence on the error signal.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: July 1, 2008
    Assignee: International Business Machines Corporation
    Inventor: James Stephen Mason
  • Patent number: 7395036
    Abstract: In a high frequency power amplifier circuit in which bias voltages are applied to the transistors for amplification by current mirroring, The power amplifier includes a detection circuit including a transistor for detection which receives the AC component of an input signal to the last-stage transistor for amplification at its control terminal, a current mirror circuit which mirrors current flowing through that transistor, and a current-voltage converter which converts current flowing in the slave side of the current mirror circuit into a voltage. In the detection circuit, a voltage from a bias circuit for generating the bias voltages for the transistors for amplification is applied to the control terminal of the transistor for detections, and output of the detection circuit is applied to the control terminal of the last-stage transistor for amplification.
    Type: Grant
    Filed: September 1, 2005
    Date of Patent: July 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hitoshi Akamine, Masahiro Tsuchiya, Kyoichi Takahashi, Kazuhiro Koshio
  • Publication number: 20080150637
    Abstract: This invention provides an electronic part for high frequency power amplification (RF power module) which will automatically perform the precharge level setting for proper output power at start of transmission without requiring the software process for precharging to run on the baseband IC, which can reduce the burden on users, namely, mobile phone manufacturers. Such electronic part configured to amplify RF transmit signals includes an output power control circuit which supplies an output power control voltage to a bias control circuit in a high frequency power amplifier circuit, based on an output power level directive signal. This electronic part is equipped with a precharge circuit which raises the output power control voltage to produce a predetermined level of output power, while detecting a current flowing through a final-stage power amplifying element, triggered by rise of a supply voltage at start of transmission.
    Type: Application
    Filed: February 19, 2008
    Publication date: June 26, 2008
    Inventors: Kyoichi Takahashi, Takayuki Tsutsui, Hitoshi Akamine, Fuminori Morisawa, Nobuhiro Matsudaira
  • Publication number: 20080136524
    Abstract: An amplifier circuit including a plurality of CMOS (Complementary Metal Oxide Semiconductor) inverter circuits connected in parallel with each other. The CMOS inverter circuits each include a first PMOS (P-channel Metal Oxide Semiconductor) transistor, a first NMOS (N-channel Metal Oxide Semiconductor) transistor, gates of the first PMOS and NMOS transistors, a second PMOS transistor, a first switch connected to a gate of the second PMOS transistor, a second NMOS transistor, and a second switch connected to a gate of the second NMOS transistor.
    Type: Application
    Filed: November 19, 2007
    Publication date: June 12, 2008
    Inventors: Kenji Komori, Atsushi Hirabayashi
  • Patent number: 7378909
    Abstract: By using a radio-frequency power amplifier which turns off an Nth stage radio-frequency amplifying transistor when the level of radio-frequency output power falls below a predetermined value, it is possible to improve the linearity when the level of the radio-frequency output power is so low.
    Type: Grant
    Filed: February 23, 2006
    Date of Patent: May 27, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Toshiharu Tomizawa