Having Particular Biasing Means Patents (Class 330/285)
  • Publication number: 20080111629
    Abstract: A constant current bias circuit and associated method is disclosed. The constant current bias circuit comprises an output stage for amplifying a radio frequency (RF) signal, wherein the output stage is operably coupled with a voltage. The constant current bias circuit further comprises a bias circuit operably coupled with the output stage for generating a substantially constant current bias to the output stage. The constant current bias circuit still further comprises a plurality of bias transistors operably coupled with the voltage and the output stage.
    Type: Application
    Filed: November 15, 2006
    Publication date: May 15, 2008
    Inventor: William H. Davenport
  • Patent number: 7368988
    Abstract: In a base-bias-control-type high-frequency power amplifier with a plural stage configuration, a rising voltage of a base bias current supplied to an initial stage transistor is made lower than a rising voltage of a base bias current supplied to a second stage transistor by a bias circuit, and a difference between the both voltages is set to be smaller than a base-emitter voltage of an amplifying stage transistor. Also, a rising voltage of a base bias current supplied to a third stage transistor is made equal to the rising voltage of the base bias current supplied to an initial stage transistor. Accordingly, a technology capable of improving the power control linearity can be provided in a high-frequency power amplifier used in a polar-loop transmitter or the like.
    Type: Grant
    Filed: July 20, 2006
    Date of Patent: May 6, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Hidetoshi Matsumoto, Tomonori Tanoue, Isao Ohbu
  • Patent number: 7368995
    Abstract: A power amplifier with an active bias circuit and operating method thereof are provided. The power amplifier comprises a power amplifier transistor and an active bias circuit. The active circuit receives input power and applies a bias voltage to the gate of the power amplifier transistor. The bias voltage will increase in correspondence with an increase in the input power. Therefore, the power amplifier of this invention has excellent output power, linearity of operation and power-added efficiency in a range of input power.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: May 6, 2008
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yi-Jen Chan, Meng-Wei Hsieh
  • Patent number: 7365604
    Abstract: The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: April 29, 2008
    Assignee: Mediatek Inc.
    Inventors: Sifen Luo, Yiping Fan, Hongyu Li, Chieh-Yuan Chao
  • Patent number: 7362181
    Abstract: A procedure for operation of a high frequency amplifier having a power transistor—amplifier stage designed as a source or emitter circuit for amplifying a gate or base side high frequency signal supplied over an input interface network E which signal is amplified at the drain or collector side and output via an output interface network. A device for the measurement of the drain or collector current I_D is connected at the amplifier stage on the drain or collector side and a final control element is connected on the gate or base side. A pre-adjustable desired value W_SOLL and an actual value W_IST corresponding to the drain or collector current are input to the final control element, which adjusts the gate voltage or the base current so that the drain or collector current I_D is brought to the desired value W_SOLL. At a constant input power P_IN of the high frequency amplifier, the envelope curve of the output signal RF_OUT is modulated by the desired value W_SOLL.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: April 22, 2008
    Assignee: EADS Deutschland
    Inventors: Gebhard Hoffmann, Andreas Salomon, Georg Huber
  • Patent number: 7362179
    Abstract: A power amplifier circuit amplifying an input signal to an output signal and a method thereof. The power amplifier circuit comprises a ramp controller, a current source, and a first amplification stage. The ramp controller receives an enable signal to generate a ramp signal. The current source is coupled to the ramp controller, produces a ramp current by the ramp signal. The first amplification stage is coupled to the current source, comprises a first supply voltage input coupled to a fixed supply voltage, and is biased by the ramp current to amplify the input signal such that an envelope of the output signal is a ramp.
    Type: Grant
    Filed: January 19, 2006
    Date of Patent: April 22, 2008
    Assignee: Via Technologies Inc.
    Inventors: Jung-Chang Liu, Che-Hung Liao, Sen-You Liu, Did-Min Shih
  • Patent number: 7363012
    Abstract: A transmission power control device which amplifies in a driver amplifier 2, and in a power amplifier 4 to which the output from the driver amplifier is inputted, so that the power of a signal to be transmitted may become predetermined target transmission power, detects an electric-current which flows to the power amplifier 4 from a power supply, and adjusts the gain of the driver amplifier 2 based on this detected electric-current.
    Type: Grant
    Filed: January 21, 2005
    Date of Patent: April 22, 2008
    Assignee: NEC Corporation
    Inventor: Yoshiaki Ando
  • Patent number: 7358817
    Abstract: A linearized bias circuit with adaptation resolves the problem happening to the power amplifier with conventional bias circuit that the DC and AC characteristics of the power amplifier shift or even deteriorate due to a temperature variation. The linearized bias circuit with adaptation has a reference voltage source, a first voltage source, a first resistor, a second resistor, a first NPN transistor, a second NPN transistor, and a third NPN transistor. The present invention has the characteristics of bias current temperature compensation, gain and phase compensations to achieve high linearity for the conventional power amplifier and reducing the DC consumption power. At the same time, the quantity of the required elements and layout area in the present invention are small so that the design complexity can be reduced for improving yield, reducing IC layout area, and reducing cost.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: April 15, 2008
    Assignee: RichWave Technology Corp.
    Inventors: Chi-Hung Kao, Chih-Wei Chen, Cheng-Min Lin, Yun-Shan Chang, Shyh-Chyi Wong
  • Patent number: 7358816
    Abstract: A variable gain amplifier (VGA) having stable input impedance matching and a stable noise figure in spite of a variation of an amplification gain is provided. In an embodiment of the VGA, a first stage of a cascode amplification unit has a fixed impedance regardless of a change of an amplification gain, and a variable gain determination unit comprised of a plurality of transistors is formed at an upper stage in the cascode amplification unit. Accordingly, a change of an input impedance of the cascode amplification unit due to the change of the amplification gain is minimized. In another embodiment of the VGA, an amplification gain of an amplification unit is controlled by adjusting a voltage applied to the amplification unit by controlling a current to be output by a current supply source, and stable input impedance matching and a stable noise figure are obtained.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: April 15, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-young Ryu, Hyun-koo Kang, Dae-yeon Kim, Jeong-ho Lee
  • Patent number: 7355480
    Abstract: A bias circuit includes a voltage stabilizer connected between a control voltage input terminal through a current limit resistor and a ground, a bias supply emitter follower with a base connected to a node between the current limit resistor and the voltage stabilizer through a resistor, and a current limiter connected between the base and an emitter of the bias supply emitter follower.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: April 8, 2008
    Assignee: NEC Electronics Corporation
    Inventor: Yuri Honda
  • Patent number: 7355477
    Abstract: A low cost, robust method and apparatus for controlling the gain of a power amplifier to compensate for changes that are gradual with time. The bias circuit of a power amplifier is sent one of three signals in response to a measurement of the average output power level of the power amplifier. If the average output power lever is less than a desired value, a signal to increment the bias current by a set amount is sent, so that the output power increases. If the average output power lever is more than the desired value, a signal to decrement the bias current by a set amount is sent. A third signal may be sent that causes the bias circuit to reset to a default value. The three signals may be sent as a two bit digital signal.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: April 8, 2008
    Assignee: Agere Systems Inc.
    Inventors: Syed Aon Mujtaba, Edward E. Campbell
  • Patent number: 7355478
    Abstract: An RF amplifier includes at least one RF amplification stage having an RF input signal and an RF output signal and a power signal circuit with power supply coupled with the amplification stage for providing a power signal to the amplification stage. A bias circuit biases the amplification stage to control its operation. A pulse detection circuit is coupled with the power signal circuit and the bias circuit and detects a voltage from the power signal. The pulse detection circuit analyzes the detected voltage of the power signal and determines if the RF input signal presents a pulsed signal condition or non-pulsed signal condition, and controls the bias circuit for biasing the amplification stage according to the determined condition.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: April 8, 2008
    Assignee: Andrew Corporation
    Inventor: Simon Hamparian
  • Patent number: 7352244
    Abstract: This invention provides an electronic part for high frequency power amplification (RF power module) which will automatically perform the precharge level setting for proper output power at start of transmission without requiring the software process for precharging to run on the baseband IC, which can reduce the burden on users, namely, mobile phone manufacturers. Such electronic part configured to amplify RF transmit signals includes an output power control circuit which supplies an output power control voltage to a bias control circuit in a high frequency power amplifier circuit, based on an output power level directive signal. This electronic part is equipped with a precharge circuit which raises the output power control voltage to produce a predetermined level of output power, while detecting a current flowing through a final-stage power amplifying element, triggered by rise of a supply voltage at start of transmission.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: April 1, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Kyoichi Takahashi, Takayuki Tsutsui, Hitoshi Akamine, Fuminori Morisawa, Nobuhiro Matsudaira
  • Patent number: 7352240
    Abstract: A method and apparatus are provided for use with a power amplifier for protecting active devices on the power amplifier. A peak detector is used by control circuitry to detect the presence of a peak voltage that exceeds a threshold voltage. In response to the detection of a peak voltage, the gain of the power amplifier is reduced.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 1, 2008
    Assignee: Silicon Laboratories Inc.
    Inventor: Timothy J. Dupuis
  • Patent number: 7348852
    Abstract: A power amplifier for use in wireless communication devices is disclosed that reduces the noise generated at the output of the amplifier in the receive band of the wireless communication device. A resonant circuit is inserted between the base ballast resister and the lumped resister. The resonant frequency of the resonant circuit is adjusted to correspond to the frequency offset between the transmission frequency and the frequency corresponding to the peak noise in the receive band of the communication device.
    Type: Grant
    Filed: November 8, 2004
    Date of Patent: March 25, 2008
    Assignee: Anadigies, Inc.
    Inventor: Kenneth Sean Ozard
  • Patent number: 7348854
    Abstract: A transistor biasing circuit is shown that utilizes a negative feedback loop control circuit to set the gate bias voltage in the output transistors of a power amplifier. This control circuit has a current sensor in series with the drain of the transistor, the current sensor output in turn feeding a dc signal into a dc amplifier, and the output of the dc amplifier driving a gate bias integrator which forms a dc control loop for maintaining the bias point. The output transistor is protected from excessive temperature and/or excessive power dissipation.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: March 25, 2008
    Assignee: Scientific Components Corporation
    Inventor: Mikhail Mordkovich
  • Patent number: 7348853
    Abstract: A method for measuring the forward power output of an amplifier with improved accuracy with a mismatched load based on probing the amplitude of the AC voltage and current in the final amplifier stage. Amplitudes are combined resulting in a composite reading that is affected less by load mismatch. Variations include measuring signal amplitude at two points 90 degrees apart in the transmission medium and measuring the power supply voltage and current of a saturated amplifier.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: March 25, 2008
    Assignee: Avago Technologies Wireless IP Pte Ltd
    Inventors: Lovell H. Camnitz, Bartholomaus Hendrik Jansen, Ray Myron Parkhurst, Jr.
  • Patent number: 7348849
    Abstract: A complementary metal oxide semiconductor (CMOS) variable gain amplifier has a wider decibel-linear gain variation characteristic with respect to a control voltage when a signal is amplified. The variable gain amplifier includes: a bias input circuit for supplying a current corresponding to a bias voltage; an operation region combination and feedback circuit connected to the bias input circuit and combining at least two amplifiers by feedback in response to a control voltage, each amplifier having a decibel-linear characteristic in saturation and triode regions of a complementary metal oxide semiconductor (CMOS); and a bias output circuit connected to the bias input circuit, and outputting bias current controlled by the operation region combination and feedback circuit.
    Type: Grant
    Filed: August 1, 2006
    Date of Patent: March 25, 2008
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seon Ho Han, Hyun Kyu Yu
  • Patent number: 7345547
    Abstract: The embodiments of the present invention include a bias circuit for a power-amplifying device, which receives and amplifies an input RF signal having a series of RF cycles within a modulation envelop. The bias circuit compensates odd-order distortion processes by detecting the power in the input signal and providing a dynamic adjustment to a bias stimulus for the power-amplifying device within a time scale of the modulation envelope.
    Type: Grant
    Filed: October 17, 2005
    Date of Patent: March 18, 2008
    Assignee: WJ Communications, Inc.
    Inventors: Nanlei Larry Wang, Walter A. Strifler
  • Patent number: 7342456
    Abstract: Systems are disclosed for providing a DC-bias network for a RF distributed amplifier. One embodiment may include a DC-bias network comprising a planar substrate having an input port configured to receive a DC input signal and provide a DC bias at an output port, a microstrip line mounted to the planar substrate and interconnecting the input port and the output port, and a plurality of RF resonators coupled to the microstrip line. Each of the plurality of RF resonators are configured to provide a substantially constant impedance for a respective portion of the frequency band of the RF signal.
    Type: Grant
    Filed: April 19, 2006
    Date of Patent: March 11, 2008
    Assignee: Northrop Grumman Corporation
    Inventors: Janice Allen, legal representative, David Brunone, Alex Chau, Barry Allen
  • Patent number: 7340228
    Abstract: An RF transmitter having an RF power amplifier comprising: 1) a drive transistor that receives an input RF signal and generates an output RF signal; and 2) a drain bias adaptation circuit for supplying drain current to the drive transistor. The drain bias adaptation circuit comprises: i) a first switch for coupling the drive transistor drain to a system supply voltage; ii) a second switch for coupling the drive transistor drain to a high supply voltage that is greater than the system supply voltage; iii) a first bypass capacitor coupled to the first switch for reducing noise in the drain current when the first switch is closed and the second switch is open; and iv) a second bypass capacitor coupled to the second switch for reducing noise in the drain current when the second switch is closed and the first switch is open.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: March 4, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Robert W. Monroe, Michael L. Brobston
  • Patent number: 7339435
    Abstract: An amplifier is provided with an amplifier circuit including a plurality of first transistors having gates thereof coupled in common, a bias circuit including a plurality of second transistors that are coupled and outputs a bias voltage to the gates of the plurality of first transistors, and a selection circuit simultaneously controlling a number of first transistors to be coupled to the amplifier circuit and a number of second transistors to be coupled to the bias circuit based on the bias voltage.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: March 4, 2008
    Assignee: Fujitsu Limited
    Inventor: Shinji Saito
  • Patent number: 7336132
    Abstract: A wireless communication system has a first operation mode (GSM mode) for amplifying a phase-modulated high frequency signal with a high frequency power amplifier circuit and a second operation mode (EDGE mode) for amplifying a phase and amplitude-modulated high frequency signal with the amplifier circuit. The amplifier circuit has an input of a high frequency signal, with the amplitude and frequency being fixed in both the first and second operation modes, and operates by being controlled for the bias state of each amplifying stage in accordance with the output control signal produced by a control circuit based on the demanded output level (Vapc) and the detected output level (VSNS) so that the amplifier circuit performs signal amplification to meet the demanded output level.
    Type: Grant
    Filed: August 16, 2006
    Date of Patent: February 26, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Takayuki Tsutsui, Masahiro Tsuchiya, Tetsuaki Adachi
  • Patent number: 7332966
    Abstract: A high frequency power amplifier circuit includes amplifying devices whose control terminals (gate or base terminals) are supplied with a bias voltage. The high frequency power amplifier circuit keeps constant the bias voltage so that the amplifying devices operate in a saturation region. The high frequency power amplifier circuit controls an operating power supply voltage supplied to the amplifying devices in accordance with an output request level to control output power. A device (diode) having temperature dependency is provided for an operating power supply voltage control circuit that controls the operating power supply voltage for the amplifying devices in accordance with the output request level. The operating power supply voltage control circuit is configured to generate the operating power supply voltage corresponding to the device's temperature characteristics and supply it to the amplifying devices.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: February 19, 2008
    Assignee: Renesas Technology Corp.
    Inventors: Tomio Furuya, Kazuhiko Ishimoto, Hiroyuki Tanaka
  • Patent number: 7323937
    Abstract: A variable-gain amplifier has distortion characteristics (IIP3) improved when the gain is attenuated without impairing characteristics with respect to a gain PG and a noise figure NF when the gain is maximum. The variable-gain amplifier has a plurality of parallel-connected dual-gate FETs having first FETs (6), (8) having gates for being supplied with an input signal and second FETs (7), (9) connected in cascade to the first FETs (6), (8), respectively. Gate control voltages (Vcon1, Vcon2) can separately be applied to the second FETs (7), (9), respectively, from voltage control means.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: January 29, 2008
    Assignee: Sony Corporation
    Inventors: Koichi Ooya, Tsuyoshi Sakuma
  • Publication number: 20080001669
    Abstract: An RF amplifier includes at least one RF amplification stage having an RF input signal and an RF output signal and a power signal circuit with power supply coupled with the amplification stage for providing a power signal to the amplification stage. A bias circuit biases the amplification stage to control its operation. A pulse detection circuit is coupled with the power signal circuit and the bias circuit and detects a voltage from the power signal. The pulse detection circuit analyzes the detected voltage of the power signal and determines if the RF input signal presents a pulsed signal condition or non-pulsed signal condition, and controls the bias circuit for biasing the amplification stage according to the determined condition.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Inventor: Simon Hamparian
  • Patent number: 7315211
    Abstract: A two stage power amplifier circuit that employs both a DC to DC converter and sliding bias controller to improve power amplifier efficiency. The control signal that is generated by the power detector circuit to control the input voltage to the DC to DC converter is also used to provide the reference voltage that controls the sliding bias controller. The sliding bias controller reduces the quiescent current of the power amplifiers by reducing the bias currents, and thus the DC voltage at lower power output levels driving the power amplifiers. This causes the power amplifiers to operate at or near higher efficiency Class B operation at lower power output levels. As the power level increases, the sliding bias controller reduces its control on the bias currents so that the power amplifier can be driven at necessary higher power output levels.
    Type: Grant
    Filed: March 28, 2006
    Date of Patent: January 1, 2008
    Assignee: RF Micro Devices, Inc.
    Inventors: Jongsoo Lee, Edward T. Spears
  • Patent number: 7312655
    Abstract: An apparatus and a method for controlling a bias adaptation bias of a high power amplifier. In the high power amplifier, a coupling operation is performed with respect to an input signal with a predetermined voltage, an amount of attenuation used for attenuating a voltage of the coupled input signal is adjusted corresponding to the voltage of the input signal, a bias adaptation bias is created correspondingly to a voltage obtained by attenuating the voltage of the input signal by the amount of the attenuation, and the coupled input signal is amplified corresponding to the bias adaptation bias, thereby performing a signal amplifying operation for maintaining linearity of an input signal, regardless of an average input voltage intensity of the input signal.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: December 25, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyoung-Tae Kim
  • Publication number: 20070285170
    Abstract: A low cost, robust method and apparatus for controlling the gain of a power amplifier to compensate for changes that are gradual with time. The bias circuit of a power amplifier is sent one of three signals in response to a measurement of the average output power level of the power amplifier. If the average output power lever is less than a desired value, a signal to increment the bias current by a set amount is sent, so that the output power increases. If the average output power lever is more than the desired value, a signal to decrement the bias current by a set amount is sent. A third signal may be sent that causes the bias circuit to reset to a default value. The three signals may be sent as a two bit digital signal.
    Type: Application
    Filed: June 13, 2006
    Publication date: December 13, 2007
    Applicant: AGERE SYSTEMS INC.
    Inventors: Syed Aon Mujtaba, Edward E. Campbell
  • Patent number: 7307478
    Abstract: An adjustable power amplifier includes an input capacitor, an input transistor, an inductor, an output capacitor, and a gain module. The input capacitor includes a first plate and a second plate, wherein the first plate of the input capacitor is operably coupled to receive an input radio frequency (RF) signal. The input transistor includes a gate, a drain, and a source, wherein the gate of the input transistor is operably coupled to the second plate of the input capacitor and the source of the input transistor is operably coupled to a circuit ground. The inductor includes a first node and a second node, wherein the first node of the inductor is operably coupled to a power supply and the second node of the inductor is operably coupled to the drain of the input transistor.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: December 11, 2007
    Assignee: Broadcom Corporation
    Inventor: Seema B. Anand
  • Patent number: 7304540
    Abstract: A current feedback circuit is used in the source follower. The source follower includes a first MOS transistor and a current mirror. The first MOS transistor has a gate receiving an inputting signal and a source outputting an output signal. A drain current flows through the first MOS transistor. The current mirror generates the drain current according to an adding current. The current feedback circuit is used for stabilizing the drain current to a constant value substantially. The current feedback circuit includes a passive component and an operational amplifier. The passive component has a first end and a second end, which has an error voltage when a corresponding current flows through the passive component. The magnitude of the corresponding current changes with the magnitude of the drain current. The operational amplifier outputs a reference signal to adjust the adding current according to the error voltage and a reference voltage.
    Type: Grant
    Filed: December 15, 2005
    Date of Patent: December 4, 2007
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chuan-Ping Tu
  • Patent number: 7304539
    Abstract: In a high frequency power amplifier circuit that supplies a bias to an amplifying FET by a current mirror method, scattering of a threshold voltage Vth due to the scattering of the channel impurity concentration of the FET, and a shift of a bias point caused by the scattering of the threshold voltage Vth and a channel length modulation coefficient ? due to a short channel effect are corrected automatically. The scattering of a high frequency power amplifying characteristic can be reduced as a result.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: December 4, 2007
    Assignee: Renesas Technology Corporation
    Inventors: Hirokazu Tsurumaki, Hiroyuki Nagai, Tomio Furuya, Makoto Ishikawa
  • Patent number: 7301400
    Abstract: A mobile terminal including a multi-phase DC-DC converter for controlling a supply voltage provided to a power amplifier in the transmit chain. In general, the multi-phase DC-DC converter includes a multi-phase converter control system and a multi-phase power train. The multi-phase converter control system generates a plurality of control signals based on a set-point voltage and a supply voltage at the output of the multi-phase DC-DC converter. The plurality of control signals are provided to the multi-phase control system which generates a plurality of currents each based on a corresponding one of the plurality of control signals. The plurality of currents charge an output capacitor such that an average voltage across the output capacitor is the desired supply voltage.
    Type: Grant
    Filed: June 2, 2004
    Date of Patent: November 27, 2007
    Assignee: RF Micro Devices, Inc.
    Inventor: David Dening
  • Patent number: 7298207
    Abstract: Systems and methods are disclosed for providing automatic gain control of a multi-stage system. A method can include defining at least one parameter that is adapted to at least one of maximize hardware capacity of each of a plurality of gain stages and mitigate part-to-part variations of the multi-stage system. An order is selected for training the plurality of stages based on relative noise dominance for the plurality of stage. For a given stage of the plurality of stages, which is selected according to the selected order, output signals of the multi-stage system are measured over a plurality of gain settings for the given stage. A gain setting of the given stage of the multi-stage system also is configured based on the measured output signals relative to the at least one parameter defined for the given stage. The plurality of gain stages can include an analog equalizer as well programmable gain amplifiers connected in series.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: November 20, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Susan Yim, Udayan Dasgupta, Sandeep Oswal, Murtaza Ali
  • Patent number: 7295075
    Abstract: Within an amplifier circuit having an amplifying transistor, a boost voltage is presented at a port of the transistor. The amplifying transistor has a base, an emitter and a collector or a gate, a source, and a drain. A capacitor is provided in electrical communication with the transistor. A voltage source is provided for providing one of the collector and the source with a first voltage and for in a first mode of operation charging the first capacitor. Also within the circuit is a switch for switching between the first mode of operation and a second other mode of operation wherein the first capacitor and the voltage source cooperate to provide a voltage at one of the collector and the source in excess of the first voltage.
    Type: Grant
    Filed: November 15, 2005
    Date of Patent: November 13, 2007
    Assignee: SiGe Semiconductor Inc.
    Inventors: Jeremy Loraine, Jeffery Wojtiuk, Philip Macphail, Stephen J. Kovacic
  • Patent number: 7292104
    Abstract: A variable gain amplifier is disclosed where the gain of the amplifier is controlled by a variable emitter resistor that is responsive to a control signal. The variable resistor includes a resistor connected between the collector and emitter of a control transistor. A control signal applied to the base of the control transistor varies the gain of the amplifier from a minimum gain when the control transistor is cut-off to a maximum gain when the control transistor is saturated.
    Type: Grant
    Filed: February 11, 2005
    Date of Patent: November 6, 2007
    Assignee: Anadigics, Inc.
    Inventor: Henry Z. Liwinski
  • Patent number: 7288986
    Abstract: The present invention provides a communication semiconductor integrated circuit device equipped with a high-frequency power amplifier circuit including a gain control amplifier and a bias circuit which supplies such a bias current as to linearly change the gain of the gain control amplifier, and a wireless communication system using the same. A bias current generating circuit which supplies a bias current to a linear amplifier that constitutes the communication high-frequency power amplifier circuit, comprises a plurality of variable current sources respectively different in current value and start level. These variable current sources are controlled according to an input control voltage and thereby combine their currents into a bias current. The combined bias current changes exponentially with respect to the input control voltage.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: October 30, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Toyota, Kazuaki Hori, Kazuhiko Hikasa
  • Patent number: 7288991
    Abstract: According to an exemplary embodiment, an amplification module includes a power control circuit. The amplification module further includes a power amplifier coupled to the power control circuit and configured to draw a supply current and receive a supply voltage from the power control circuit. The power control circuit is configured to control a DC power provided to the power amplifier by controlling a product of a sense current, which is a mirror current of the supply current, and the supply voltage. The power control circuit includes a feedback voltage that corresponds to the product of the sense current and the supply voltage. The power control circuit further includes an analog multiplier circuit configured to receive the sense current and the supply voltage and generate the feedback voltage. The power control circuit further includes a differential error amplifier configured to compare the feedback voltage to a control voltage.
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: October 30, 2007
    Assignee: Skyworks Solutions, Inc.
    Inventor: David S. Ripley
  • Patent number: 7286019
    Abstract: According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: October 23, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Solti Peng, Chien-Chung Chen, Abdellatif Bellaouar, Heng-Chih Lin
  • Patent number: 7282996
    Abstract: An apparatus having an electronic amplifier with signal gain dependent bias. The electronic apparatus includes the amplifier and a bias state control circuit. The electronic amplifier has a signal gain and a bias state. The signal gain is adjustable to either of at least two different signal gain settings, and the bias state is adjustable to either of at least two different bias state settings. The bias state control circuit has capability of adjusting the bias state setting of the amplifier based upon the signal gain setting to which the amplifier is adjusted.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: October 16, 2007
    Assignee: Micron Technology, Inc.
    Inventor: Frank J. DeMonte
  • Patent number: 7279979
    Abstract: The invention relates to power amplifiers having an adjustable output impedance. A power amplifier according to the invention can be used, for example, for feeding a radio frequency transmission signal into an antenna of a mobile communication device. The real part of an output impedance of a power amplifier according to the invention is matched with the real part of an impedance loading the power amplifier by adjusting an operating point of an output stage transistor 301 of the power amplifier.
    Type: Grant
    Filed: September 12, 2005
    Date of Patent: October 9, 2007
    Assignee: Nokia Corporation
    Inventor: Marko Autti
  • Patent number: 7279978
    Abstract: A gain stage control method may include providing a control current signal; generating a regulation current signal connected to the control current signal; transforming the regulation current signal into a biasing current, proportional to the regulation current signal; and biasing the gain stage by using the biasing current. The biasing current may be related to the control current signal by an exponential law.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: October 9, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Scuderi, Antonino Scuderi, Luca La Paglia, Francesco Carrara, Giuseppe Palmisano
  • Publication number: 20070229164
    Abstract: A low noise amplifier for operating in response to different gain modes is disclosed. The low noise amplifier includes a voltage adjusting circuit, which provides a first bias voltage at a first gain mode and provides a second bias voltage at a second gain mode, where the second bias voltage is different from the first bias voltage; and an amplifying circuit coupled to the voltage adjusting circuit, for providing a first transfer characteristic according to the first bias voltage during the first gain mode in order to amplify an input signal to generate an output signal, and for providing a second transfer characteristic according to the second bias voltage during the second gain mode in order to amplify the input signal to generate the output signal.
    Type: Application
    Filed: March 19, 2007
    Publication date: October 4, 2007
    Inventors: Ying-Yao Lin, Chao-Cheng Lee, Ying-Hsi Lin
  • Patent number: 7276973
    Abstract: According to an exemplary embodiment, an amplification module includes a power amplifier configured to receive an RF input signal and provide an RF output signal. The amplification module further includes an autobias control circuit configured to receive and convert the RF output signal to a control signal. The control signal can cause the power amplifier to have a quiescent current that increases substantially linearly in response to an increase in the RF output power of the RF output signal. The autobias control circuit can include a peak detector/log converter circuit coupled to a first input of a differential amplifier, where the differential amplifier outputs the control signal. The autobias control circuit can further include a DC reference circuit coupled to a second input of the differential amplifier. The amplification module further includes an analog bias circuit coupling the control voltage to a bias input of said power amplifier.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: October 2, 2007
    Assignee: Skyworks Solutions, Inc.
    Inventors: David S. Ripley, Paul R. Andrys, Keith Nellis
  • Patent number: 7276971
    Abstract: A multi-operational amplifier system comprises a plurality of operational amplifiers and a controller to configure the plurality of operational amplifiers. The operational amplifiers may be selectively configured to operate individually or in combination with other of the operational amplifiers. The operational amplifiers may have different common node inputs. In one aspect, the different inputs may be selected from groups of PMOS, N-type NMOS and NZ NMOS inputs. The operational amplifiers may include the different inputs that are arranged as differential pairs.
    Type: Grant
    Filed: January 11, 2007
    Date of Patent: October 2, 2007
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Anh Ly, Sang Thanh Nguyen, Vishal Sarin
  • Publication number: 20070222519
    Abstract: An RF output power amplifier (PA) of a cellular telephone includes first and second Class AB amplifier circuits. If the cellular telephone is to operate in a high power operating mode, then the first amplifier drives the PA output terminal. The power transistor(s) in the first amplifier is/are biased at a first DC current and a first DC voltage so as to optimize efficiency and linearity at high output powers. If the cellular telephone is to operate in a low power operating mode, then the second amplifier drives the output terminal. The power transistor(s) in the second amplifier is/are biased at a second DC current and a second DC voltage so as to optimize efficiency and linearity at low output powers. By sizing the power transistors in the amplifiers appropriately, emitter current densities are maintained substantially equal so that PA power gain is the same in the two operating modes.
    Type: Application
    Filed: March 8, 2007
    Publication date: September 27, 2007
    Applicant: QUALCOMM, Incorporated
    Inventors: Junxiong Deng, Prasad Gudem
  • Patent number: 7274258
    Abstract: A dynamic bias circuit for an RF amplifier is provided to overcome the drawbacks of conventional bias circuits. The dynamic bias circuit of the present invention is best used for an RF amplifier having an FET amplifying transistor. It automatically raises the DC bias point as the input power increases. As a result, the saturation of output power in the pinch-off region can be avoided. This dynamic bias circuit not only improves the operating characteristics of the RF amplifier, such as high operating efficiency and high-linearity output power, but also consumes zero power in its internal circuitry. Furthermore, it has a simple circuit structure with very few circuit components and a reduced chip area. It can thus be easily integrated into an amplifier to achieve a cost reduction.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: September 25, 2007
    Assignee: Industrial Technology Research Institute
    Inventor: Chih Wei Wang
  • Patent number: 7271658
    Abstract: An RF power module in which operating voltage is controlled by a control signal based on amplitude information includes a temperature detecting device which is provided over a semiconductor chip formed with an amplifying transistor or a semiconductor chip formed with a power source circuit; and a detector having a hysteresis characteristic which is provided over the semiconductor chip formed with the device or a different semiconductor chip, applies a bias to the temperature detecting device to compare the state of the device at two reference levels, outputs a signal indicating abnormality when judging that the temperature of the semiconductor chip formed with the temperature detecting device is above a predetermined temperature, and outputs a signal indicating normality when judging that the temperature of the semiconductor chip is below a second predetermined temperature lower than the predetermined temperature.
    Type: Grant
    Filed: June 10, 2005
    Date of Patent: September 18, 2007
    Assignees: Renesas Technology Corp., Hitachi Hybrid Network, Co., Ltd.
    Inventors: Kouichi Matsushita, Kenichi Shimamoto, Kazuhiro Koshio, Kazuhiko Ishimoto, Takayuki Tsutsui
  • Patent number: 7271656
    Abstract: A sliding bias circuit for dynamically controlling quiescent current flowing through an output transistor of a linear power amplifier operating in an output frequency band, the linear power amplifier comprising a circuit device for generating a bias signal producing a quiescent current flowing through the output transistor of the RF power amplifier, the sliding bias circuit comprising a detector circuit for detecting RF input to the amplifier and generating an output signal tracking the detected RF input, the output signal directly coupled to the circuit device for automatically modifying the bias signal and the quiescent current through the output transistor. In this manner, the quiescent current at the output stage is reduced and optimized for minimum dissipation and optimal linearity at all power output levels.
    Type: Grant
    Filed: November 28, 2003
    Date of Patent: September 18, 2007
    Assignee: NXP B.V.
    Inventors: Christophe Joly, Tirdad Sowlati
  • Publication number: 20070210871
    Abstract: The present invention relates to an amplifier and, more particularly, to an adaptive linear amplifier with low power consumption and a high linearity. The adaptive linear amplifier according to the present invention comprises amplification means and a bias controller. The amplification means comprises a main transistor and an auxiliary transistor unit. The main transistor and the auxiliary transistor unit are coupled to each other. The bias controller controls a bias voltage applied to the main transistor and the auxiliary transistor unit.
    Type: Application
    Filed: March 5, 2007
    Publication date: September 13, 2007
    Inventors: Tae Wook KIM, Hee yong Yoo, Bonkee Kim, Minsu Jeong