Having Particular Biasing Means Patents (Class 330/285)
  • Patent number: 7268626
    Abstract: A method for compensating a power amplifier based on operational-based changes begins by measuring one of a plurality of operational parameters of the power amplifier to produce a measured operational parameter. The method continues by comparing the measured operational parameter with a corresponding one of a plurality of desired operational parameter settings. The method continues by, when the comparing of the measured operational parameter with the corresponding one of a plurality of desired operational parameter settings is unfavorable, determining a difference between the measured operational parameter and the corresponding one of a plurality of desired operational parameter settings. The method continues by calibrating the one of the plurality of operational settings based on the difference.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: September 11, 2007
    Assignee: Broadcom Corporation
    Inventor: Seema B. Anand
  • Patent number: 7265627
    Abstract: A radio frequency (RF) linear power amplifier having an output transistor, and including a circuit means for generating a bias signal producing a quiescent current flowing through the output transistor, a detector circuit for detecting RF input to the amplifier and generating a driving signal according to a power level of the RF input; and a self-adaptable circuit for receiving the driving signal and automatically modifying the bias signal and the quiescent current through the output transistor. The quiescent current at the output stage is reduced and optimized for minimum dissipation and optimal linearity at all power output levels. The bias circuit for the radio frequency (RF) linear power amplifier includes a self-adaptable circuit that dynamically modifies the quiescent current for an output stage amplifier by automatically tracking an RF signal input to the amplifier at power ranges above a certain power output threshold.
    Type: Grant
    Filed: November 28, 2003
    Date of Patent: September 4, 2007
    Assignee: NXP B.V.
    Inventor: Christophe Joly
  • Patent number: 7262665
    Abstract: A low-noise amplifier with a first amplification circuit that includes a control terminal, a first terminal, and a second terminal that communicates with a first reference voltage. An impedance load that communicates with the first terminal and a feedback circuit that comprises a current source that communicates with a second reference voltage. A comparator circuit that includes a first input, a second input and an output that communicates with the control terminal. A first impedance that communicates with the current source and the first input and that generates a predetermined reference voltage based on a reference current generated by the current source and a second impedance that communicates with the second input and the impedance load wherein the feedback circuit compares a voltage, based on an output current associated with the first terminal, with the reference voltage to generate a bias signal that is applied to the control terminal.
    Type: Grant
    Filed: September 19, 2006
    Date of Patent: August 28, 2007
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Shuran Wei
  • Publication number: 20070194852
    Abstract: The present invention is directed to compensate electric properties of an RF power module depending on changes with time, temperature dependency, variations, and the like of grounded emitter current amplification factor of an HBT. A compound semiconductor integrated circuit supplies reference current of a reference HBT depending on hFE of an HBT to an input terminal of a first current mirror of a bias circuit of a silicon semiconductor integrated circuit. The base of an output HBT of the compound semiconductor integrated circuit is biased with bias current which increases in response to decrease in hFE of the HBT from an output of the first current mirror of the silicon semiconductor integrated circuit.
    Type: Application
    Filed: December 29, 2006
    Publication date: August 23, 2007
    Inventors: Hirokazu Tsuromaki, Hiroyuki Nagai, Tomio Furuya, Yoshiaki Harasawa, Makoto Tabei
  • Patent number: 7254164
    Abstract: A Class AB voltage-to-current converter includes a plurality of DC coupled transconductance stages that produce a linearized output and a biasing circuit. The biasing circuit generates a primary bias voltage that is greater than a generated secondary bias voltage. As such, the first transconductance stage becomes active before the second transconductance stage with respect to the magnitude of a differential input voltage, thereby allowing the transconductance of the secondary transconductance stage to be added (or subtracted) from the transconductance of the primary stage to improve the overall transconductance of the Class AB voltage-to-current converter. As each of the plurality of transconductance stages is biased differently from the others, the various transconductance stages are biased on to differing amounts based upon the biasing signals as well as the input signal.
    Type: Grant
    Filed: November 14, 2006
    Date of Patent: August 7, 2007
    Assignee: Broadcom Corporation
    Inventor: Arya Reza Behzad
  • Patent number: 7250817
    Abstract: A linear power efficient radio frequency (RF) driver system (100) includes a pre-driver amplifier (105) for amplifying an RF signal; and an output driver (107) having a substantially high impedance input for amplifying the signal from the pre-driver amplifier (105). A bias controller (109) is used for controlling the RF power output of the output driver (107) where the current drain of the pre-driver amplifier (105) and the bias controller (109) are controlled to a minimum level while maintaining linearity of the output driver (107). The system and method of the invention work to provide minimal current drain in portable products using simultaneous current and power amplifier reduction based on driver input swing to lower signal distortion.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: July 31, 2007
    Assignee: Motorola, Inc.
    Inventor: Raul Salvi
  • Patent number: 7248118
    Abstract: A radio frequency power amplifier module that brings sufficient attenuation to a radio frequency signal in a bias supply line connecting a bias control part and a radio frequency power amplifier part without increasing module substrate area is aimed. At least one bonding pad 106 having a capacitance component to a ground and stitch structure inductances 108, 109 composed of a bonding wire 105 provided via the bonding pad are provided in the bias supply line connecting the bias control part and the radio frequency power amplifier part.
    Type: Grant
    Filed: April 23, 2004
    Date of Patent: July 24, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Masami Ohnishi, Tomonori Tanoue, Hidetoshi Matsumoto
  • Patent number: 7248111
    Abstract: A power amplifier with a multi-mode digital bias control circuit is provided. The power amplifier utilizes a complementary reference voltage generation circuit and a bias current-control circuit to generate a plurality of bias current levels for different output power levels. In an embodiment of the present invention, the power amplifier circuit is connected to a reference voltage and two control signals. Depending on the desired output power level, the control signals set the corresponding bias current in the amplifying transistors, to ensure sufficient linearity. The power amplifier is capable of operating at a very low quiescent current level, for example, 5 mA. As a result, a significant improvement in the power amplifier's overall efficiency is achieved, and the battery talk time of a wireless communication device is increased. The invention finds application in wireless communication devices such as CDMA, WCDMA, EDGE and WLAN mobile devices.
    Type: Grant
    Filed: April 14, 2005
    Date of Patent: July 24, 2007
    Assignee: Anadigics, Inc
    Inventors: Sheldon Xu, Thomas William Arell, Mahendra Singh, Mohammed Ali Khatibzadeh
  • Patent number: 7242252
    Abstract: A biased transistor circuit utilizes a transistor that exhibits a change in threshold voltage as the drain-to-source voltage changes due to power supply voltage changes. A bias circuit senses the power supply voltage changes and modifies a gate bias voltage on the transistor to maintain a substantially constant drain bias current in the transistor.
    Type: Grant
    Filed: March 29, 2005
    Date of Patent: July 10, 2007
    Assignee: Intel Corporation
    Inventor: Stewart S. Taylor
  • Publication number: 20070152754
    Abstract: A method of fabricating a phase change RAM (PRAM) having a fullerene layer is provided. The method of fabricating the PRAM may include forming a bottom electrode, forming an interlayer dielectric film covering the bottom electrode, and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film, forming a bottom electrode contact plug by filling the bottom electrode contact hole with a plug material, forming a fullerene layer on a region including at least an upper surface of the bottom electrode contact plug and sequentially stacking a phase change layer and an upper electrode on the fullerene layer. The method may further include forming a switching device on a substrate and a bottom electrode connected to the switching device, forming an interlayer dielectric film covering the bottom electrode and forming a bottom electrode contact hole exposing a portion of the bottom electrode in the interlayer dielectric film.
    Type: Application
    Filed: November 28, 2006
    Publication date: July 5, 2007
    Inventors: Yoon-ho Khang, Sang-Mock Lee, Jin-seo Noh, Woong-Chul Shin
  • Patent number: 7236054
    Abstract: A multi-operational amplifier system comprises a plurality of operational amplifiers and a controller to configure the plurality of operational amplifiers. The operational amplifiers may be selectively configured to operate individually or in combination with other of the operational amplifiers. The operational amplifiers may have different common node inputs. In one aspect, the different inputs may be selected from groups of PMOS, N-type NMOS and NZ NMOS inputs. The operational amplifiers may include the different inputs that are arranged as differential pairs.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: June 26, 2007
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Hieu Van Tran, Anh Ly, Sang Thanh Nguyen, Vishal Sarin
  • Patent number: 7233208
    Abstract: An electronic circuit contains a controller integrated circuit and a power amplifier MMIC connected to the controller IC. The power amplifier MMIC contains a radio frequency power amplifier. The RF power amplifier is a double heterojunction bipolar transistor. The controller IC has an operational amplifier that supplies a DC bias to the base of the RF power amplifier through a ballast resistor. The operational amplifier has an output slope that compensates either partially or entirely for the voltage drop across the ballast resistor. A reference circuit in the power amplifier is disposed close enough to the power amplifier to mirror fluctuations in the base-emitter voltage caused by temperature fluctuations.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: June 19, 2007
    Assignee: Amptech Incorporated
    Inventor: Matthew Russell Greene
  • Patent number: 7230494
    Abstract: A method of amplifying an input signal comprises providing a semiconductor die, forming an LNA input stage having a transconductance, on the semiconductor die, and desensitizing the LNA input stage transconductance to variations in process and environmental conditions.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: June 12, 2007
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse, King Chun Tsai, George Chien
  • Patent number: 7230491
    Abstract: A bias circuit for biasing a linear input stage of an amplifier comprises a first MOS device having a size. A second MOS device has a size and is arranged with the first MOS device in a cascode configuration. The second MOS device is operated in a saturation region. A third MOS device has a size and biases the first MOS device in a triode region. A bias switch ratio of the size of the first MOS device to the size of the third MOS device is greater than one.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: June 12, 2007
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, Lawrence Tse, King Chun Tsai, George Chien
  • Patent number: 7227415
    Abstract: Providing a high frequency power amplifier circuit and a radio communication system which can control output power by a power voltage, produce sufficient output power in high regions of demanded output power and improve power efficiency in low regions of demanded output power. In a high frequency power amplifier circuit (RF power module) which comprises two or more cascaded FETs for amplification and controls output power by controlling power voltages of the FETs for amplification to gate terminals of which bias voltages of a predetermined level are applied, different transistors for power voltage control are provided for a last-stage FET for amplification and preceding-stage FETs for amplification. The transistors for power voltage control generate and apply the power voltage so that the preceding-stage FETs for amplification saturate when a demanded output level is relatively low.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: June 5, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kenji Tahara, Takayuki Tsutsui, Tetsuaki Adachi
  • Patent number: 7224228
    Abstract: In a radio communication system, an electronic component for high frequency power amplifier carries out the detection of output level, required for feedback control of the output power of a high frequency power amplification circuit, by current detection. The electronic component has an error amplifier. The error amplifier compares an output level detection signal with an output level instruction signal, and generates a signal for controlling the gain of the high frequency power amplification circuit according to the difference between them. For the error amplifier, a low-pass amplification circuit is used. The amplification circuit is provided with, between its output terminal and its inverting input terminal, a phase compensation circuit. The phase compensation circuit comprises a resistance element, and another resistance element and a capacitive element in series connected in parallel with the resistance element.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: May 29, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Kyoichi Takahashi, Shinji Yamada, Masashi Maruyama
  • Patent number: 7224230
    Abstract: An amplifier bias system. The amplifier bias system includes a battery voltage supply coupled with an amplifier transistor to be biased; an output node coupled with a gate of the amplifier transistor; and a current source coupled with the battery voltage supply, wherein the current source provides a current to a node in response to the battery voltage supply. The amplifier bias system further includes a first transistor coupled between the battery voltage supply and the output node, the first transistor having a gate coupled with the first node; a second transistor coupled with the first node, the second transistor having a gate coupled with the output node; and a current load coupled with the output node.
    Type: Grant
    Filed: February 22, 2005
    Date of Patent: May 29, 2007
    Assignee: TriQuint Semiconductor, Inc.
    Inventors: Thomas R. Apel, Rebouh Benelbar
  • Patent number: 7221217
    Abstract: A differential RF non-linear power amplifier employing low-voltage transistors in a cascode configuration uses self-biasing solutions rather than external biasing techniques to overcome transistor breakdown problems. The self-biasing solution ensures that the cascode devices and driver device operate below breakdown voltage limitations. A low resistance circuit is placed in parallel with the self-biased circuitry to mitigate increased on-resistance created by the self-biasing solution. PMOS and NMOS inverter legs provide digital programming of the conduction angle for the power amplifier. Changing the PMOS and NMOS strengths in the chain of inverter legs changes the conduction angle.
    Type: Grant
    Filed: June 19, 2003
    Date of Patent: May 22, 2007
    Assignee: University of Washington
    Inventors: Kiyong Choi, David J. Allstot
  • Patent number: 7215203
    Abstract: A multistage high frequency power amplifier-circuit device has a plurality of semiconductor amplification elements connected in a cascade. The circuit device is provided with a bias control circuit used to control the bias voltage or bias current of the output semiconductor amplification element in each stage so as to reduce the variation of the output power with respect to the power control signal voltage in an area around the threshold voltage of the semiconductor amplification elements. This realizes a high frequency power amplifier circuit device provided with excellent controllability of the output power and high efficiency at the time of low power output realized with use of such a control voltage as a power control signal.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: May 8, 2007
    Assignees: Renesas Technology Corp., Hitachi Communication Systems, Inc.
    Inventors: Yoshikuni Matsunaga, Toshihiko Shimizu, Tomio Furuya, Nobuhiro Matsudaira, Koichi Matsushita
  • Patent number: 7205842
    Abstract: The present invention comprises a method and apparatus for continuously, controlling a gain of an amplifier circuit while switching between open-loop and closed-loop power control. A control circuit controls the gain of the amplifier circuit during open-loop and closed-loop power control modes based on selected references. Before the switch from open-loop to closed-loop power control, the control circuit determines a closed-loop reference based on a power measured at the amplifier circuit output before the switch. After the switch, the control circuit controls the gain of the amplifier circuit based on the determined closed-loop reference. Before switching from closed-loop to open-loop power control, the control circuit generates a difference between a current open-loop reference and a previous open-loop reference.
    Type: Grant
    Filed: July 8, 2005
    Date of Patent: April 17, 2007
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventors: Björn Gustavsson, Martin Akerberg
  • Patent number: 7202735
    Abstract: A multi-band power amplifier module includes a first power amplifier that amplifies a first input radio frequency signal in a first frequency band in response to a first bias control signal. A second power amplifier amplifies a second input radio frequency signal in a second frequency band in response to a second bias control signal. A first bias control circuit produces the first bias control signal and a second bias control circuit produces the second bias control signal in response to step gain signals received at a step gain terminal. The module has first and second rows of pins oppositely positioned on the module and coupled to the first and second power amplifiers and first and second bias circuits.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: April 10, 2007
    Assignee: Micro-Mobio
    Inventors: Ikuroh Ichitsubo, Kanya Kubota
  • Patent number: 7200369
    Abstract: A linear amplification with nonlinear components (LINC) power transmitter is provided. The LINC power transmitter includes a digital signal processing unit which controls the LINC power transmitter; a frequency modulation unit which modulates or converts a digital signal output from the digital signal processing unit into a radio-frequency (RF) signal; a signal amplification unit which amplifies the RF signal output from the frequency modulation unit using a gain amplifier and a power amplification module; and a direct current/direct current (DC/DC) conversion unit which controls bias of the power amplification module. Here, the DC/DC conversion unit controls a base bias and/or a collect bias of the power amplification module, and the power amplification module operates in saturation.
    Type: Grant
    Filed: January 30, 2004
    Date of Patent: April 3, 2007
    Assignee: Postech Foundation
    Inventors: Bumman Kim, Youngoo Yang, Young Yun Woo, Jae Hyok Yi, Seung Woo Kim
  • Patent number: 7196582
    Abstract: Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: March 27, 2007
    Assignee: Broadcom Corporation
    Inventors: Hooman Darabi, Janice Chiu
  • Patent number: 7196583
    Abstract: To effect power control of a power amplifier 2 having three amplifier stages 3, 4 and 5 used to amplify input signals modulated in accordance with a variable envelope modulation scheme, there is used a power amplifier 2 having a gain which reduces as the supply voltage to the power amplifier 2 reduces, and the output power POUT of the power amplifier 2 is controlled by regulation of the supply voltage VS. Taking advantage of the reduction in gain of the power amplifier 2, it is ensured that, in respect of each respective amplifier stage 3, 4 and 5 and at each respective value of the supply voltage in the voltage control range, the output power POUT of the respective amplifier stage 3, 4 and 5 is less than the saturation output power PSAT of the respective amplifier stage 3, 4 and 5. As a result, distortion of the signal is reduced. The power control technique improves efficiency over known techniques of backing off the output power and using a variable gain amplifier stage to control the output power.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: March 27, 2007
    Assignee: Sony United Kingdom Limited
    Inventors: John Christopher Clifton, Simon Denny, Anthony Eaton
  • Patent number: 7193470
    Abstract: A power amplification controlling apparatus and method in a mobile communication system are provided. An amplifying part amplifies an input Radio Frequency (RF) signal with a power supply voltage. A bias adaptation part detects at least one of environmental changes of the amplifying part, attenuates the RF signal according to the detected environmental change, detecting the envelope of the attenuated signal, and generates a supply voltage control signal according to the envelope. A power supply part changes the power supply voltage in response to the supply voltage control signal.
    Type: Grant
    Filed: March 4, 2004
    Date of Patent: March 20, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Geun Lee, Hyun-Su Yoon
  • Patent number: 7193460
    Abstract: According to one exemplary embodiment, a circuit arrangement includes a power amplifier configured to receive an RF input signal. The circuit arrangement further includes a control circuit configured to receive and convert the RF input signal to an output DC voltage. The control circuit includes a voltage amplifier coupled to a peak detector circuit, where the peak detector circuit outputs the output DC voltage. The circuit arrangement further includes an analog control bias circuit coupling the output DC voltage to a bias input of the power amplifier. The output DC voltage causes the power amplifier to have a quiescent current that increases in a way that is substantially logarithmic with respect to the amplitude of the RF input signal. An increase in the RF input power can cause a substantially linear increase in the output DC voltage, where the RF input power is measured in dBm.
    Type: Grant
    Filed: March 27, 2006
    Date of Patent: March 20, 2007
    Assignee: Skyworks Solutions, Inc.
    Inventors: Amish Naik, Andre Metzger, Thomas L. Fowler
  • Patent number: 7193471
    Abstract: There is provided a high frequency power amplifier circuit capable of enhancing detection accuracy of an output level, necessary for feedback control of the high frequency power amplifier circuit, and capable of executing output power control with higher precision, With the high frequency power amplifier circuit, the detection of the output level, necessary for feedback control of the high frequency power amplifier circuit is executed by use of a current detection method, and in an electronic device comprising a differential amplifier for comparing an output power detection signal with an output level designation signal and for generating a signal for controlling a gain of the high frequency power amplifier circuit according to a potential difference between the two signals, a power source voltage with variation less than that for the power source voltage of the high frequency power amplifier circuit is used as the operational power source voltage of the output power detection circuit.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: March 20, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Takayuki Tsutsui, Shinji Yamada, Yasuhiro Nunogawa
  • Patent number: 7193459
    Abstract: A power amplifier configuration including power amplifier circuitry and power control circuitry and having improved Power Added Efficiency (PAE) is provided. The power amplifier circuitry includes one or more input amplifier stages in series with a final amplifier stage. The power control circuitry provides a variable supply voltage to the input amplifier stages based on an adjustable power control signal. The final amplifier stage is powered by a fixed supply voltage. In operation, as output power of the power amplifier is reduced from its highest power level, the variable supply voltage is reduced. Accordingly, RF power of an amplified signal provided to the final amplifier stage from the input amplifier stages decreases, and the final amplifier stage transitions from saturation to linear operation, thereby increasing the gain of the final amplifier stage. Thus, a desired output level can be maintained while operating at lower current levels.
    Type: Grant
    Filed: June 23, 2004
    Date of Patent: March 20, 2007
    Assignee: RF Micro Devices, Inc.
    Inventors: Darrell G. Epperson, Carlos Gamero, Ryan Bosley, Joel R. Gibson, Michael LaBelle, Scott Yoder
  • Patent number: 7190228
    Abstract: A gain control device of a transmitter in a mobile communication terminal is provided. The device includes a temperature sensor for sensing an external temperature, a power amplifying module for amplifying a radio frequency output, a gain control circuit for controlling a voltage gain of the power amplifying module, a fixed gain circuit for providing a fixed voltage gain to the power amplifying module, a switch for switching to connect the power amplifying module to one of the gain control circuit and the fixed gain circuit, and a controller for generating a control signal to control the switch depending on the sensed external temperature.
    Type: Grant
    Filed: May 4, 2005
    Date of Patent: March 13, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jae-Seung Ko
  • Patent number: 7190221
    Abstract: A circuit and method for applying a dynamically varying collector voltage to a power amplifier is presented. A desired output power is determined, and an input and output power of a power amplifier are measured. A processor determines, for the measured input power and the desired output power, a collector voltage. The processor controls the input power to the power amplifier using the desired output power, the measured output power, and the measured input power. The collector voltage is changeable even though the desired output RF power does not change, so the collector voltage is not fixed for a particular output RF power. Preferably, an algorithm in memory stores, for each desired output value, collector voltages for various conditions of input RF power. Collector current is maximally reduced where the collector voltages stored in memory are the lowest voltages that will meet power linearity requirements, such as may be imposed by CDMA.
    Type: Grant
    Filed: October 22, 2004
    Date of Patent: March 13, 2007
    Assignee: Nokia Corporation
    Inventor: Ronald W. Henze
  • Patent number: 7190935
    Abstract: The present invention provides an efficient way to detect the transmit power provided by an amplifier. A power sense signal indicative of the transmit power of the amplifier is generated and fed back to a control system, which will react accordingly to control input signal levels, bias, gain, or a combination thereof for the amplifier in traditional fashion to control transmit power. Detection circuitry representing a scaled version of the amplifier receives the radio frequency (RF) drive in parallel with the amplifier to provide a scaled output signal. The scaled output signal is rectified and filtered to generate the power sense signal.
    Type: Grant
    Filed: September 14, 2001
    Date of Patent: March 13, 2007
    Assignee: RF Micro Devices, Inc.
    Inventor: James Burr Hecht
  • Patent number: 7187238
    Abstract: An amplifier circuit includes a first multiple gate field-effect transistor having a source terminal, a drain terminal, at least one signal gate terminal for receiving an input signal and at least one control gate terminal for receiving a control signal, and a second multiple gate field-effect transistor having a source terminal, a drain terminal, at least one signal gate terminal connected to the signal gate terminal of the first multiple gate field-effect transistor, and a control gate terminal connected to the control gate terminal of the first multiple gate field-effect transistor, the signal gate terminal of the second multiple gate field-effect transistor being connected to that source terminal/drain terminal of the second multiple gate field-effect transistor which is closer to the signal gate terminal of the second multiple gate field-effect transistor.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: March 6, 2007
    Assignee: Infineon Technologies AG
    Inventor: Robert Thalhammer
  • Patent number: 7183841
    Abstract: A power amplifier arrangement is disclosed which has two or more amplifiers connected in parallel. The amplifiers can be switched on and off independently of one another by means of control devices. At least one DC/DC converter is provided for supplying voltage to the amplifiers. A significant improvement in the efficiency of a power amplifier is achieved by the combination of the voltage supplied by means of a DC/DC converter for the amplifiers with distributed power gain. The arrangement is therefore particularly suitable for use in mobile radio transmission arrangements.
    Type: Grant
    Filed: January 4, 2005
    Date of Patent: February 27, 2007
    Assignee: Infineon Technologies AG
    Inventor: Josef Fenk
  • Patent number: 7184799
    Abstract: A dummy circuit is provided to which a bias circuit of a low noise amplifier (LNA) can be coupled to during power down of the LNA. The dummy circuit maintains the bias circuit at an approximately normal operating state to reduce wake up time of the LNA.
    Type: Grant
    Filed: January 6, 2004
    Date of Patent: February 27, 2007
    Assignee: Marvell International Ltd.
    Inventors: Xiaodong Jin, King Chun Tsai, Yonghua Song
  • Patent number: 7183856
    Abstract: A power source circuit for a high frequency power amplifying circuit, that can be used for a portable telephone of the GSM or WCDMA and a portable telephone capable of performing communications in two or more communication systems such as the GSM and CDMA. The power source circuit is constructed by a first direct current power source circuit such as a series regulator whose power efficiency is not high but which reaches a high level quickly, and a second direct current power source circuit such as a switching regulator, which does not reach the high level quickly but whose power efficiency is high. When the power source voltage has to reach the high level at high speed, both of the series regulator and the switching regulator are simultaneously operated. When the output power source voltage reaches a predetermined level, the operation of the series regulator is stopped.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: February 27, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Osamu Miki, Yasuhiro Nunogawa, Shuji Tomono, Fumito Moriyama
  • Patent number: 7180367
    Abstract: Systems, devices, and methods are provided for actively biasing a multi-stage amplifier. A method for differentially actively biasing a multi-stage amplifier comprises the steps of: actively biasing, with a single active bias circuit, an amplifier comprising a plurality of amplification stages; and differentially applying the bias provided by the single active bias circuit by biasing at least one amplification stage at a different bias level than another of the plurality of amplification stages. An active bias circuit for a multi-stage amplifier comprises: a single active bias circuit that is configured to actively bias a plurality of amplification stages via at least two gates; and a differential device configured to cause the active biasing provided to one gate to be different from the bias provided to another gate.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: February 20, 2007
    Assignee: U.S. Monolithics, L.L.C.
    Inventors: Charles Woods, Gauray Menon
  • Patent number: 7173491
    Abstract: A method and apparatus is provided for dynamically changing the biasing conditions of a voltage regulator to overcome the problems caused by various conditions. The invention includes a detector and a bias control circuit for applying bias current to the voltage regulator to compensate for a detected condition.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: February 6, 2007
    Assignee: Silicon Laboratories Inc.
    Inventors: Ryan M. Bocock, Timothy J. Dupuis
  • Patent number: 7173492
    Abstract: The present invention provides a high frequency amplifier suitable for use in a wireless communication system which performs detection of an output level necessary for feedback control by a current detection system, wherein control sensitivity in an area low in transmit request level is lowered so that an output level can be controlled over the whole control range with satisfactory accuracy. There is provided a high frequency power amplification electric part constituting a wireless communication system, which performs detection of an output level necessary for feedback control of output power by a current detection system, compares the output level detected signal and an output level designation signal and generates a bias voltage for a high frequency power amplifier according to the difference therebetween to thereby control gain, wherein an nth root converter or a logarithm converter is provided between a current detector and a current-voltage converter.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: February 6, 2007
    Assignees: Renesas Technology Corp., Hitachi ULSI Systems. Co., Ltd., Hitachi Hybrid Network Co., Ltd.
    Inventors: Kyoichi Takahashi, Nobuhiro Matsudaira, Hitoshi Akamine
  • Patent number: 7167045
    Abstract: A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: January 23, 2007
    Assignee: Marvell International Ltd.
    Inventors: Sang Won Son, King Chun Tsai, Yuan-Ju Chao, Lawrence Tse
  • Patent number: 7164319
    Abstract: A power amplifier comprises an input terminal, an output terminal and a first amplification stage coupled with the input and output terminals. The first amplification stage having a node and a resistive structure coupled with the node. The resistive structure includes a first resistive circuit coupled with the node; and an adaptation circuit coupled with the first resistive circuit such that when the first amplification stage is in a first mode, the resistive structure provides a first effective resistance and when the first amplification stage is in a second mode, the resistive structure provides a second effective resistance.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: January 16, 2007
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Darren W. Ferwalt
  • Patent number: 7157974
    Abstract: The invention provides a method for reducing power dissipation in a power amplifier used in wireless communication systems, said power amplifier having transistors showing a quiescent current, wherein the quiescent current of the power amplifier is adaptively changed according to the average output power of the power amplifier. A power amplifier for use in wireless communication systems is provided, said power amplifier having transistors showing a quiescent current, comprises adaptive biasing means changing the quiescent current of the power amplifier in accordance with the average output power of the power amplifier for reducing power dissipation in the power amplifier. A UMTS hand set comprises a power amplifier as specified above.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: January 2, 2007
    Assignee: NXP B.V.
    Inventors: Giuseppe Grillo, Domenico Cristaudo
  • Patent number: 7152800
    Abstract: A biasing scheme is disclosed that helps reduce current noise in an associated device, such as, for example, a magneto-resistive device. The biasing scheme provides for setting a resistance path in a preamplifier, which is operative to energize the associated device, based on a biasing current that is to be used with associated device. Alternatively or additionally, the resistance path can be set based on a resistance of the associated device. As a result of setting the resistance path in this manner, noise through the associated device can be mitigated during its energization.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: December 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Indumini Ranmuthu, Yukihisa Hirotsugu, Mark Wolfe
  • Patent number: 7154337
    Abstract: According to one embodiment of the present invention, an amplifier includes an amplifying transistor coupled to a ground and operable to amplify a received signal. One or more bias components provide a bias resistance for the amplifying transistor. The one or more bias components include a control modulator coupled in series between the amplifying transistor and the ground. The control modulator receives a control signal and modulates the amplifying transistor in response to the control signal.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: December 26, 2006
    Assignee: Raytheon Company
    Inventor: Scott M. Heston
  • Patent number: 7154338
    Abstract: A method (400) for controlling power and an amplifier and associated power control circuit (100) with a power amplifier (110) coupled through a current sensing resistor (Rsen) to a supply voltage line (vcc). There is also a current to voltage converter (120) having a converter output (135) and at least one converter input, the converter input being coupled to the supply voltage line (Vcc) of the power amplifier (110). A voltage reference providing circuitry (140) is coupled to a second input (152) of an integrator (150) that also has an integrator output (153) and a first input (151) coupled to the converter output (135) and a direct current biasing circuit (195) couples the integrator output ((153) to an amplifier input (111) of amplifier (110). The method (400) and circuit (100) use a time dependent pre-defined voltage characteristic supplied to the integrator (150).
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: December 26, 2006
    Assignee: Motorola, Inc.
    Inventors: V. C. Prakash V K Chacko, Narendra Kumar Aridas, Kiat Hoe Wong
  • Patent number: 7154336
    Abstract: The present invention provides a compact and low-cost high-frequency power amplifier including GaAs heterojunction bipolar transistors (HBTs) but having a low level of noise in the transmission band. In the high-frequency power amplifier of the present invention, a chip capacitor 21 is connected at one end to an upstream stage bias circuit 107 via a bonding wire B1, and grounded at the other end. Also, a chip inductor 22 is connected to a base electrode of a high-frequency signal amplification HBT 101 via a bonding wire B2. In the high-frequency power amplifier of the present invention, the chip capacitor 21 causes noise generated within the upstream stage bias circuit 107 to flow to the ground, thereby reducing noise in the reception band. Also, the chip inductor 22 reduces a power loss of a high-frequency signal which is caused because the high-frequency signal flows to the ground.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: December 26, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Masahiro Maeda
  • Patent number: 7148748
    Abstract: A peak detector detects an amplifier output overvoltage condition if the amplifier drives a mismatched load impedance. In response to the detected overvoltage condition, a clamping transistor lowers a reference DC bias voltage supplied by a bias circuit to the amplifier. The lowered reference DC bias voltage lowers amplifier gain and output power, thus protecting the amplifier.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: December 12, 2006
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Thomas R. Apel
  • Patent number: 7145396
    Abstract: A method and apparatus are provided for use with a power amplifier for protecting active devices on the power amplifier. A peak detector is used by control circuitry to detect the presence of a peak voltage that exceeds a threshold voltage. In response to the detection of a peak voltage, the gain of the power amplifier is reduced.
    Type: Grant
    Filed: September 29, 2003
    Date of Patent: December 5, 2006
    Assignee: Silicon Laboratories, Inc.
    Inventor: Timothy J. Dupuis
  • Patent number: 7142053
    Abstract: A power control circuit for a power amplifier comprises a voltage regulator having a first input configured to receive a envelope control signal, a second input configured to receive a feedback signal, and a third input configured to receive a voltage clamp signal; and a clamp voltage reference circuit configured to generate the voltage clamp signal.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: November 28, 2006
    Assignee: Skyworks Solutions, Inc.
    Inventors: Kerry B. Phillips, David S. Ripley, Robert M. Fisher
  • Patent number: 7138863
    Abstract: The present invention presents an improved power control scheme for RF power amplifiers. The gain control signal used to control the power amplifier is subjected to pre-distortion (Hpre) before being supplied to the power amplifier, in order to reduce variations in control loop gain.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: November 21, 2006
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Jonas Persson
  • Patent number: 7139538
    Abstract: A high-frequency power module as a component of a radio communication system capable of performing communications in two frequency bands such as GSM and DCS and has a first transistor for output detection for receiving a signal which is the same as an input signal of a first power amplification transistor for amplifying a high frequency signal on the GSM side and a first current mirror circuit for passing current proportional to current of the transistor. A second transistor for output detection for receiving an input signal of a second power amplification transistor for amplifying a high frequency signal on the DCS side is also provided as is a second current mirror circuit for passing current proportional to current of the transistor. Conversion of current transferred from the first and second current mirror circuits to voltage is shared by the GSM and DCS.
    Type: Grant
    Filed: September 5, 2002
    Date of Patent: November 21, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Seikou Ono, Hitoshi Akamine, Tetsuaki Adachi