Including Particular Biasing Arrangement Patents (Class 330/296)
  • Patent number: 11323077
    Abstract: Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: May 3, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventors: Wendy Ng, Wei Long, Kevin Cho
  • Patent number: 11316481
    Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 26, 2022
    Assignee: NXP USA, Inc.
    Inventors: Hussain H. Ladhani, Gerard J. Bouisse, Jeffrey K. Jones
  • Patent number: 11309841
    Abstract: An amplifier includes at least one amplification circuit through one of which a bias current flows, a first memory that stores control information to specify the bias current to be fed through the one of the at least one amplification circuit, a digital control circuit that generates a bias current setting to set the bias current in accordance with the control information, a second memory that stores correction information to correct the bias current setting, a correction circuit that corrects the bias current setting in accordance with the correction information, and a bias circuit that determines the bias current in the one of the at least one amplification circuit in accordance with the bias current setting, which has been corrected.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: April 19, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Nobuyasu Beppu
  • Patent number: 11281245
    Abstract: A radio frequency (“RF”) power device includes a RF power transistor, and a bias circuit coupled between a reference voltage input and an input terminal of the RF power transistor. The bias circuit includes an impedance control circuit that is configured to vary an impedance of the bias circuit at the input terminal of the RF power transistor responsive to a RF input signal provided to the input terminal, and/or a current control circuit that is configured to control a bias current provided to the input terminal of the RF power transistor responsive to variations in operating characteristics of the RF power transistor. Related RF power amplifiers and device packages are also discussed.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 22, 2022
    Assignee: WOLFSPEED, INC.
    Inventors: Christophe Joly, Sonoko Aristud
  • Patent number: 11271531
    Abstract: A power amplifier module includes a power amplifier including an amplifying unit including an amplifying transistor configured to amplify an input signal and output an output signal, and a bias unit including a bias transistor configured to provide a bias current to the amplifying transistor, and a sub bias transistor configured to provide a sub bias current to the amplifying transistor; and a control unit configured to provide a control current to the bias transistor and the sub bias transistor. The control unit is further configured to vary the control current according to the sub bias current, and a level of the sub bias current is lower than a level of the bias current.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: March 8, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Su Yeon Han
  • Patent number: 11264952
    Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 1, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
  • Patent number: 11245373
    Abstract: An amplifier includes a first circuitry, a second circuitry, and a plurality of amplifier circuitries. The first circuitry controls an enable signal. The second circuitry controls a bias signal. Circuitries which output signals are decided from among the plurality of circuitries based on the enable signal, and each of the circuitries which output the signals amplifies an input signal with a gain corresponding to the bias signal.
    Type: Grant
    Filed: March 6, 2020
    Date of Patent: February 8, 2022
    Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION
    Inventor: Tong Wang
  • Patent number: 11190153
    Abstract: A packaged RF power amplifier (RFPA) configured to increase video bandwidth is disclosed as well is a process for implementing a RF power device to increase video bandwidth. The RF power device including at least one transistor; an output matching circuit coupled to an output lead and to the at least one transistor; at least one bias feed circuit coupled to the at least one transistor; and at least one coaxial resonator coupled between the at least one transistor and the at least one bias feed circuit.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: November 30, 2021
    Assignee: WOLF SPEED, INC.
    Inventor: David Michael Rice
  • Patent number: 11189244
    Abstract: An output amplifier includes an input unit including first and second input transistors, and a first bias transistor between a connection node of a source of the first input transistor and a source of the second input transistor and a first voltage source, a first current mirror including first and second transistors connected in series at a first connection node and between a second voltage source and a second connection node, and third and fourth transistors connected in series at a third connection node and between the second voltage source and a fourth connection node, and a second current mirror including fifth and sixth transistors between a fifth connection node and the first voltage source and connected in series at a sixth connection node, and seventh and eighth transistors between a seventh connection node and the first voltage source.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: November 30, 2021
    Assignee: DB HiTek Co., Ltd.
    Inventors: Mun Gyu Kim, Kyoung Tae Kim, Jae Hong Ko
  • Patent number: 11183978
    Abstract: An amplifier, e.g., a low-noise amplifier, includes a field-effect transistor having a one-dimensional channel. This channel includes a semiconductor material for conducting electrons along a main direction of the channel. This direction is perpendicular to a cross-section of the channel. Dimensions of this cross-section are, together with the semiconductor material, such that the channel exhibits quantized conduction of electrons along its main direction. The amplifier further includes an electrical circuit that is configured to operate the transistor at a value of gate-to-source voltage bias corresponding to a peak value of a peak of a transconductance of the channel with respect to gate-to-source voltage bias values.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: November 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Cezar Bogdan Zota, Lukas Czornomaz
  • Patent number: 11177781
    Abstract: Disclosed in the present invention are a radio frequency power amplifier based on current detection feedback and a chip. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one current detection feedback circuit; the input end of the current detection feedback circuit is connected to the input end of a current stage of amplifier circuit among the multiple stages of amplifier circuits by means of a corresponding resistor, and the output end of the current detection feedback circuit is connected to the input end of at least one stage of amplifier circuit prior to the current stage of amplifier circuit. The current detection feedback circuit generates, according to the detected quiescent operating current of the current stage of amplifier circuit, a control voltage varying inversely with the quiescent operating current, so that the current detection feedback circuit outputs current varying positively with the control voltage.
    Type: Grant
    Filed: June 30, 2018
    Date of Patent: November 16, 2021
    Assignee: VANCHIP (TIANJIN) TECHNOLOGY CO., LTD.
    Inventors: Jinxin Zhao, Yunfang Bai
  • Patent number: 11177849
    Abstract: An apparatus is disclosed for transceiving signals in multiple modes. In example implementations, an apparatus includes a transceiver that includes a first amplifier; a mixer having at least one input node and at least one output node, with the at least one input node coupled to the first amplifier; and a second amplifier coupled to the at least one output node of the mixer. The transceiver also includes a first register coupled to the first amplifier and a second register coupled to the second amplifier. The transceiver further includes at least one memory realizing a lookup table. The at least one memory is coupled to the first register and the second register. The lookup table includes a first portion corresponding to a first mode of the transceiver and a second portion corresponding to a second mode of the transceiver.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: November 16, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Chuan Wang, Li Liu, Kevin Hsi-Huai Wang, Bhushan Shanti Asuri, Kang Yang, Shrenik Patel
  • Patent number: 11177801
    Abstract: A radio frequency switching device includes: a first series switching circuit connected between a first terminal and a second terminal; a first shunt switching circuit connected between one end of the first series switching circuit and a ground; a voltage generation circuit configured to generate a first gate voltage to be output to the first series switching circuit, to generate a second gate voltage to be output to the first shunt switching circuit, and to generate a bias voltage higher than the second gate voltage to control the first shunt switching circuit to enter an off state; a first resistance circuit connected between a signal line between the first terminal and the second terminal, and a bias voltage terminal of the voltage generation circuit; and a second resistance circuit connected between the bias voltage terminal of the voltage generation circuit and a ground terminal of the first shunt switching circuit.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: November 16, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Byeong Hak Jo, Hyun Paek, Jeong Hoon Kim
  • Patent number: 11146218
    Abstract: An amplification circuit includes an input terminal, an output terminal, a capacitor, a bias unit, an amplification unit, and an impedance unit. The input terminal receives a radio frequency signal. The capacitor is coupled to the input terminal and the bias unit. The bias unit includes a transistor for controlling the bias current. The transistor has a first terminal for receiving a system voltage, and a control terminal coupled to the reference voltage terminal. The amplification unit has an input terminal coupled to the capacitor and the bias unit, and an output terminal coupled to the output terminal of the amplification circuit. The impedance unit has a first terminal coupled to the bias unit, and a second terminal coupled to the input terminal of the amplification circuit and the capacitor. The impedance unit adjusts the amplifying linearity of the amplification circuit according to a selection signal.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: October 12, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Chang-Yi Chen
  • Patent number: 11139786
    Abstract: An amplifying device includes a current generating circuit, a bias amplifying circuit, and a compensation circuit. The current generating circuit is configured to generate an internal current based on an internal voltage. The bias amplifying circuit, connected to the current generating circuit, is configured to output a bias current generated by amplifying the internal current to a power amplifying circuit. The compensation circuit, connected to the current generating circuit, is configured to adjust the internal voltage based on a bias voltage of the power amplifying circuit.
    Type: Grant
    Filed: December 24, 2019
    Date of Patent: October 5, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Je Hee Cho, Kyu Jin Choi
  • Patent number: 11128264
    Abstract: A bias compensation circuit, coupled to an amplifying transistor, is disclosed. The bias compensation circuit comprises a voltage locking circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to a third terminal the amplifying transistor, and the second terminal is coupled to a control terminal of the amplifying transistor; and a first resistor, coupled to the first terminal of the voltage locking circuit; wherein when the voltage locking circuit is conducted, a voltage difference between the first terminal and the second terminal is substantially constant.
    Type: Grant
    Filed: April 19, 2020
    Date of Patent: September 21, 2021
    Assignee: WIN Semiconductors Corp.
    Inventors: Po-Kie Tseng, Chih-Wen Huang, Jui-Chieh Chiu, Shao-Cheng Hsiao
  • Patent number: 11114982
    Abstract: A power amplifier circuit includes an amplifier transistor having a first terminal supplied with a power supply voltage that changes in accordance with an amplitude level of an input signal, and a second terminal supplied with the input signal and a bias current, an amplified signal obtained by amplifying the input signal being outputted from the first terminal, a bias circuit that outputs the bias current from an output terminal thereof in accordance with a reference current supplied to an input terminal thereof, and a regulation circuit that generates a regulation current for regulating the bias current in accordance with a change in the power supply voltage. The regulation current increases with an increase in the power supply voltage, and decreases with a decrease in the power supply voltage. The regulation circuit extracts the regulation current from at least one of the reference current or the bias current.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: September 7, 2021
    Assignee: MURATA MANUFACTURING CO. , LTD.
    Inventors: Satoshi Tanaka, Kazuo Watanabe, Satoshi Arayashiki
  • Patent number: 11043923
    Abstract: A bias circuit includes a bias current circuit and a temperature compensation circuit. The bias current circuit includes a first resistor and a first transistor, in a first current path connected between a current terminal of a reference current and a ground, and connected to each other in series, and a second transistor in a second current path connected between the current terminal and the ground, and having a base connected to a collector of the first transistor. The temperature compensation circuit includes a second resistor in the second current path, and connected between an emitter of the second transistor and a base of the first transistor and having a first thermal coefficient, and a third resistor included in the second current path, and connected between the base of the first transistor and the ground and having a second thermal coefficient, different from the first thermal coefficient.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: June 22, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Geun Yong Lee, Seong Geun Kim, Hyeon Seok Hwang, Seung Chui Pyo
  • Patent number: 11025256
    Abstract: A filter includes a filter circuit, a first processing circuit, and a second processing circuit. The filter circuit receives an input signal from an input node of the filter, and converts the input signal into a voltage output. The first processing circuit provides a first control voltage to an output node of the filter according to the voltage output, wherein the first control voltage is derived from an alternating current (AC) component of the voltage output. The second processing circuit provides a second control voltage to the output node of the filter according to the voltage output, wherein the second control voltage is derived from applying DC level shift to a direct current (DC) component of the voltage output.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: June 1, 2021
    Assignee: MediaTek Inc.
    Inventors: Yi-Chieh Huang, Sung-Lin Tsai
  • Patent number: 11005423
    Abstract: A bias circuit includes a first branch circuit, a second branch circuit, a current amplifier and a switch, wherein the first branch circuit is configured to shunt an inputted first current, and input a first branch current of the first current to a power supply ground; the second branch circuit is configured to shunt the inputted first current, and input a second branch current of the first current to the current amplifier; the current amplifier is configured to receive the second branch current of the first current and amplify the second branch current of the first current to serve as a bias current of a power amplifier connected to the bias circuit for outputting; and the switch is configured to switch different resistance values for a resistor in the first branch circuit and/or switch different resistance values for a resistor in the second branch circuit.
    Type: Grant
    Filed: October 28, 2019
    Date of Patent: May 11, 2021
    Assignee: SMARTER MICROELECTRONICS (SHANGHAI) CO., LTD.
    Inventors: Yongle Li, Qiang Su, Baiming Xu
  • Patent number: 10998871
    Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal, a second transistor that amplifies a signal corresponding to the second signal and outputs a third signal, a third transistor that supplies a first bias current or voltage to a base of the first transistor, and a fourth transistor that supplies a second bias current or voltage to a base of the second transistor. A ratio of an emitter area of the third transistor to an emitter area of the first transistor is larger than a ratio of an emitter area of the fourth transistor to an emitter area of the second transistor.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: May 4, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Takashi Soga
  • Patent number: 10979004
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: April 13, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Satoshi Tanaka
  • Patent number: 10965264
    Abstract: A bias circuit generates a bias current to an RF power amplifier used for transmitting RF signals, and the amount of the bias current supplied to the RF power amplifier can be configured in multiple modes through transistor switches that are controlled by mode control signals, so that the bias current supplied to the RF power amplifier can be adjusted according to the required power level of the transmitting RF signals. In addition, the bias current can be turned off by another transistor switch that is controlled by a power control signal for saving power while the RF power amplifier is not transmitting RF signals.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: March 30, 2021
    Assignee: Rafael Microelectronics, Inc.
    Inventors: Chih-Wen Wu, Po Chang Lin, Chun Hua Tseng
  • Patent number: 10955489
    Abstract: Power conversion systems, disclosed examples include power conversion systems, ground fault detection apparatus and methods to detect and identify ground faults in a power conversion system using AC coupling to sense a system voltage to determine a leakage flux linkage, and to identify a faulted converter phase based on a phase shift angle of the leakage flux linkage.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: March 23, 2021
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Rangarajan M. Tallam, Jiangang Hu, Brian P. Brown
  • Patent number: 10951177
    Abstract: A radio frequency (RF) power limiter includes an input direct current (DC) block, an output DC block, a limiter diode, a RF choke, and a test diode. A first terminal of the limiter diode is coupled to a node between the input DC block and the output DC block, and a second terminal of the limiter diode is coupled to an electrical ground. A first terminal of the RF choke is coupled to the node between the input DC block and the output DC block so that the first terminal of the RF choke is coupled to the first terminal of the limiter diode. A first terminal of the test diode is coupled to the second terminal of the RF choke, and a second terminal of the test diode is coupled to the electrical ground.
    Type: Grant
    Filed: June 5, 2019
    Date of Patent: March 16, 2021
    Assignee: Rockwell Collins, Inc.
    Inventor: Byron J. Montgomery
  • Patent number: 10931239
    Abstract: An amplification circuit includes an input terminal for receiving a radio frequency input signal, an output terminal for outputting an amplified radio frequency signal, a bias circuit for providing a bias voltage, an impedance circuit, a transistor, and a filter circuit. The impedance circuit is coupled to the bias circuit and the input terminal, and provides a voltage drop between the first terminal and the second terminal of the impedance circuit. The first transistor has a first terminal coupled to the output terminal, a second terminal coupled to a first reference voltage terminal, and a control terminal coupled to the impedance circuit and for receiving the radio frequency input signal. The filter circuit is coupled to the first transistor and the impedance circuit, filters out a harmonic signal, and provides a feedback signal including a primary frequency signal of the amplified radio frequency signal to the impedance circuit.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 23, 2021
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Chang-Yi Chen
  • Patent number: 10924063
    Abstract: Bias networks for amplifiers are disclosed. An example bias network includes an adaptive bias circuit, configured to generate a bias signal for an amplifier, and further includes a coupling circuit, configured to couple the adaptive bias circuit to the amplifier. The coupling circuit is made adaptive in that its' impedance depends on a power level of an input signal to be amplified by the amplifier. By configuring the coupling circuit to have a variable impedance that depends on the power level of the input signal, the coupling circuit may adapt to the input power level and, thereby, may modify the bias signal to reduce/optimize at least some of the nonlinearity that may be introduced to the bias signal by the adaptive bias circuit.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: February 16, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventor: Mohamed Esmael
  • Patent number: 10924067
    Abstract: A power amplifier circuit includes an amplifier transistor, a bias circuit that supplies a bias current or voltage to the amplifier transistor, and a resistance element connected between a base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied and an emitter connected to the emitter of the first transistor, a signal supply circuit that supplies an input signal to the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: February 16, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Kenji Mukai, Fumio Harima
  • Patent number: 10924072
    Abstract: A power amplification circuit includes an amplification transistor, a variable voltage power supply that supplies a variable voltage to a collector of the amplification transistor, a bias circuit that has a constant current amplification transistor outputting a DC bias current to a base of the amplifier transistor, and a current limiting circuit that limits the DC bias current. The current limiting circuit includes a current limiting transistor, a resistor element connected to a collector of the current limiting transistor and the variable voltage power supply, and a resistor element connected to a base of the current limiting transistor and a base of the constant current amplifying transistor.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: February 16, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kenji Tahara, Kenichi Shimamoto, Shigeru Tsuchida, Mitsunori Samata, Yoshiaki Sukemori
  • Patent number: 10917056
    Abstract: A power amplification system with shared common base biasing is disclosed. A method for power amplification at a controller of a power amplification system comprising a plurality of cascode amplifier sections can include receiving a band select signal indicative of one or more frequency bands of a radio-frequency input signal to be amplified and transmitted. The method may further include biasing a common base stage of each of the plurality of cascode amplifier sections, and biasing a common emitter stage of a subset of the plurality of cascode amplifier sections.
    Type: Grant
    Filed: June 29, 2019
    Date of Patent: February 9, 2021
    Assignee: Skyworks Solutions, Inc.
    Inventors: Philip John Lehtola, David Steven Ripley
  • Patent number: 10911007
    Abstract: High frequency amplifier circuitry includes a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor cascade-connected to the first transistor, to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential node, and non-linear compensation circuitry connected to a connection node of the first transistor and the second transistor, to compensate for non-linearity of the output signal to the high-frequency input signal. The non-linear compensation circuitry has first rectifier circuitry, a first resistor, a second resistor, second rectifier circuitry, first capacitor and second capacitor.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 2, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Toshiki Seshita, Yasuhiko Kuriyama
  • Patent number: 10868503
    Abstract: There is provided a power amplifier and an integrated circuit including the power amplifier. The power amplifier includes a first amplifier configured to amplify a first signal; a phase shifter configured to invert the first signal; and a harmonic sinker connected between an output terminal of the phase shifter and an output terminal of the first amplifier, configured to amplify an output signal of the phase shifter, and configured to have a conduction angle narrower than a conduction angle of the first amplifier.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: December 15, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Kyu Jin Choi
  • Patent number: 10826453
    Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: November 3, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Yoshiki Kogushi, Shota Ishihara, Fuminori Morisawa
  • Patent number: 10778154
    Abstract: A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: September 15, 2020
    Assignee: Intel Corporation
    Inventors: Jong Seok Park, Yanjie J. Wang, Stefano Pellerano, Christopher D. Hull
  • Patent number: 10771022
    Abstract: Embodiments of the present disclosure provide circuitry and a method for a gallium nitride (GaN) device. The circuitry includes a negative bias circuit configured to provide a negative bias voltage for a gate of the GaN device; a drain switch circuit configured to turn on or off a positive voltage for a drain of the GaN device; and a control circuit configured to control the drain switch circuit based on provision of the negative bias voltage, such that the positive voltage for the drain is turned on after a voltage of the gate reaches the negative bias voltage and turned off before the negative bias voltage completely disappears.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: September 8, 2020
    Assignee: Alcatel Lucent
    Inventors: Baoliang Feng, Jingjing Shi, Zaiqing Li
  • Patent number: 10750627
    Abstract: A power module includes a number of sub-modules connected via removable jumpers. The removable jumpers allow the connections between one or more power semiconductor die in the sub-modules to be reconfigured, such that when the removable jumpers are provided, the power module has a first function, and when the removable jumpers are removed, the power module has a second function. The removable jumpers may also allow for independent testing of the sub-modules. The power module may also include a multi-layer printed circuit board (PCB), which is used to connect one or more contacts of the power semiconductor die. The multi-layer PCB reduces stray inductance between the contacts and therefore improves the performance of the power module.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: August 18, 2020
    Assignee: Cree Fayetteville, Inc.
    Inventors: Zachary Cole, Brandon Passmore
  • Patent number: 10727788
    Abstract: Circuits and methods for reducing the cost and/or power consumption of a user terminal and/or the gateway of a telecommunications system (550) that may include a telecommunications satellite. Embodiments generate a dynamic input bias signal based upon an information signal envelope (which may be pre-distorted) which is applied to the signal input of a power amplifier (PA), thus reducing average power consumption. Other embodiments further include dynamic linearization (518) of the information signal, and/or variation of the supply voltage to the power amplifier (PA) as a function of the envelope of the information signal. Another aspect is a multi-stage “chained” feedback regulated voltage supply circuit for providing two or more output voltages that may be used as alternative supply voltages to a power amplifier (PA).
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: July 28, 2020
    Assignee: VIASAT, INC.
    Inventors: Branislav A Petrovic, Kenneth V Buer, Kenneth P Brewer, Steve L Kent, Sateh Jalaleddine
  • Patent number: 10707815
    Abstract: An amplifier device includes an amplifying unit, a bias module, an impedance unit and an adjusting module. The amplifying unit has a first end coupled to a voltage source and used for outputting an output signal amplified by the amplifying unit, a second end used for receiving an input signal, and a third end coupled to a first reference potential terminal. The bias module is coupled to the second end of the amplifying unit, and provides a bias voltage to the amplifying unit and adjusts linearity of the amplifier device according to a source voltage from the voltage source. The impedance unit is coupled to the bias module and used to receive a control voltage to adjust an impedance value of the impedance unit. The adjusting module is used to output the control voltage to the impedance unit according to the source voltage and a reference voltage.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: July 7, 2020
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Hung-Chia Lo, Tien-Yun Peng
  • Patent number: 10680558
    Abstract: A power amplifier circuit includes a first transistor having a base to which a radio frequency (RF) signal is supplied and a collector to which a variable power-supply voltage corresponding to a level of the RF signal is supplied, and being configured to amplify the RF signal; a bias circuit including a second transistor configured to supply a bias current to the base of the first transistor; and an adjustment circuit configured to cause the bias current to be supplied to the base of the first transistor to decrease with decrease in the variable power-supply voltage by causing a current to be supplied to a base of the second transistor to decrease.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: June 9, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Hideyuki Satou
  • Patent number: 10666214
    Abstract: An apparatus includes an amplifier and a gain control circuit. The amplifier may be configured to provide multiple gain steps. The gain control circuit may be configured to provide fast and precise changes between the multiple gain steps of the amplifier. The gain control circuit may be further configured to change an impedance of the amplifier to switch between the gain steps. The gain control circuit may be further configured to compensate for changes in frequency response related to changing the impedance. The gain control circuit may be further configured to inject a complementary charge to an input of the amplifier to correct a bias voltage deviation and a transient caused by the gain control circuit.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 26, 2020
    Assignee: Integrated Device Technology, Inc.
    Inventors: Victor Korol, Roberto Aparicio Joo
  • Patent number: 10651796
    Abstract: The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: May 12, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Jaw-Ming Ding
  • Patent number: 10637412
    Abstract: Apparatus and methods for low noise amplifiers (LNAs) are provided herein. In certain configurations, an LNA includes a mode control circuit that operates the LNA in one of a plurality of modes including a gain mode and a bypass mode, a gain circuit electrically connected between an input terminal and an output terminal and operable to amplify a radio frequency signal received from the input terminal in the gain mode, and a bypass circuit electrically connected between the input terminal and the output terminal and operable to bypass the gain circuit in the bypass mode. The bypass circuit includes a balun that provides a first amount of compensation for a difference in phase delay between the bypass circuit and the gain circuit, and the LNA further includes a phase compensation circuit operable to provide a second amount of compensation for the difference in phase delay.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: April 28, 2020
    Assignee: Skyworks Solutions, Inc.
    Inventors: Perihua Ye, Engin Ibrahim Pehlivanoglu, Eric J. Marsan
  • Patent number: 10608597
    Abstract: A power amplifier circuit includes an amplifier transistor having a base, a collector, a bias circuit, and a first resistance element connected between the base of the amplifier transistor and the bias circuit. The bias circuit includes a voltage generation circuit, a first transistor having a base to which a first direct-current voltage is supplied, and an emitter from which the bias current or voltage is supplied, a second transistor having a base to which a second direct-current voltage is supplied, and an emitter connected to the emitter of the first transistor, a signal supply circuit disposed between the base of the amplifier transistor and the base of the second transistor, and an impedance circuit disposed between the base of the first transistor and the base of the second transistor.
    Type: Grant
    Filed: February 18, 2019
    Date of Patent: March 31, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yuri Honda, Fumio Harima, Satoshi Tanaka
  • Patent number: 10581383
    Abstract: A method and apparatus for a dual-feedback, amplifier limiter for providing a conditioned radio-frequency signal. The dual-feedback, amplifier limiter includes an input that receives a radio-frequency signal and a stacked amplifier including an input node coupled to the input, an output node, a first transistor configured as a common-base amplifier, and a second transistor configured as a common-emitter amplifier. The dual-feedback, amplifier limiter further includes an output coupled to the output node of the stacked amplifier. The output provides the conditioned radio-frequency signal. The dual-feedback, amplifier limiter further includes a radio-frequency feedback circuit coupled to the stacked amplifier. The radio-frequency feedback circuit includes a passive radio-frequency dependent reactive element in series with a radio-frequency feedback circuit resistor.
    Type: Grant
    Filed: December 17, 2015
    Date of Patent: March 3, 2020
    Assignee: MOTOROLA SOLUTIONS, INC.
    Inventors: Alexander Oon, Teik Yang Goh, Yuan Wei Ng, Seow Teng Wong
  • Patent number: 10564207
    Abstract: Power conversion systems, ground fault detection apparatus and methods to detect and identify ground faults in a power conversion system using AC coupling to sense a system voltage to determine a leakage flux linkage, and to identify a faulted converter phase based on a phase shift angle of the leakage flux linkage.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: February 18, 2020
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Rangarajan M. Tallam, Jiangang Hu, Brian P. Brown
  • Patent number: 10560056
    Abstract: Power consumption of a signal processing circuit is reduced. Further, power consumption of a semiconductor device including the signal processing circuit is reduced. The signal processing circuit includes a reference voltage generation circuit, a voltage divider circuit, an operational amplifier, a bias circuit for supplying bias current to the operational amplifier, and first and second holding circuits. The first holding circuit is connected between the reference voltage generation circuit and the bias circuit. The second holding circuit is connected between the voltage divider circuit and a non-inverting input terminal of the operational amplifier. Reference voltage from the reference voltage generation circuit and reference voltage from the voltage divider circuit can be held in the first and second holding circuits, respectively, so that the reference voltage generation circuit can stop operating. Thus, power consumption of the reference voltage generation circuit can be reduced.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: February 11, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Yoshifumi Tanada
  • Patent number: 10554187
    Abstract: There are disclosed various methods and apparatuses for providing power to a set of power amplifiers. In some embodiments the method comprises obtaining first transmission parameters associated with a first transmit signal, selecting one or more output voltage values on the basis of the first transmission parameters, controlling a multi-level power source to generate one or more output voltages on the basis of the one or more output voltage values, multiplexing based on the first transmit signal between two or more of the output voltages and a first supply voltage terminal of a first power amplifier, and amplifying the first transmit signal with the first power amplifier.
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: February 4, 2020
    Assignee: Provenance Asset Group LLC
    Inventor: Markus Nentwig
  • Patent number: 10505499
    Abstract: Configurable adjustment of a power amplifier bias for a power amplifier. The power amplifier may be comprised within a variety of different apparatuses, such as without limitation a remote PHY node, a remote MACPHY node, and a wireless communication device. A processing unit, disposed within an apparatus, instructs an electrical circuit, also disposed within said apparatus, to change an RF signal output power carrying capability of the power amplifier based on a configuration. The configuration may, but need not, be maintained within the apparatus. The change in the RF signal output power carrying capability of the power amplifier causes an adjustment in a power consumption of the power amplifier.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: December 10, 2019
    Assignee: Harmonic, Inc.
    Inventor: Adi Bonen
  • Patent number: 10499352
    Abstract: Provided is a communication unit that includes first and second power-amplification modules, which can be integrated. The first power-amplification module includes a first power-amplifier for a first frequency band in a first communication scheme, a second power-amplifier for a second frequency band in the first communication scheme, a third power-amplifier for a third frequency band in a second communication scheme, a fourth power-amplifier for a fourth frequency band in the second communication scheme, a first bias circuit that generates a first bias current to the first and second power-amplifiers, and a bias current circuit that converts the first bias current into a second bias current to the third and fourth power-amplifiers. The second power-amplification module includes a fifth power-amplifier for a fifth frequency band in the first communication scheme, and a second bias circuit that generates a third bias current to the fifth power-amplifier.
    Type: Grant
    Filed: January 26, 2018
    Date of Patent: December 3, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Takayuki Tsutsui, Yusuke Tanaka, Hayato Nakamura, Kazuhito Nakai
  • Patent number: 10491046
    Abstract: A wireless transmitter includes a an amplifier; and a switchable transformer, coupled to the amplifier, wherein the amplifier is configured to be coupled to the switchable transformer in first and second configurations, wherein the first configuration causes the amplifier to provide a first output impedance to the switchable transformer, and wherein the second configuration causes the amplifier to provide a second output impedance to the switchable transformer, the first and second output impedances being different from each other.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: November 26, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Sheng Chen, An-Hsun Lo, En-Hsiang Yeh, Tzu-Jin Yeh