Including Particular Biasing Arrangement Patents (Class 330/296)
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Patent number: 11658764Abstract: The disclosure relates to an apparatus including a receiver configured to process a radio frequency (RF) signal to generate a baseband signal; a radio frequency (RF) jammer detector configured to generate a signal indicative of whether an RF jammer is present at an input of the receiver; and a receiver bias circuit configured to generate a supply voltage for the receiver based on the RF jammer indication signal. In another aspect, the apparatus includes constant gain bias circuit to maintain the gain of the receiver constant in response to changes in the supply voltage. In other aspects, the receiver bias circuit may suspend the generating of the supply voltage based on the RF jammer indication signal if the power level of the target received signal is above a threshold. In other aspects, the receiver bias circuit changes the supply voltage during cyclic prefix (CP) intervals between downlink intervals.Type: GrantFiled: December 16, 2020Date of Patent: May 23, 2023Assignee: QUALCOMM IncorporatedInventors: Lai Kan Leung, Aleksandar Miodrag Tasic, Francesco Gatta, Chiewcharn Narathong, Kyle David Holland
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Patent number: 11646704Abstract: A power amplifier circuit includes a first transistor that amplifies a first signal and outputs a second signal; a second transistor that amplifies the second signal and outputs a third signal; a bias circuit that supplies a bias current to a base of the second transistor; and a bias adjustment circuit that adjusts the bias current by subjecting the first signal to detection. The bias adjustment circuit controls the bias current such that a first current extracted from the bias circuit depends on a magnitude of the first signal.Type: GrantFiled: April 23, 2021Date of Patent: May 9, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Takayuki Tsutsui, Masao Kondo, Satoshi Tanaka
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Patent number: 11632090Abstract: A push-push frequency doubler based on complementary transistors is provided. The first differential amplifier circuit receives a differential input signal having an initial frequency, and amplifies the amplitude of the second harmonic of the differential input signal to obtain a first signal. The second differential amplifier circuit receives the differential input signal with the initial frequency and amplifies the amplitude of the second harmonic of the differential input signal to obtain the second signal. Where, the first signal and the second signal are a set of differential signals with the same amplitude and a phase difference of 180°. The output load circuit extracts the second harmonic signal in the first and second signal respectively to obtain and output a pair of differential output signal with first output frequency whose value is twice of the initial frequency. As a result, the frequency doubler with differential output signal is realized.Type: GrantFiled: August 19, 2022Date of Patent: April 18, 2023Assignee: THE CHINESE UNIVERSITY OF HONG KONG, SHENZHENInventors: Liang Wu, Xiaoping Wu, Yihui Wang
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Patent number: 11621681Abstract: A radio frequency power amplifier and a device are disclosed. A first microstrip line and a second microstrip line are coupled, one end of the second microstrip line is an open stub and another end of the second microstrip line is grounded; and the first microstrip line having a first width is connected to a first transmission line having a second width which is wider than the first width. Therefore, some harmonic bands suppression can be implemented independently. Furthermore, the harmonic termination is independent and may not impact one or more fundamental components during matching a network. In addition, it may not take up more space and is sufficiently compact. Furthermore, sufficient wide harmonic response bandwidth can be provided.Type: GrantFiled: April 27, 2018Date of Patent: April 4, 2023Assignee: Telefonaktiebolaget LM EricssonInventors: Zhancang Wang, Shun Li
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Patent number: 11621672Abstract: A circuit includes a field effect transistor (FET), a reference transistor having an output coupled to an output of the FET, an active bias circuit coupled to the reference transistor and configured to generate an input signal for the reference transistor in response to a change in drain current of the reference transistor due to carrier trapping and to apply the input signal to an input of the reference transistor, and a summing node coupled to an input of the FET and to the input of the reference transistor. The summing node adds the input signal to an input signal of the FET to compensate the carrier trapping effect.Type: GrantFiled: August 5, 2021Date of Patent: April 4, 2023Assignee: Wolfspeed, Inc.Inventors: Young-Youl Song, Zulhazmi A. Mokhti, John Wood, Qianli Mu, Jeremy Fisher
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Patent number: 11611347Abstract: An integrator and an analog-to-digital converter are provided. The analog-to-digital converter includes the integrator, a comparison circuit and a control logic circuit. The integrator includes an operational amplifier, offset capacitors, input capacitors, integral capacitors and controllable switches. The input capacitors and the integral capacitors are connected to the operational amplifier via controllable switches, so that the integrator operates in various operation modes. Operation states of the offset capacitors in a first phase and a second phase of an operation cycle are controlled by switching on or off the controllable switches. Therefore, an offset voltage of the integrator is eliminated, and conversion efficiency and conversion accuracy of the analog-to-digital converter is improved.Type: GrantFiled: July 14, 2021Date of Patent: March 21, 2023Assignee: SILERGY SEMICONDUCTOR TECHNOLOGY (HANGZHOU) LTDInventors: Ying Huang, Di Gao, Kun Li, Jinyu Qin
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Patent number: 11601102Abstract: A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.Type: GrantFiled: February 5, 2021Date of Patent: March 7, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Hiroaki Tokuya, Hideyuki Sato, Fumio Harima, Kenichi Shimamoto, Satoshi Tanaka, Takayuki Kawano, Ryoki Shikishima, Atsushi Kurokawa
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Patent number: 11601096Abstract: A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.Type: GrantFiled: March 25, 2021Date of Patent: March 7, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Isao Takenaka
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Patent number: 11601100Abstract: The frequency detector includes a first impedance circuit and a second impedance circuit. The first impedance circuit has a first terminal for receiving an input signal, and a second terminal for outputting a divisional signal. The second impedance circuit has a first terminal coupled to the second terminal of the first impedance circuit, and a second terminal coupled to a first system voltage terminal. The frequency response of the first impedance circuit is different from a frequency response of the second impedance circuit. The resistance of the first impedance circuit, a resistance of the second impedance circuit, and the divisional signal change with a frequency of the input signal.Type: GrantFiled: August 2, 2020Date of Patent: March 7, 2023Assignee: RichWave Technology Corp.Inventors: Hwey-Ching Chien, Chih-Sheng Chen, Jhao-Yi Lin, Ching-Wen Hsu
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Patent number: 11588513Abstract: A monolithic integrated circuit (IC), and method of manufacturing same, that includes all RF front end or transceiver elements for a portable communication device, including a power amplifier (PA), a matching, coupling and filtering network, and an antenna switch to couple the conditioned PA signal to an antenna. An output signal sensor senses at least a voltage amplitude of the signal switched by the antenna switch, and signals a PA control circuit to limit PA output power in response to excessive values of sensed output. Stacks of multiple FETs in series to operate as a switching device may be used for implementation of the RF front end, and the method and apparatus of such stacks are claimed as subcombinations. An iClass PA architecture is described that dissipatively terminates unwanted harmonics of the PA output signal.Type: GrantFiled: July 14, 2021Date of Patent: February 21, 2023Assignee: pSemi CorporationInventors: Mark L. Burgener, James S. Cable
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Patent number: 11581857Abstract: Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.Type: GrantFiled: March 30, 2022Date of Patent: February 14, 2023Assignee: Skyworks Solutions, Inc.Inventors: Wendy Ng, Wei Long, Kevin Cho
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Patent number: 11569787Abstract: Provided is a power amplification module that includes: a first transistor, a first signal being inputted to a base thereof; a second transistor, the first signal being inputted to a base thereof and a collector thereof being connected to a collector of the first transistor; a first resistor, a first bias current being supplied to one end thereof and another end thereof being connected to the base of the first transistor; a second resistor, one end thereof being connected to the one end of the first resistor and another end thereof being connected to the base of the second transistor; and a third resistor, a second bias current being supplied to one end thereof and another end thereof being connected to the base of the second transistor.Type: GrantFiled: March 24, 2021Date of Patent: January 31, 2023Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Satoshi Arayashiki, Satoshi Goto, Satoshi Tanaka, Yasuhisa Yamamoto
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Patent number: 11569784Abstract: A power amplifier includes a transistor, a temperature sensor and a filter. The transistor is used to receive a bias signal and amplify a radio frequency (RF) signal. The temperature sensor is arranged in proximity to the transistor, and is used to detect a temperature of the transistor to provide a voltage signal at a control node accordingly. The filter is coupled to the temperature sensor and is used to filter the voltage signal to generate a filtered voltage. The bias signal is adjusted according to the filtered voltage.Type: GrantFiled: June 23, 2021Date of Patent: January 31, 2023Assignee: RichWave Technology Corp.Inventors: Tien-Yun Peng, Chih-Sheng Chen
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Patent number: 11536757Abstract: A sensor assembly including a capacitive sensor, like a microelectromechanical (MEMS) microphone, and an electrical circuit therefor are disclosed. The electrical circuit includes a first transistor having an input gate connectable to the capacitive sensor, a second transistor having an input gate coupled to an output of the first transistor, a feedforward circuit interconnecting a back-gate of the second transistor and the output of the first transistor, and a filter circuit interconnecting the output of the first transistor and the input gate of the second transistor.Type: GrantFiled: June 19, 2020Date of Patent: December 27, 2022Assignee: Knowles Electronics, LLCInventors: Michael Jennings, Dean Badillo
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Patent number: 11523198Abstract: The present disclosure relates to devices and methods for programming one-time programmable fuses of microphone assemblies. One microphone assembly includes a housing, a transducer, a filter circuit, and an integrated circuit. The integrated circuit has a fuse block having a one-time programmable (OTP) fuse configurable in a programming mode of operation during which a voltage applied to the supply voltage contact is increased relative to a voltage applied to a supply voltage contact in a normal mode of operation. The microphone assembly further includes a protection circuit configured to regulate a voltage at the voltage input terminal of the integrated circuit during the programming mode of operation based on a comparison of a voltage at the voltage input terminal with a reference voltage. The voltage on the voltage input terminal of the integrated circuit tracks the reference voltage during the programming mode of operation.Type: GrantFiled: April 26, 2020Date of Patent: December 6, 2022Assignee: Knowles Electronics, LLCInventors: Fabrizio Conso, Tore Sejr Jørgensen
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Patent number: 11515861Abstract: An embodiment apparatus comprises a switching-type output power stage, a modulator circuit configured for carrying out a pulse-width modulation and converting an electrical input signal into an input signal pulsed between two electrical levels, having a mean value proportional to the amplitude of the input signal, and a circuit arrangement for controlling saturation of an output signal supplied by the switching-type output power stage. The circuit arrangement comprises a pulse-remodulator circuit, between the output of the modulator circuit and the input of the switching-type output power stage, that is configured for supplying, as a driving signal to the switching-type output power stage, a respective modulated signal pulsed between two electrical levels, measuring a pulse width as pulse time interval elapsing between two consecutive pulsed-signal edges of the pulsed input signal, and, if the measurement indicates that the latter is below a given minimum value, remodulating the pulsed input signal.Type: GrantFiled: June 17, 2021Date of Patent: November 29, 2022Assignee: STMicroelectronics S.r.l.Inventors: Giovanni Gonano, Marco Raimondi
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Patent number: 11509269Abstract: An amplifier circuit includes an amplifier configured to receive a radio frequency (RF) input signal from an input node, a bias circuit comprising a reference transistor coupled between a reference current source and ground, and a bias transistor coupled to the reference transistor and configured to generate a main bias current to bias the amplifier, an input power sense circuit coupled to the input node, and an additional transistor coupled to the input power sense circuit and to the bias transistor, the additional transistor configured to generate an additional bias current to bias the amplifier, the additional bias current responsive to a power level of the RF input signal.Type: GrantFiled: August 17, 2020Date of Patent: November 22, 2022Assignee: QUALCOMM IncorporatedInventors: Jisun Ryu, Yan Kit Gary Hau, Guoqing Fu, Xinwei Wang, Xiangdong Zhang, Chenliang Du
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Patent number: 11502647Abstract: Provided is an amplifier that includes a first transistor including a gate terminal to which an applied input signal is input, where a current depending on the applied input signal flows through the first transistor. A gate terminal of a second transistor is connected to a load section, and a current depending on a change in a voltage of the drain terminal of the first transistor flows through the second transistor. A source terminal of the first transistor and a drain terminal of the second transistor are connected in common to a first resistance, and the current from the first transistor and the current from the second transistor flow through the first resistance. A third transistor supplies a current approximately equal to the current of the second transistor. The current supplied by the third transistor is output from an output end.Type: GrantFiled: February 8, 2019Date of Patent: November 15, 2022Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Kazumasa Nishimura, Masahiro Ichihashi, Masayuki Katakura, Kenya Kondou, Tetsuya Tashiro, Boyang Hao, Kouzi Tsukamoto
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Patent number: 11489493Abstract: A current control circuit controls a base current of a first transistor included in a bias circuit outputting a bias current to a power amplifier based on a base-collector voltage of the first transistor. The current control circuit includes a first circuit that outputs a signal associated with the base-collector voltage of the first transistor, and a second circuit that, based on the signal, provides electrical continuity between a base of the first transistor and a reference potential.Type: GrantFiled: February 4, 2020Date of Patent: November 1, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Mikiko Fukasawa, Kazuhiko Ishimoto
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Patent number: 11482975Abstract: Power amplifiers with adaptive bias for envelope tracking applications are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency (RF) signal and that receives power from a power amplifier supply voltage, and an envelope tracker that generates the power amplifier supply voltage based on an envelope of the RF signal. The power amplifier includes a field-effect transistor (FET) for amplifying the RF signal, and a current mirror including an input that receives a reference current and an output connected to the power amplifier supply voltage. An internal voltage of the current mirror is used to bias the gate of the FET to compensate the FET for changes in the power amplifier supply voltage arising from envelope tracking.Type: GrantFiled: May 17, 2021Date of Patent: October 25, 2022Assignee: Skyworks Solutions, Inc.Inventors: Aleksey A. Lyalin, Huiming Xu, Shayan Farahvash, Georgios Palaskas
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Patent number: 11469713Abstract: A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.Type: GrantFiled: January 11, 2021Date of Patent: October 11, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Kenichi Shimamoto
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Patent number: 11463060Abstract: The present disclosure provides a power amplifier circuit capable of suppressing the occurrence of noises while enabling control of an output power level. The power amplifier circuit includes a first transistor that amplifies a first signal; a bias circuit that supplies a bias current or voltage based on a control signal to the first transistor; a second transistor to which a control current based on the control signal is supplied, which has an emitter or a source thereof connected to a collector or a drain of the first transistor, and from which a second signal obtained by amplifying the first signal is output; and a first feedback circuit provided between the collector or the drain of the second transistor and the base or the gate of the second transistor.Type: GrantFiled: September 30, 2020Date of Patent: October 4, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Yuri Honda, Fumio Harima, Yoshiki Kogushi, Shota Ishihara, Fuminori Morisawa
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Patent number: 11456712Abstract: A power amplifier device includes: a first power supply terminal for inputting a first power supply voltage; a first transistor for power amplification that (i) includes a first gate to which a bias voltage is applied, and (ii) is supplied with power from the first power supply terminal; a second power supply terminal for inputting a second power supply voltage lower than the first power supply voltage; a second transistor for monitoring that (i) includes a second gate to which the bias voltage is applied, (ii) is supplied with power from the first power supply terminal or the second power supply terminal, and (iii) imitates an operation of the first transistor; and a bias circuit that is supplied with power from the second power supply terminal and generates and adjusts the bias voltage according to a drain current or a source current of the second transistor.Type: GrantFiled: April 9, 2021Date of Patent: September 27, 2022Assignee: NUVOTON TECHNOLOGY CORPORATION JAPANInventors: Takashi Saji, Kaname Motoyoshi, Shingo Matsuda
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Patent number: 11456702Abstract: The invention relates to a broadband high power amplifier that comprises a signal input adapted to receive an input signal, at least one amplifier stage adapted to amplify the received input signal, a signal output adapted to output the signal amplified by the at least one amplifier stage as an output signal, a monitoring unit adapted to monitor signal characteristics of the input signal and the output signal and a control unit adapted to operate the at least one amplifier stage at an optimal operating point depending on the current signal characteristics monitored by said monitoring unit.Type: GrantFiled: July 25, 2019Date of Patent: September 27, 2022Assignee: Rohde & Schwarz GmbH & Co. KGInventors: Thomas Witt, Florian Ohnimus, Uwe Dalisda, Wolfram Titze, Andreas Andrei, Raimon Göritz
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Patent number: 11444576Abstract: Apparatus and methods for power amplifier bias modulation for multi-level supply envelope tracking are provided herein. In certain embodiments, an envelope tracking system includes a power amplifier that amplifies a radio frequency signal, a multi-level supply envelope tracker that generates a power amplifier supply voltage of the power amplifier based on an envelope signal indicating an envelope of the radio frequency signal, and a bias modulation circuit that modulates a bias of the power amplifier based on a voltage level of the power amplifier supply voltage.Type: GrantFiled: September 23, 2020Date of Patent: September 13, 2022Assignee: Skyworks Solutions, Inc.Inventors: Serge Francois Drogi, Philip John Lehtola, Florinel G. Balteanu
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Patent number: 11424722Abstract: A communication device includes a power amplifier that generates power signals according to one or more operating bands of communication data, with the amplitude being driven and generated in output stages of the power amplifier. The final stage can include an output passive network that suppresses suppress an amplitude modulation-to-phase modulation (AM-PM) distortion. During a back-off power mode a bias of a capacitive unit of the output power network component can be adjusted to minimize an overall capacitance variation. A output passive network can further generate a flat-phase response between dual resonances of operation.Type: GrantFiled: August 24, 2020Date of Patent: August 23, 2022Assignee: INTEL CORPORATIONInventors: Jong Seok Park, Yanjie Wang, Stefano Pellerano, Christopher D. Hull
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Patent number: 11418185Abstract: Disclosed herein are switching or other active FET configurations that implement a branch design with one or more interior FETs of a main path coupled in parallel with one or more auxiliary FETs of an auxiliary path. Such designs include a circuit assembly for performing a switching function that includes a branch with a plurality of auxiliary FETs coupled in series and a main FET coupled in parallel with an interior FET of the plurality of auxiliary FETs. The body nodes of the FETs can be interconnected and/or connected to a body bias network. The body nodes of the FETs can be connected to body bias networks to enable individual body bias voltages to be used for individual or groups of FETs.Type: GrantFiled: July 13, 2021Date of Patent: August 16, 2022Assignee: SKYWORKS SOLUTIONS, INC.Inventors: Hailing Wang, Dylan Charles Bartle, Hanching Fuh, Jerod F. Mason, David Scott Whitefield, Paul T. DiCarlo
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Patent number: 11394347Abstract: Apparatus and methods for bias switching of power amplifiers are provided herein. In certain configurations, a power amplifier system includes a power amplifier that provides amplification to a radio frequency (RF) signal, a power management circuit that controls a voltage level of a supply voltage of the power amplifier, and a bias control circuit that biases the power amplifier. The power management circuit is operable in multiple supply control modes, such as an average power tracking (APT) mode and an envelope tracking (ET) mode. The bias control circuit is configured to switch a bias of the power amplifier based on the supply control mode of the power management circuit.Type: GrantFiled: February 23, 2021Date of Patent: July 19, 2022Assignee: Skyworks Solutions, Inc.Inventors: Netsanet Gebeyehu, Srivatsan Jayaraman, Edward James Anthony
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Patent number: 11387787Abstract: The invention relates to a signal amplifier circuit for amplifying a signal, in particular an audio amplifier circuit, includes at least one first amplifier transistor (Q1) and at least one second amplifier transistor (Q2), wherein the first amplifier transistor (Q1) and the second amplifier transistor (Q2) are connected to one another in a push-pull circuit and are fed by an amplifier voltage source (V+, V?); and one or more bias diodes (D1, D2) thermally coupled in each case to an associated amplifier transistor (Q1, Q2), wherein the bias diodes (D1, D2) are arranged in a parallel connection with respect to the amplifying transistors (Q1, Q2) to reduce or avoid a crossover distortion, wherein the bias diodes (D1, D2) are fed at least partly by a voltage source (UA) which is independent of the amplifier voltage source (V+, V?).Type: GrantFiled: April 27, 2018Date of Patent: July 12, 2022Assignee: BURMESTER AUDIOSYSTEME GmbHInventor: Ernst-Heinrich Westphal
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Patent number: 11374440Abstract: A current sensing circuit and a minimum operating frequency for a wireless power transmission system is presented. A method of measuring current through a wireless power transmit coil, includes receiving a signal from a switching circuit into a sampling circuit; filtering the sampled signal from the sampling circuit; biasing the filtered sampled signal, wherein the biasing occurs only when the sampling circuit is active; and amplifying the biased signal to provide a transmit coil current signal. A method of measuring current through a wireless power transmit coil, includes receiving a signal from a switching circuit into a sampling circuit; filtering the sampled signal from the sampling circuit; biasing the filtered sampled signal, wherein the biasing occurs only when the sampling circuit is active; and amplifying the biased signal to provide a transmit coil current signal.Type: GrantFiled: July 31, 2020Date of Patent: June 28, 2022Assignee: Renesas Electronics America Inc.Inventor: Gustavo Mehas
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Patent number: 11349437Abstract: A power amplifier circuit includes power amplifiers connected in stages to amplify a high-frequency input signal and to output an amplified high-frequency output signal, bias circuits each of which outputs a bias current to a corresponding one of the power amplifiers, and a bias control circuit configured to output a bias control current based on a second reference potential that varies in response to power of the high-frequency output signal and that is a potential of a portion in one bias circuit of the bias circuits to one or more bias circuits in a stage preceding the one bias circuit for increasing a bias current outputted from the one or more bias circuits in the stage preceding the one bias circuit.Type: GrantFiled: May 1, 2020Date of Patent: May 31, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Masatoshi Hase
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Patent number: 11349446Abstract: An apparatus and method for using the known phenomena of quantum gate tunneling in semiconductor transistors to define the DC state of a charge-coupled amplifier is described. A first stage in which the tunneling current is bipolar (by pairing PMOS and NMOS transistors) in combination with a second stage with a controlled common mode voltage that can be used to control the first stage tunneling current, and thus the common mode voltage at the input. This can be done without the use of additional elements that may degrade performance or power consumption, since the input devices both process the input signal and maintain the DC operating point of the circuit. The approach may be advantageously used not only in charge-coupled amplifiers as described herein, but also in other capacitively coupled circuits such as charge balancing analog to digital converters (ADCs) and digital to analog converters (DACs).Type: GrantFiled: March 9, 2021Date of Patent: May 31, 2022Assignee: SiliconIntervention Inc.Inventor: A. Martin Mallinson
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Patent number: 11335805Abstract: A switch device includes a P-type substrate, a first gate structure, a first N-well, a shallow trench isolation structure, a first P-well, a second gate structure, a first N-type doped region, a second P-well, and a second N-type doped region. The first N-well is formed in the P-type substrate and partly under the first gate structure. The shallow trench isolation structure is formed in the first N-well and under the first gate structure. The first P-well is formed in the P-type substrate and under the first gate structure. The first N-type doped region is formed in the P-type substrate and between the first gate structure and the second gate structure. The second P-well is formed in the P-type substrate and under the second gate structure. The second N-type doped region is formed in the second P-well and partly under the second gate structure.Type: GrantFiled: September 8, 2020Date of Patent: May 17, 2022Assignee: eMemory Technology Inc.Inventors: Chih-Hsin Chen, Shih-Chen Wang, Tsung-Mu Lai, Wen-Hao Ching, Chun-Yuan Lo, Wei-Chen Chang
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Patent number: 11336242Abstract: A communication circuit, including a first supply modulator configured to provide a first supply voltage; a first power amplifier configured to generate a first output signal by amplifying a first input signal corresponding to a first operation frequency band; a second power amplifier configured to generate a second output signal by amplifying a second input signal corresponding to a second operation frequency band; and a switching circuit configured to selectively provide the first supply voltage from the first supply modulator to the second power amplifier based on a first switching signal according to an operation mode.Type: GrantFiled: April 23, 2020Date of Patent: May 17, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Dongsu Kim, Junsuk Bang, Jiseon Paek, Youngho Jung
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Patent number: 11323077Abstract: Components of a power amplifier controller may support lower voltages than the power amplifier itself. As a result, a surge protection circuit that prevents a power amplifier from being damaged due to a power surge may not effectively protect the power amplifier controller. Embodiments disclosed herein present an overvoltage protection circuit that prevents a charge-pump from providing a voltage to a power amplifier controller during a detected surge event. By separately detecting and preventing a voltage from being provided to the power amplifier controller during a surge event, the power amplifier controller can be protected regardless of whether the surge event results in a voltage that may damage the power amplifier. Further, embodiments of the overvoltage protection circuit can prevent a surge voltage from being provided to a power amplifier operating in 2G mode.Type: GrantFiled: November 6, 2020Date of Patent: May 3, 2022Assignee: Skyworks Solutions, Inc.Inventors: Wendy Ng, Wei Long, Kevin Cho
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Patent number: 11316481Abstract: A radio frequency (RF) power transistor circuit includes a power transistor and a decoupling circuit. The power transistor has a control electrode coupled to an input terminal for receiving an RF input signal, a first current electrode for providing an RF output signal at an output terminal, and a second current electrode coupled to a voltage reference. The decoupling circuit includes a first inductive element, a first resistor, and a first capacitor coupled together in series between the first current electrode of the power transistor and the voltage reference. The decoupling circuit is for dampening a resonance at a frequency lower than an RF frequency.Type: GrantFiled: July 27, 2020Date of Patent: April 26, 2022Assignee: NXP USA, Inc.Inventors: Hussain H. Ladhani, Gerard J. Bouisse, Jeffrey K. Jones
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Patent number: 11309841Abstract: An amplifier includes at least one amplification circuit through one of which a bias current flows, a first memory that stores control information to specify the bias current to be fed through the one of the at least one amplification circuit, a digital control circuit that generates a bias current setting to set the bias current in accordance with the control information, a second memory that stores correction information to correct the bias current setting, a correction circuit that corrects the bias current setting in accordance with the correction information, and a bias circuit that determines the bias current in the one of the at least one amplification circuit in accordance with the bias current setting, which has been corrected.Type: GrantFiled: May 29, 2020Date of Patent: April 19, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Nobuyasu Beppu
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Patent number: 11281245Abstract: A radio frequency (“RF”) power device includes a RF power transistor, and a bias circuit coupled between a reference voltage input and an input terminal of the RF power transistor. The bias circuit includes an impedance control circuit that is configured to vary an impedance of the bias circuit at the input terminal of the RF power transistor responsive to a RF input signal provided to the input terminal, and/or a current control circuit that is configured to control a bias current provided to the input terminal of the RF power transistor responsive to variations in operating characteristics of the RF power transistor. Related RF power amplifiers and device packages are also discussed.Type: GrantFiled: January 27, 2021Date of Patent: March 22, 2022Assignee: WOLFSPEED, INC.Inventors: Christophe Joly, Sonoko Aristud
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Patent number: 11271531Abstract: A power amplifier module includes a power amplifier including an amplifying unit including an amplifying transistor configured to amplify an input signal and output an output signal, and a bias unit including a bias transistor configured to provide a bias current to the amplifying transistor, and a sub bias transistor configured to provide a sub bias current to the amplifying transistor; and a control unit configured to provide a control current to the bias transistor and the sub bias transistor. The control unit is further configured to vary the control current according to the sub bias current, and a level of the sub bias current is lower than a level of the bias current.Type: GrantFiled: April 22, 2020Date of Patent: March 8, 2022Assignee: Samsung Electro-Mechanics Co., Ltd.Inventor: Su Yeon Han
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Patent number: 11264952Abstract: Provided is a power amplification circuit that includes: an amplifier that amplifies an input signal and outputs an amplified signal; a first bias circuit that supplies a first bias current or voltage to the amplifier; a second bias circuit that supplies a second bias current or voltage to the amplifier; a first control circuit that controls the first bias current or voltage; and a second control circuit that controls the second bias current or voltage. The current supplying capacity of the first bias circuit is different from the current supplying capacity of the second bias circuit.Type: GrantFiled: September 17, 2020Date of Patent: March 1, 2022Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Satoshi Tanaka, Tetsuaki Adachi, Kazuo Watanabe, Masahito Numanami, Yasuhisa Yamamoto
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Patent number: 11245373Abstract: An amplifier includes a first circuitry, a second circuitry, and a plurality of amplifier circuitries. The first circuitry controls an enable signal. The second circuitry controls a bias signal. Circuitries which output signals are decided from among the plurality of circuitries based on the enable signal, and each of the circuitries which output the signals amplifies an input signal with a gain corresponding to the bias signal.Type: GrantFiled: March 6, 2020Date of Patent: February 8, 2022Assignees: KABUSHIKI KAISHA TOSHIBA, TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATIONInventor: Tong Wang
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Patent number: 11190153Abstract: A packaged RF power amplifier (RFPA) configured to increase video bandwidth is disclosed as well is a process for implementing a RF power device to increase video bandwidth. The RF power device including at least one transistor; an output matching circuit coupled to an output lead and to the at least one transistor; at least one bias feed circuit coupled to the at least one transistor; and at least one coaxial resonator coupled between the at least one transistor and the at least one bias feed circuit.Type: GrantFiled: February 6, 2020Date of Patent: November 30, 2021Assignee: WOLF SPEED, INC.Inventor: David Michael Rice
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Patent number: 11189244Abstract: An output amplifier includes an input unit including first and second input transistors, and a first bias transistor between a connection node of a source of the first input transistor and a source of the second input transistor and a first voltage source, a first current mirror including first and second transistors connected in series at a first connection node and between a second voltage source and a second connection node, and third and fourth transistors connected in series at a third connection node and between the second voltage source and a fourth connection node, and a second current mirror including fifth and sixth transistors between a fifth connection node and the first voltage source and connected in series at a sixth connection node, and seventh and eighth transistors between a seventh connection node and the first voltage source.Type: GrantFiled: April 28, 2020Date of Patent: November 30, 2021Assignee: DB HiTek Co., Ltd.Inventors: Mun Gyu Kim, Kyoung Tae Kim, Jae Hong Ko
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Patent number: 11183978Abstract: An amplifier, e.g., a low-noise amplifier, includes a field-effect transistor having a one-dimensional channel. This channel includes a semiconductor material for conducting electrons along a main direction of the channel. This direction is perpendicular to a cross-section of the channel. Dimensions of this cross-section are, together with the semiconductor material, such that the channel exhibits quantized conduction of electrons along its main direction. The amplifier further includes an electrical circuit that is configured to operate the transistor at a value of gate-to-source voltage bias corresponding to a peak value of a peak of a transconductance of the channel with respect to gate-to-source voltage bias values.Type: GrantFiled: June 6, 2019Date of Patent: November 23, 2021Assignee: International Business Machines CorporationInventors: Cezar Bogdan Zota, Lukas Czornomaz
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Patent number: 11177801Abstract: A radio frequency switching device includes: a first series switching circuit connected between a first terminal and a second terminal; a first shunt switching circuit connected between one end of the first series switching circuit and a ground; a voltage generation circuit configured to generate a first gate voltage to be output to the first series switching circuit, to generate a second gate voltage to be output to the first shunt switching circuit, and to generate a bias voltage higher than the second gate voltage to control the first shunt switching circuit to enter an off state; a first resistance circuit connected between a signal line between the first terminal and the second terminal, and a bias voltage terminal of the voltage generation circuit; and a second resistance circuit connected between the bias voltage terminal of the voltage generation circuit and a ground terminal of the first shunt switching circuit.Type: GrantFiled: February 20, 2019Date of Patent: November 16, 2021Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Byeong Hak Jo, Hyun Paek, Jeong Hoon Kim
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Patent number: 11177849Abstract: An apparatus is disclosed for transceiving signals in multiple modes. In example implementations, an apparatus includes a transceiver that includes a first amplifier; a mixer having at least one input node and at least one output node, with the at least one input node coupled to the first amplifier; and a second amplifier coupled to the at least one output node of the mixer. The transceiver also includes a first register coupled to the first amplifier and a second register coupled to the second amplifier. The transceiver further includes at least one memory realizing a lookup table. The at least one memory is coupled to the first register and the second register. The lookup table includes a first portion corresponding to a first mode of the transceiver and a second portion corresponding to a second mode of the transceiver.Type: GrantFiled: September 30, 2020Date of Patent: November 16, 2021Assignee: QUALCOMM IncorporatedInventors: Chuan Wang, Li Liu, Kevin Hsi-Huai Wang, Bhushan Shanti Asuri, Kang Yang, Shrenik Patel
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Radio frequency power amplifier based on current detection feedback, chip and communication terminal
Patent number: 11177781Abstract: Disclosed in the present invention are a radio frequency power amplifier based on current detection feedback and a chip. The radio frequency power amplifier comprises multiple stages of amplifier circuits and at least one current detection feedback circuit; the input end of the current detection feedback circuit is connected to the input end of a current stage of amplifier circuit among the multiple stages of amplifier circuits by means of a corresponding resistor, and the output end of the current detection feedback circuit is connected to the input end of at least one stage of amplifier circuit prior to the current stage of amplifier circuit. The current detection feedback circuit generates, according to the detected quiescent operating current of the current stage of amplifier circuit, a control voltage varying inversely with the quiescent operating current, so that the current detection feedback circuit outputs current varying positively with the control voltage.Type: GrantFiled: June 30, 2018Date of Patent: November 16, 2021Assignee: VANCHIP (TIANJIN) TECHNOLOGY CO., LTD.Inventors: Jinxin Zhao, Yunfang Bai -
Patent number: 11146218Abstract: An amplification circuit includes an input terminal, an output terminal, a capacitor, a bias unit, an amplification unit, and an impedance unit. The input terminal receives a radio frequency signal. The capacitor is coupled to the input terminal and the bias unit. The bias unit includes a transistor for controlling the bias current. The transistor has a first terminal for receiving a system voltage, and a control terminal coupled to the reference voltage terminal. The amplification unit has an input terminal coupled to the capacitor and the bias unit, and an output terminal coupled to the output terminal of the amplification circuit. The impedance unit has a first terminal coupled to the bias unit, and a second terminal coupled to the input terminal of the amplification circuit and the capacitor. The impedance unit adjusts the amplifying linearity of the amplification circuit according to a selection signal.Type: GrantFiled: December 10, 2019Date of Patent: October 12, 2021Assignee: RichWave Technology Corp.Inventors: Chih-Sheng Chen, Chang-Yi Chen
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Patent number: 11139786Abstract: An amplifying device includes a current generating circuit, a bias amplifying circuit, and a compensation circuit. The current generating circuit is configured to generate an internal current based on an internal voltage. The bias amplifying circuit, connected to the current generating circuit, is configured to output a bias current generated by amplifying the internal current to a power amplifying circuit. The compensation circuit, connected to the current generating circuit, is configured to adjust the internal voltage based on a bias voltage of the power amplifying circuit.Type: GrantFiled: December 24, 2019Date of Patent: October 5, 2021Assignee: Samsung Electro-Mechanics Co., Ltd.Inventors: Je Hee Cho, Kyu Jin Choi
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Patent number: 11128264Abstract: A bias compensation circuit, coupled to an amplifying transistor, is disclosed. The bias compensation circuit comprises a voltage locking circuit, comprising a first terminal and a second terminal, wherein the first terminal is coupled to a third terminal the amplifying transistor, and the second terminal is coupled to a control terminal of the amplifying transistor; and a first resistor, coupled to the first terminal of the voltage locking circuit; wherein when the voltage locking circuit is conducted, a voltage difference between the first terminal and the second terminal is substantially constant.Type: GrantFiled: April 19, 2020Date of Patent: September 21, 2021Assignee: WIN Semiconductors Corp.Inventors: Po-Kie Tseng, Chih-Wen Huang, Jui-Chieh Chiu, Shao-Cheng Hsiao