Including Particular Biasing Arrangement Patents (Class 330/296)
  • Patent number: 8324970
    Abstract: A radio frequency amplifier circuit includes a substrate that is capable of receiving a substrate bias voltage. The source of a transistor is capable of receiving a source bias voltage. The drain of the transistor is capable of receiving a drain bias voltage. The gate of the transistor is located between the source and the drain. A radio frequency input signal is coupled to the gate. A substrate bias circuit provides the substrate bias voltage. The substrate bias voltage and the source bias voltage forward bias the first diode formed by the source and the substrate. The substrate bias voltage and the drain bias voltage reverse bias the second diode formed by the drain and the substrate.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: December 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chewn-Pu Jou, Fu-Lung Hsueh, Sally Liu
  • Patent number: 8324971
    Abstract: The present invention is directed to a self-adjusting gate bias network for field effect transistors in radio frequency applications. A bias network for field effect transistors is provided comprising a field effect transistor having a source electrode connected to ground and a drain electrode connected to a load; a radio frequency network connected to the gate electrode; a gate bias network connected to the gate electrode; wherein a device having a non-linear characteristic is provided in series between the gate electrode and the gate bias network such that a forward bias current at the gate electrode of the field effect transistor is reduced or prevented. The reduction or prevention of a forward bias current leads in overdrive conditions to a self-adjustment of the bias point of the field-effect transistor improving the reduction of distortions of an amplifier or changing the class of oscillators connected to the gate electrode.
    Type: Grant
    Filed: September 15, 2009
    Date of Patent: December 4, 2012
    Assignee: Forschungsverbund Berlin E.V.
    Inventors: Roland Gesche, Ibrahim M. Khalil, Silvio Kuehn, Armin Liero
  • Publication number: 20120299660
    Abstract: Power amplifier (PA) control circuitry and PA bias circuitry are disclosed. During one slot of a multislot transmit burst from radio frequency (RF) PA circuitry, the PA control circuitry selects one PA bias level of the RF PA circuitry and the RF PA circuitry has one output power level. The RF PA circuitry has a next output power level during an adjacent next slot of the multislot transmit burst. If the one output power level exceeds the next output power level by more than a power drop limit, then the PA control circuitry maintains the one PA bias level during the adjacent next slot. If the one output power level significantly exceeds the next output power level, but by less than the power drop limit, then the PA control circuitry selects a next PA bias level, which is less than the one PA bias level, during the adjacent next slot.
    Type: Application
    Filed: November 28, 2011
    Publication date: November 29, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Roman Zbigniew Arkiszewski, Brian Baxter, Stuart Williams, Hirofumi Honjo, William David Southcombe, David E. Jones, Chris Levesque, Scott Yoder, Terry J. Stockert
  • Publication number: 20120299658
    Abstract: The invention is an improvement in microwave and millimeter wave amplifiers. Capacitors are connected in parallel with the source and drain terminals of all of the amplifying elements in a series of such elements except the first, compensating for current leakage due to gate capacitance. This results in improved synchronism of the amplifying elements, and improved overall efficiency and circuit performance.
    Type: Application
    Filed: May 24, 2011
    Publication date: November 29, 2012
    Inventors: Amin Ezzeddine, Ho C. Huang
  • Publication number: 20120299661
    Abstract: A charge pump of a power amplifier (PA) bias power supply and a process to prevent undershoot disruption of a bias power supply signal of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply pump-up operating mode from the bias supply bypass operating mode before charge pump circuitry in the charge pump is capable of providing adequate voltage to prevent undershoot disruption of the bias power supply signal.
    Type: Application
    Filed: November 29, 2011
    Publication date: November 29, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Stuart Williams, Brian Baxter, Brad Hunkele, Hirofumi Honjo, Roman Zbigniew Arkiszewski, David E. Jones, Chris Levesque, William David Southcombe, Scott Yoder, Terry J. Stockert
  • Publication number: 20120299659
    Abstract: An apparatus for amplifying a signal is provided. The apparatus includes a carrier transistor, a peaking transistor, a controller, and a power supply switching unit, wherein the controller controls the power supply switching unit to switch between two or more power supplies and wherein the power supply switching unit provides power from one of the two or more power supplies to the peaking transistor.
    Type: Application
    Filed: November 18, 2011
    Publication date: November 29, 2012
    Applicant: SAMSUNG ELECTRONICS CO. LTD.
    Inventors: Sandeep Modi SANKALP, Naveen Krishna YANDURU
  • Patent number: 8319559
    Abstract: An active bias control circuit for an amplifier includes a low dropout regulator for providing a regulated voltage to provide an input current to the amplifier, and a current sense circuit responsive to the low dropout regulator for sensing a scaled down replica of the input current to the amplifier. An amplifier control circuit adjusts a control voltage to the amplifier in response to the sensed, scaled down replica of the input current to regulate the input current to the amplifier. A method for power up sequencing an amplifier for an active bias control circuit for the amplifier is also disclosed.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: November 27, 2012
    Assignee: Hittite Microwave Corporation
    Inventors: Fatih Kocer, Frank A. Traut, Yalcin Alper Eken, Katzin Peter
  • Patent number: 8319560
    Abstract: An active bias control circuit for an amplifier includes a switch responsive to a supply voltage for providing an input current to the input of the amplifier, and a current sense circuit coupled to the switch for sensing a scaled down replica of the input current to the amplifier. A first amplifier control circuit is responsive to the current sense circuit for adjusting a first control voltage to the amplifier in response to the sensed, scaled down replica of the input current to regulate the input current to the amplifier. Circuitry for power up sequencing an amplifier for an active bias control circuit for the amplifier is also disclosed.
    Type: Grant
    Filed: October 1, 2010
    Date of Patent: November 27, 2012
    Assignee: Hittite Microwave Corporation
    Inventors: Fatih Kocer, Yalcin Alper Eken, Abdullah Celik, Peter Katzin
  • Patent number: 8319558
    Abstract: The present disclosure relates to RF power amplifier circuitry that may operate as either a Class AB amplifier or as a Class B amplifier based on a magnitude of RF output power provided by the RF power amplifier circuitry. A transistor bias circuit in the RF power amplifier circuitry may control transitioning between operating as the Class AB amplifier and operating as the Class B amplifier. When the magnitude of the RF output power is below a first threshold, the RF power amplifier circuitry may operate as a Class AB amplifier, and when the magnitude of the RF output power is above the first threshold, the RF power amplifier circuitry may operate as a Class B amplifier.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: November 27, 2012
    Assignee: RF Micro Devices, Inc.
    Inventors: Edward T. Spears, Jason Stutzman
  • Publication number: 20120293259
    Abstract: A configurable low noise amplifier circuit which is configurable between a first topology in which the low noise amplifier circuit includes a degeneration inductance stage whereby the low noise amplifier circuit operates as an inductively degenerated low noise amplifier, and a second topology in which the low noise amplifier circuit includes a common-gate low noise amplifier stage whereby the low noise amplifier circuit operates as a common-gate low noise amplifier. The second topology includes one or more internal input impedance matching components and the first topology does not include the one or more internal input impedance matching components.
    Type: Application
    Filed: October 12, 2011
    Publication date: November 22, 2012
    Inventors: Jonne Juhani RIEKKI, Jari Johannes Heikkinen, Jouni Kristian Kaukovuori
  • Publication number: 20120293266
    Abstract: Aspects of a system for improving efficiency over power control for linear and class AB power amplifiers may include a current source circuit that enables determination of a bias current level for a PA circuit within an IC die based on an amplitude of an input modulation signal. The PA circuit may enable generation of an output signal based on a differential input signal and the input modulation signal to the current source circuit. A generated bias voltage may be applied to a transformer external to the IC die, but internal to an IC package containing the IC die and/or a circuit board containing the IC package. One or more amplifier bias voltage levels may be applied to the PA circuit wherein the amplifier bias voltage levels may be derived from the generated bias voltage level and/or the determined bias current level.
    Type: Application
    Filed: August 1, 2012
    Publication date: November 22, 2012
    Inventor: Ahmadreza Rofougaran
  • Publication number: 20120293267
    Abstract: A low-noise amplifier (LNA) includes an input terminal for receiving an input signal, an output terminal for providing an output signal related to the input signal. The LNA further includes a first transistor having a first source coupled to the input terminal through the first capacitor, a first gate configured to receive a first direct current (DC) bias signal, and a first drain coupled to the output terminal. The LNA also includes a second transistor having a second source coupled to the input terminal through the second capacitor, a second gate configured to receive a second DC bias signal, and a second drain coupled to the output terminal.
    Type: Application
    Filed: August 1, 2012
    Publication date: November 22, 2012
    Inventor: Aslamali A. Rafi
  • Publication number: 20120286877
    Abstract: There is provided a power amplifier including an amplifying unit having at least two cascode amplifiers connected in parallel to amplify an input signal; and a bias supply unit supplying bias power to a common gate node of the two cascode amplifiers, and removing a signal of a pre-set frequency band corresponding to a baseband at the common gate node by controlling impedance of the common gate node.
    Type: Application
    Filed: October 13, 2011
    Publication date: November 15, 2012
    Inventors: Bon Hoon KOO, Byeong Hak Jo, Ki Yong Son, Yoo Sam Na, Song Cheol Hong
  • Publication number: 20120286878
    Abstract: Apparatus and methods for electronic amplification are disclosed herein. In certain implementations, an amplifier is provided for amplifying a RF signal, and the amplifier includes a first transistor and a second transistor electrically connected in a Darlington configuration. The first and second transistors can be, for example, bipolar or field effect transistors and the first transistor can amplify an input signal and provide the amplified input signal to the second transistor. The first and second transistors are electrically connected to a power low node such as a ground node through first and second bias circuits, respectively. In certain implementations, the first transistor includes an inductor disposed in the path from the first transistor to the power low voltage. By including the inductor in the path from the first transistor to the ground node, the third order distortion of the amplifier can be improved.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 15, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: David Dening, Alan W. Ake
  • Patent number: 8310313
    Abstract: A highly efficient class-G amplifier includes an amplifier circuit coupled between a positive power rail and a negative power rail to amplify an audio input signal of the class-G amplifier, and a boost inverting power converter to convert a supply voltage to a positive rail voltage and a negative rail voltage on the positive and negative power rails. The boost inverting power converter includes a boost inverting power stage coupled to the positive and negative power rails, and a controller to switch the boost inverting power stage between a boost mode and an inverting mode. An audio level detector detects the audio input signal for the controller to adjust the positive and negative rail voltages. The class-G amplifier has higher efficiency and requires lower cost because it does not need a charge pump.
    Type: Grant
    Filed: October 6, 2010
    Date of Patent: November 13, 2012
    Assignee: Richtek Technology Corp.
    Inventors: Jwin-Yen Guo, Tsung-Nan Wu
  • Patent number: 8299855
    Abstract: A power amplifier system includes a power amplifier element that provides a power output signal in response to a bias signal, and a voltage converter. The voltage converter provides at least one discrete voltage output level to the power amplifier element, where the discrete voltage output level is used to develop the bias signal.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: October 30, 2012
    Assignee: Skyworks Solutions, Inc.
    Inventors: James P. Young, Ying Shi
  • Publication number: 20120268212
    Abstract: An amplifier arrangement comprising an amplifier (AMP) with a terminal (SPL) for a supply signal (VSPL) and a bias circuit (BIAS) for providing the supply signal (VSPL) at the terminal (SPL). The bias circuit holds an operating point (OP) of the amplifier (AMP) constant by means of the supply signal (VSPL). The bias circuit (BIAS) comprises a reference circuit (REF) for providing a reference signal (VREF) and a correction device (COR) by means of which the supply signal (VSPL) is regulated based on the reference signal (VREF) and a correction signal (Vfeed), the correction signal (Vfeed) being dependent on the operating point (OP) of the amplifier (AMP). A method for operating an amplifier arrangement is also described.
    Type: Application
    Filed: March 23, 2012
    Publication date: October 25, 2012
    Applicant: austriamicrosystems AG
    Inventor: Thomas CHRISTEN
  • Publication number: 20120268209
    Abstract: An embodiment includes a first amplification device receiving a high frequency signal in an upstream stage in an initial stage unit and having a predetermined thermal time constant, a second amplification device in a downstream stage cascade-connected to the first amplification device and having a thermal time constant different from that of the first amplification device, and a final stage amplification device cascade-connected in a final stage downstream of the second amplification device.
    Type: Application
    Filed: December 20, 2011
    Publication date: October 25, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Haruo KOJIMA
  • Patent number: 8295794
    Abstract: A power control system includes a transmitter having a plurality of gain-adjustable elements, a switchable attenuator located at an output of the transmitter, a gain-adjustable power amplifier coupled to the attenuator, and a power control element responsive to a power target signal, the power control element configured to calculate and apply a gain control signal to the plurality of gain-adjustable elements in the transmitter, to the switchable attenuator, and to the gain-adjustable power amplifier so that a signal to noise ratio (SNR) at the output of the transmitter remains substantially constant over a range of output power.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: October 23, 2012
    Assignee: Skyworks Solutions, Inc.
    Inventor: Bipul Agarwal
  • Patent number: 8294521
    Abstract: Provided is a power amplifier including: a depletion mode high electron mobility transistor (D-mode HEMT) configured to amplify a signal inputted to a gate terminal and output the amplified signal through a drain terminal; an input matching circuit configured to serially ground the gate terminal; and a DC bias circuit connected between the drain terminal and a ground. Through the foregoing configuration, the HEMT may be biased only by a single DC bias circuit without any biasing means to provide a negative voltage. Also, superior matching characteristic may be provided in various operation frequency bands through a shunt inductor and a choke inductor.
    Type: Grant
    Filed: August 12, 2010
    Date of Patent: October 23, 2012
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Dong Min Kang, Hong Gu Ji, Hokyun Ahn, Jong-Won Lim, Woojin Chang, Sang-Heung Lee, Dong-Young Kim, Hae Cheon Kim
  • Patent number: 8294519
    Abstract: A power amplifying apparatus according to an embodiment includes a first amplifying unit having a first amplifying element to amplify an input signal, a second amplifying unit having a second amplifying element to amplify an output signal from the first amplifying unit; and a bias supply unit giving bias values to the first amplifying element and the second amplifying element, respectively, the bias values causing the first amplifying element and the second amplifying element to operate in a non-linear region.
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: October 23, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Ryo Mochizuki, Takao Kato
  • Patent number: 8294523
    Abstract: An audio amplifier circuit has a first cascode stage configured as a voltage gain stage and having an input for an audio signal, and an output. The circuit has a second cascode stage configured as a unity gain or near unity gain stage and having an input to receive an output from the first cascode stage, and a low impedance output to drive an output stage of an audio power amplifier. The first cascode stage has a first, input transistor having an input biased to a predetermined bias voltage, and a second, output transistor arranged to drive the second cascode stage. The first, input transistor of the first cascode stage may have a common-emitter configuration, and the second, output transistor may have a common-base configuration. The invention extends to an audio amplifier which includes a circuit of the invention.
    Type: Grant
    Filed: September 8, 2009
    Date of Patent: October 23, 2012
    Inventor: Clive Thomas
  • Patent number: 8289084
    Abstract: An RF power amplifier device includes a driver stage amplifier, a first RF amplifier, a second RF amplifier and a DC voltage converter operated by first, second and third external power supply voltages. The output of the driver stage amplifier is supplied to the inputs of the first and second RF amplifiers. An effective device size of the first RF amplifier is set to a device size larger than that of the second RF amplifier. The third external power supply voltage is supplied to the DC voltage converter, so that the DC voltage converter generates a fourth operating power supply voltage corresponding to a low voltage and supplies it to an output terminal of the second RF amplifier. An output terminal of the first RF amplifier can be supplied with the second external power supply voltage without via the DC voltage converter.
    Type: Grant
    Filed: May 26, 2011
    Date of Patent: October 16, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Takaaki Morimoto, Akira Kuriyama, Satoshi Tanaka, Hayato Nakamura
  • Publication number: 20120256691
    Abstract: A semiconductor device according to an exemplary aspect of the invention is capable of being selectively switched between an oscillation circuit and a signal input-output circuit, and includes first and second external connecting terminals that are connectable to an oscillation device; an inverting amplifier an input side of which is electrically connected to the first external connecting terminal through a coupling capacitor and an output side of which is electrically connected to the second external connecting terminal; a feedback resistor connected to the input side and the output side of the inverting amplifier; a bias stabilization circuit that stabilizes a bias applied to the coupling capacitor; a first signal input-output portion connected to the first external connecting terminal; and a second signal input-output portion connected to the second external connecting terminal.
    Type: Application
    Filed: June 18, 2012
    Publication date: October 11, 2012
    Inventors: Kazutoshi Sako, Tomokazu Matsuzaki, Kouji Yokosawa
  • Publication number: 20120242412
    Abstract: An auto bias system, device and/or method for automatically controlling the bias or quiescent point of at least one vacuum tube including separating bias current flow from signal current flow for controlling the bias/quiescent point by algorithmically adjusting the grid bias voltage whilst monitoring the cathode current to establish the correct bias current.
    Type: Application
    Filed: March 26, 2012
    Publication date: September 27, 2012
    Inventor: Peter Fletcher-Haynes
  • Publication number: 20120242411
    Abstract: An operational amplifier providing an output voltage signal to drive a load in response to an input voltage signal is provided. The operational amplifier includes a first input stage and a second input stage, a second stage and an output enable switch. The first input stage provides a first intermediate signal according to the voltages of an input and an output voltage signals in a transitional state. The second input stage provides a second intermediate signal according to the input and the output voltage signals in a steady state. The second stage provides the output voltage signal to an output node according to the first and the second intermediate signals in the transitional and the steady states respectively. The output enable switch is enabled in an output enable period to drive the load with the output voltage signal.
    Type: Application
    Filed: March 23, 2012
    Publication date: September 27, 2012
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Po-Yu TSENG, Jin-Lin Huang, Keko-Chun Liang
  • Publication number: 20120235750
    Abstract: In one embodiment, an amplification device has a temperature differential sensing circuit that reduces a local thermal memory effect. The amplification device may include an amplification circuit and biasing circuitry. The amplification device is operable to receive an input signal and generate and amplified output signal. The biasing circuitry generates a biasing signal that sets the quiescent operating level of the amplified output signal. The temperature differential sensing circuit provides a bias level adjustment signal that adjusts the biasing signal to maintain the quiescent operating level of the amplified output signal at a desired level.
    Type: Application
    Filed: March 16, 2011
    Publication date: September 20, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: Marcus Granger-Jones, Wayne Kennan
  • Publication number: 20120235746
    Abstract: An amplifier comprising at least one amplifying element (20a, 25a) and a biasing circuit (32a, 32b) for biasing the or each amplifying element with a bias voltage is disclosed. The biasing circuit (32a, 32b) is adapted to vary the bias voltage such that the or each amplifying element switches between non-switching and switching modes of operation in response to a bias control signal (4) passing through a threshold value.
    Type: Application
    Filed: March 7, 2012
    Publication date: September 20, 2012
    Applicant: NXP B.V.
    Inventors: Kim Li, Simon Peter Goddard
  • Patent number: 8269559
    Abstract: In an amplifying device, an amplification unit includes a first amplifier which amplifies a signal and a second amplifier which amplifies a signal when the signal has a predetermined level or more. A detector detects a temperature change. A calculation unit calculates an adjacent channel leakage power ratio of an output signal output from the amplification unit based on detection of the temperature change of the detector. A controller controls gate biases of the first and second amplifiers based on the adjacent channel leakage power ratio calculated by the calculation unit.
    Type: Grant
    Filed: March 3, 2011
    Date of Patent: September 18, 2012
    Assignee: Fujitsu Limited
    Inventor: Tsuneaki Tadano
  • Patent number: 8269560
    Abstract: There is provided a power amplifying apparatus including: a power amplifier; a power regulator providing a driving voltage and a driving current corresponding to a control voltage to the power amplifier; a current sensing unit sensing a current and a voltage corresponding to the driving current and controlling the driving voltage according to the sensed current; a current control unit controlling a current bias according to the sensed voltage of the current sensing unit; and a current bias circuit unit controlling a bias current of the power amplifier according to the controlling of the current control unit.
    Type: Grant
    Filed: April 26, 2011
    Date of Patent: September 18, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jun Kyung Na, Youn Suk Kim, Sang Hoon Ha, Shinichi Iizuka, Sang Wook Park
  • Publication number: 20120229218
    Abstract: According to one embodiment, a circuit for compensating fluctuation of a base current of a transistor is presented. The transistor has a base connected with an input terminal. The compensation circuit is provided with a first transistor, a current mirror circuit and a second transistor. The current mirror circuit mirrors a current which is supplied to a base of the first transistor. Further, the current mirror circuit supplies the obtained mirror current to the base of the transistor to be compensated. A base of the second transistor is connected with the input terminal electrically. The second transistor causes an early effect in the first transistor.
    Type: Application
    Filed: September 15, 2011
    Publication date: September 13, 2012
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Akira Saito
  • Publication number: 20120223776
    Abstract: A power supply controller controls the power supply voltage provided to a multi-gain step RF power amplifier to increase the efficiency of the RF power amplifier when the different gains of the RF power amplifier are selected and, thereby, reduce the power consumed by the multi-gain step RF power amplifier.
    Type: Application
    Filed: March 1, 2011
    Publication date: September 6, 2012
    Inventors: William Otis Keese, Bhaskar Ramachandran, Jane Xin-Leblanc
  • Publication number: 20120224443
    Abstract: A sense amplifier includes a first transistor, a second transistor, an output circuit, and a shielding circuit. The first transistor has a gate bias established by a cell current, and the second transistor has a gate bias established by a reference current. The output circuit is coupled to the first and the second transistor. The shielding circuit is located between the second transistor and the output circuit.
    Type: Application
    Filed: May 17, 2012
    Publication date: September 6, 2012
    Applicant: MACRONIX INTERNATIONAL CO., LTD.
    Inventors: Chung-Kuang Chen, Han-Sung Chen, Chun-Hsiung Hung
  • Patent number: 8258875
    Abstract: A power amplifier system is provided that includes a power amplifier configured to receive an RF input. A DC-DC converter is coupled to the power amplifier. Clocking circuits drive the DC-DC converter. The clocking circuits use the RF input to generate a clock. The clock acts with the DC-DC converter to provide an output voltage used in the power amplifier.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: September 4, 2012
    Assignee: Amalfi Semiconductor, Inc.
    Inventors: Malcolm Smith, Matthew Anthony Mow
  • Patent number: 8253492
    Abstract: A variable gain amplifier includes a direct current (DC) blocking capacitor which receives an input signal at a first terminal, a variable amplifier unit, having a variable transistor size, which amplifies an output of a second terminal of the DC blocking capacitor, a load impedance unit coupled to an output of the variable amplifier unit, a bias resistor having a first terminal coupled to the second terminal of the DC blocking capacitor, a variable bias voltage generator which applies a variable bias voltage to a second terminal of the bias resistor, and a gain controller which provides control to decrease the variable bias voltage when an effective transistor size of the variable amplifier unit is controlled so as to increase, and provides control to increase the variable bias voltage when the effective transistor size of the variable amplifier unit control is controlled so as to decrease.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: August 28, 2012
    Assignee: Panasonic Corporation
    Inventors: Katsumasa Hijikata, Mineyuki Iwaida
  • Patent number: 8248163
    Abstract: A system for preventing power amplifier supply voltage saturation includes a multiple stage voltage regulator configured to provide a regulated voltage, a power amplifier configured to receive the regulated voltage, and a saturation protection circuit configured to apply a current into a first stage of the multiple stage voltage regulator when the regulated voltage reaches a reference voltage, the applied current causing a subsequent stage of the multiple stage voltage regulator to prevent the regulated voltage from exceeding the reference voltage.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: August 21, 2012
    Assignee: Skyworks Solutions, Inc.
    Inventor: Lige Wang
  • Patent number: 8242845
    Abstract: A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: August 14, 2012
    Assignee: STMicroelectronics SA
    Inventors: Didier Belot, Laurent Leyssenne, Eric Kerherve, Yann Deval
  • Publication number: 20120200360
    Abstract: An amplifier for amplifying a radio signal to a defined power output level is presented, wherein the amplifier comprises an amplifier input port, an amplifier output port, a first transistor for amplifying the radio signal received at a first transistor control input, wherein a first transistor output of the first transistor is supplied by a first power source; a at least second transistor for supplying the first transistor from a at least second power supply source. The at least second power supply source is added by the at least second transistor as a function of the power output level of the amplifier.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 9, 2012
    Inventor: Udo Karthaus
  • Patent number: 8237508
    Abstract: A power amplifier comprises: an amplifier transistor; a bias circuit supplying bias current to the amplifier transistor; and a collector voltage terminal connected to a collector of the amplifier transistor. The bias circuit includes: a reference voltage terminal into which a reference voltage is input; a power terminal connected to a power source; a transistor having a control terminal connected to the reference voltage terminal, a first terminal connected to the power terminal, and a second terminal that is grounded. The transistor supplies a bias current corresponding to the reference voltage to the amplifier transistor; a variable capacitor connected between the first terminal and a grounding point; and a logic circuit controlling capacitance of the variable capacitor.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: August 7, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Suguru Maki
  • Patent number: 8237507
    Abstract: Aspects of a method and system for transmitter linearization are provided. A signal may be amplified via one or more circuits comprising a first transistor having a first bias voltage applied to its gate via a resistor, and a second transistor having its source coupled to a first terminal of the resistor, its drain coupled to a second terminal of the resistor, and its gate coupled to a second bias voltage. The signal may be AC-coupled, via one or more capacitors, for example, to the gate of the first transistor. The first bias voltage and the second bias voltage may be such that the first transistor operates in the active region the second transistor operates in the subthreshold region. The effective channel width of the second transistor may be configurable during operation of the one or more circuits.
    Type: Grant
    Filed: March 14, 2011
    Date of Patent: August 7, 2012
    Assignee: Broadcom Corporation
    Inventors: Ahmad Mirzaei, Hooman Darabi
  • Patent number: 8237504
    Abstract: A method of fabricating a solid state power amplifier (SSPA) having variable output power is provided. The method includes coupling a first transistor device to a second transistor device and biasing a drain input of each of the first and second transistor device. Further, the method includes biasing a gate input of each of the first and second transistor device varying a drain to source current of each of the first and second transistor device to enable the SSPA to maintain high power added efficiency (PAE) and consistent linearity over a range of output power levels.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: August 7, 2012
    Assignee: Lockheed Martin Corporation
    Inventors: Shabbir S. Moochalla, William J. Taft, Johan Ramirez
  • Publication number: 20120194276
    Abstract: A low noise amplifier includes a first Group III-nitride based transistor and a second Group III-nitride based transistor coupled to the first Group III-nitride based transistor. The first Group III-nitride based transistor is configured to provide a first stage of amplification to an input signal, and the second Group III-nitride based transistor is configured to provide a second stage of amplification to the input signal.
    Type: Application
    Filed: May 18, 2011
    Publication date: August 2, 2012
    Inventor: Jeremy Fisher
  • Publication number: 20120188020
    Abstract: Embodiments of circuits, methods and systems for a voltage-controlled current source are disclosed. In some embodiments, the voltage-controlled current source may be a three-terminal device having separated gate structures. Other embodiments may also be described and claimed.
    Type: Application
    Filed: January 26, 2011
    Publication date: July 26, 2012
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventor: Haoyang Yu
  • Patent number: 8228124
    Abstract: A class G headphone amplifier circuit with improved power efficiency and low EMI. It may use an automatic signal level detector to detect the signal level of incoming signals and determine positive and negative power supplies for headphone amplifiers accordingly. A voltage generator may generate pairs of differential output voltages at a plurality of amplitude steps, and supply to headphone amplifiers the pair with the amplitude determined by the automatic signal level detector. As a result, headphone amplifiers are biased according to the input signal level, and the multiple voltage rails may improve power efficiency and avoid clipping.
    Type: Grant
    Filed: January 3, 2011
    Date of Patent: July 24, 2012
    Assignee: Analog Devices, Inc.
    Inventors: Jinghua Ye, Hui Shen, Danny Li
  • Patent number: 8222959
    Abstract: There is provided an amplification control circuit that can adjust the amount of current being supplied to an amplifier according to a reference signal set beforehand. An amplification control circuit according to an aspect of the invention may include: a power supply section supplying a DC power set beforehand to at least one amplifier according to a reference signal set beforehand; a current control section detecting a current being supplied from the power supply section according to a ratio set beforehand and controlling the amount of current being supplied to the at least one amplifier from the power supply section; and a current adjustment section adjusting a level of the current being controlled by the current control section in order to increase or decrease the amount of current being supplied to the at least one amplifier from the power supply section.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: July 17, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventor: Dae Seok Jang
  • Patent number: 8217722
    Abstract: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: July 10, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventors: Kazuya Yamamoto, Miyo Miyashita, Satoshi Suzuki, Takayuki Matsuzuka
  • Patent number: 8212619
    Abstract: Disclosed are circuits, techniques and methods for buffering a high frequency signal for transmission over an integrated circuit. In one particular implementation, a plurality of amplification circuits are individually biased for amplifying a signal from a voltage controlled oscillator and/or digitally controlled oscillator to provide a local oscillator signal on a device.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: July 3, 2012
    Assignee: QUALCOMM, Incorporated
    Inventors: Yiping Han, Rajagopalan Rangarajan
  • Patent number: 8212605
    Abstract: A temperature compensation circuit includes a bias circuit configured to output a bias current having a current value increasing in proportion to an absolute temperature in a low-temperature region in which a temperature is lower than a predetermined temperature, and having a greater current value than the current value proportional to the absolute temperature in a high-temperature region in which the temperature is equal to or greater than the predetermined temperature, and a transistor having a control terminal supplied with the bias current.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: July 3, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Horie, Minoru Nagata
  • Publication number: 20120161877
    Abstract: A charge pump of a PA bias power supply, PA bias circuitry, and a process to optimize efficiency of the PA bias power supply are disclosed. The charge pump operates in one of multiple bias supply pump operating modes, which include at least a bias supply pump-up operating mode and a bias supply bypass operating mode. The process prevents selection of the bias supply bypass operating mode unless a DC power supply voltage is adequate to allow the PA bias circuitry to provide minimum output regulation voltage at a specified current. Otherwise, the bias supply pump-up operating mode is selected. The charge pump operates more efficiently in the bias supply bypass operating mode than in the bias supply pump-up operating mode; therefore, selection of the bias supply bypass operating mode, when possible, increases efficiency.
    Type: Application
    Filed: November 3, 2011
    Publication date: June 28, 2012
    Applicant: RF MICRO DEVICES, INC.
    Inventors: William David Southcombe, Chris Levesque, Jean-Christophe Berchtold, Wonseok Oh, David E. Jones, Scott Yoder, Terry J. Stockert
  • Publication number: 20120161878
    Abstract: This disclosure provides systems, apparatus, and methods for switching a portion of a power amplifier on and off during different modes of operation. In one aspect, a control circuit can include separate switches to provide bias currents to different portions of a power amplifier. The control circuit can include another switch to electrically connect outputs of the separate switches in a first mode of operation (for example, a high power mode) and electrically isolate the outputs of the separate switches in a second mode of operation (for example, a low power mode). In some implementations, a circuit element, such as a field effect transistor or a diode, can turn off one of the separate switches in the second mode. Alternatively or additionally, another circuit element, such as a field effect transistor or a diode, can prevent a power amplifier portion from turning on in the second mode.
    Type: Application
    Filed: December 21, 2011
    Publication date: June 28, 2012
    Applicant: SKYWORKS SOLUTIONS, INC.
    Inventors: Christophe M. Joly, Yue Chen, Shihui Xu