Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: A filtering method, a transceiver and a transmitter are provided. The transmitter comprises a power amplifier amplifying an RF signal and having multiple stages, and a local oscillator, the power amplifier comprising between at least two stages of the power amplifier an impedance circuitry for forming an impedance at a frequency related to the frequency of the local oscillator, and a switch for switching the impedance of the impedance circuitry means to RF frequency.

Abstract: A differential to single ended converting circuit includes a transconductance circuit having input terminals for receiving differential input voltages and having a first current output terminal for outputting a first current and a second current output terminal for outputting a second current; an offset cancellation circuit having a first controllable current source connected to the first current output terminal and a second controllable current source connected to the second current output terminal; a first transimpedance circuit having an input terminal connected to the first current output terminal and an output terminal for outputting a first voltage; a second transimpedance circuit having an input terminal connected to the second current output terminal and an output terminal for outputting a second voltage; and a first inverter having an input terminal connected to the output terminal of the first transimpedance circuit and an output terminal for outputting a first single ended output voltage.

Abstract: An inverting stage is coupled between a single-ended in-put node and a first differential output node, and a non-inverting stage is coupled between the single-ended input node and a second differential output node. The inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the first differential output node and the control terminal being coupled to a single-ended input node. The non-inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the second differential output node, and the second terminal being coupled to the single-ended input node. A bias current of the inverting stage is larger than a bias current of the non-inverting stage.

Abstract: A single-ended to differential converting apparatus includes a first amplifier configured to output a first voltage signal corresponding to a single phase input signal; and a second amplifier configured to output a second voltage signal corresponding to the first voltage signal, where a first load of the first amplifier, an input transistor of the second amplifier, and a second load of the second amplifier have identical mutual conductance.

Abstract: A BALUN circuit (20) for low voltage operation for receiving single ended input signal at an input terminal (24) and providing a differential output signal across a pair of output terminals (OUT+, OUT?) is disclosed. The BALUN circuit (20) comprises a first branch including an input terminal (24) for receiving a single ended input voltage signal (RFin), a transistor (Q1), a resistance (R1) (28), a resistance (RL), and an output terminal (OUT+). A second branch includes a transistor (Q3), a resistance (RL) and an output terminal (OUT?). An operational amplifier (26) maintains current flowing through the resistances RL in the first and second branches substantially equal to each other, in dependence upon the output voltage signal across the output terminals (OUT+, OUT?).

Abstract: The invention relates to a receiver (1) comprising an amplifier (31-34) for amplifying an antenna signal, which amplifier (31-34) comprises an amplifier input (11a) and an amplifier output (12a, 12b), the amplifier input (11a) being a single ended input for receiving the antenna signal, the amplifier output (12a, 12b) being a differential output, and the amplifier (31-34) comprising a circuit (54) for compensating a series input impedance of the amplifier (31-34).

Abstract: Embodiments of the invention may provide for systems and methods for providing a power amplifier with integrated passive device, thereby improving the performance of the power amplifier. The power amplifier may include a signal amplification section, a power combining section, and a coupling device section that interconnects the signal amplification section and the power combining section. The signal amplification section may be implemented on a first substrate, and the power combining section may be implemented on a second substrate, where the first substrate and the second substrate may be different. The power combining section may be implemented by the integrated passive device (IPD) that may have characteristics of high performance passive device with flexibility of implementing diverse functions, including a notch filter, a low pass filter, and/or bypass capacitance for bias network. The power combining section implemented by the integrated passive device may have an improved power combining efficiency.

Abstract: The present invention relates to the field of electronic devices known as baluns. It concerns an active balun which is broadband and reciprocal. Embodiments of the invention integrate an active splitter balun with an active combiner balun so as to form three transmission lines. A first active coupling is provided between the first and second transmission lines and a second active coupling is provided between the first and third transmission lines. The active couplings are provided by means of amplifier cells distributed along the transmission lines. Embodiments of the invention have configurable means for polarizing the different amplifier cells so as to create a specific coupling direction between the various transmission lines. The device according to the invention can be applied in the field of broadband mixers which are used, notably, in radio transmission and reception circuits.

Abstract: An active balun with Darlington pairs obtains a wideband operation. With differential output signals, a size of the active balun is minimized. The present invention can be applied to a transceiver. With a wideband amplitude match and 180° out of phase, the performance of the transceiver is improved by the present invention for a few wide applications.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.

Abstract: A high-efficiency single-to-differential amplifier has a first transistor acting as a first amplification stage. A second transistor, a third transistor, a first choke, a second choke, and a first capacitor form a second single-to-differential amplification stage. The first amplification stage receives and amplifies an input signal, outputs the amplified signal to the second single-to-differential amplification stage through a coupling module, and concurrently provides DC bias current to the second single-to-differential amplification stage through a tank. The second single-to-differential amplification stage reuses DC current of the first amplification stage, amplifies the output signal of the first amplification stage, and transfers it to a differential output.

Abstract: A method and system to use floating differential output amplifiers wired in series and parallel to achieve arbitrary output drive voltage and current for the applications load. One embodiment includes the use of multiple differential amplifiers wired in series to generate a high voltage differential amplifier, while only partially using no-feedback buffer amplifiers and obtaining performance equivalent to an implementation that uses only buffer amplifiers. This is achieved by forcing the mismatch errors of conventional amplifiers to become power supply ripple. A second embodiment includes the use of a power supply centering technique to implement a floating asymmetrical differential amplifier. A third embodiment includes the use of multiple floating differential amplifiers, sharing a common power supply with individual biasing and isolation of each section of the amplifier, to allow high power amplifiers to be built with an arbitrary number of low power modules.

Abstract: A single-ended input to differential-ended output amplifier circuit comprises an amplifier for amplifying an input signal into an amplified signal comprises an input for receiving the input signal; and a first input and a single-ended input to differential-ended output conversion circuit to convert the amplified signal to a differential signal pair, comprising a first transistor for receiving the amplified signal having a first gate coupled to the first output, a first first terminal coupled to a second output, and a first second terminal coupled to a first node; a second transistor having a second gate, a second first terminal coupled to a third input, and a second second terminal coupled to the first node; a second capacitor coupled between the second output and the second gate; a first and a second resistors and the voltage source; and a current source coupled between the first node and a ground.

Abstract: A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the

Abstract: Aspects of a method and system for a low power fully differential noise canceling low noise amplifier (NC LNA) are provided. The NC LNA may receive signals via a single ended input and may generate an amplified symmetric differential output from the received signals. The NC LNA may utilize capacitor dividers, such as a capacitor bank, in the single ended input in order to provide impedance transformation that enables low power operation and matching to an input port. The NC LNA may generate one portion of the amplified symmetric differential output via a voltage divider, which may comprise a plurality of capacitors, such as a capacitor bank. The NC LNA may be implemented utilizing one or more circuits.

Abstract: There is provided an active balun circuit including: a load circuit unit including a first and a second load; a differential amplifying unit including a first amplifying unit connected to the first load, and a second amplifying unit connected to the second load and forming a differential amplifying unit together with the first amplifying unit, the differential amplifying unit differentially amplifying an input signal, and outputting first and second output signals out-of-phase with each other through first and second output terminals, respectively; a current source connected between a ground and a common connection node of the first and second amplifying units, and maintaining a constant amount of current flowing through the differential amplifying unit; and a compensation amplifying unit amplifying the input signal supplied through the input terminal, transmitting the amplified input signal to the second amplifying unit, and rejecting common mode noise of the differential amplifying unit.

Abstract: Techniques for improving the quality factor (“Q”) of a balun in the presence of loading stages are disclosed. In an exemplary embodiment, the ground node of a balun secondary (single-ended) element is connected to a source node of an amplifier stage via a common ground node. The connection may be made physically short to minimize any parasitic elements. In another exemplary embodiment, the common ground node may be coupled to an off-chip ground voltage via a peaking inductor. The peaking inductor may be implemented on-chip, e.g., as a spiral inductor, or off-chip e.g., using bondwires.

Abstract: An inverting stage is coupled between a single-ended in-put node and a first differential output node, and a non-inverting stage is coupled between the single-ended input node and a second differential output node. The inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the first differential output node and the control terminal being coupled to a single-ended input node. The non-inverting stage includes at least one transistor with a first current terminal, a second current terminal, and a control terminal, the first current terminal being coupled to the second differential output node, and the second terminal being coupled to the single-ended input node. A bias current of the inverting stage is larger than a bias current of the non-inverting stage.

Abstract: A signal converter includes a signal converting unit and a compensation unit. The signal converting unit generates intermediate differential signals at intermediate nodes in response to a single-ended signal. The compensation unit generates compensated differential signals at output nodes by minimizing phase and amplitude mismatch errors between the intermediate differential signals. The compensation unit includes a pair of transistors and a pair of capacitors configured in symmetry between the intermediate and output nodes. The signal converter of the present invention may be used to particular advantage in an RF receiver.

Abstract: The invention relates to a preamplifier circuit with at least one transistor that couples a signal input to a signal output. The signal input is supplied with a radio-frequency signal. In addition, the preamplifier circuit includes a switch that switchably couples the input to a reference potential and which, when the preamplifier is inactive, is closed. Hence, when the preamplifier is inactive, the input is put into a low-impedance state and the amplifier and downstream assemblies are protected from unwanted high-power interference signals. It is thus also possible to use other, fully integratable filter types in a transceiver's reception signal processing chain instead of external surface acoustic wave filters with a low level of complexity and without drawbacks.

Abstract: Example embodiments of the invention may provide for active baluns. An example active balun may include a resonator that may convert a single-ended input signal to at least two differential input signals, and a differential switching block that includes first and second transistors that each receive a respective one of the at least two differential input signals from the resonator, where the first and second transistors may be cross-coupled to each other to provide a first differential output signal and a second differential output signal. An example active balun may further include one or more loads connected to the first and second differential output signals, and one or more stacked inverters that may provide a first output port and a second output port, where the first output port may be responsive to the first differential output signal and the second output port may be responsive to the second differential output signal.

Abstract: Aspects of a method and system for processing signals via an integrated low noise amplifier having a configurable input signaling mode are provided. For an unbalanced input signal, a first input terminal of the LNA may be communicatively coupled to ground via an inductance and a bias point of the LNA may be communicatively coupled to a first bias voltage. For a balanced input signal, the first input terminal of the LNA may be communicatively coupled to the balanced signal and the bias point may be communicatively coupled to a second bias voltage. The LNA may comprise a center-tapped differential inductor which may be coupled to an output terminal of the LNA and may enable the LNA to output differential signals regardless of the input signaling mode. In various embodiments of the invention, the LNA may be utilized to amplify GNSS signals such as GPS signals.

Abstract: There is provided a radio frequency (RF) signal amplifying device consuming less power and operable at a high voltage in a PA driving amplifying apparatus applicable to a PA amplifying circuit which amplifies power of an RF signal. The RF signal amplifying device includes: a balun converting an unbalanced radio frequency signal into a balanced radio frequency signal; a primary amplifier differentially amplifying the balanced radio frequency signal from the balun; and at least one secondary amplifier secondarily and differentially amplifying the balanced radio frequency signal amplified from the primary amplifier.

Abstract: The present invention relates to a voltage-to-current transconductance stage arrangement comprising a single-ended input, an emitter-coupled pair of transistors, comprising a first transistor and a second transistor, the emitter of a third transistor, being connected to the collector of said first transistor, and differential output. It further comprises at least one common-collector transistor comprising a fourth transistor connected to the base of said second transistor preferably or optionally also and a fifth transistor connected to the base of said third transistor. The size of said fourth, or fourth and fifth transistors considerably exceed the sizes of said second and third transistors. They are biased at ‘off-state’. An extra inductor at the collector of the transistor may be applied to further increase linearity.

Abstract: An electronic circuit comprising a transistor-based RF (radio frequency) power amplifier (112) having balanced outputs (172, 176), a transistor-based receiver RF amplifier (116) having balanced inputs (152, 156) ohmically connected to said balanced outputs (172, 176) respectively of said RF power amplifier (112), and a balun (114) having a primary (182, 186) and a secondary (188), said primary (182, 186) having primary connections and a supply connection (185) of said primary (182, 186) intermediate said primary connections and said primary connections ohmically connected both to said balanced outputs (172, 176) of said RF power amplifier (112) respectively and to said balanced inputs (152, 156) of said receiver RF amplifier, thereby to switchlessly couple RF between the balun (114) and the RF power amplifier (112) and switchlessly couple RF between the balun (114) and the receiver RF amplifier (116). Other electronic circuits, processes, devices and systems are disclosed.

Abstract: A linear high powered integrated circuit amplifier includes a plurality of power amplifiers, balanced integrated circuit coupling, and a combining circuit. The balanced integrated circuit coupling couples a signal to the plurality of power amplifiers to the up-conversion module such that the power amplifiers amplify the signal to produce a plurality of amplified radio frequency (RF) signals. The combining circuit is operably coupled to combine the plurality of amplified RF signals to produce a high-powered amplified signal.

Abstract: A radio frequency (RF) front end circuit includes a transformer coupled to a switch. The transformer converts a balanced transmit signal to an unbalanced transmit signal and converts an unbalanced receive signal to a balanced receive signal. The switch is configured to operate in first and second states. In the first state, the switch receives the unbalanced transmit signal from the transformer and transfers the unbalanced transmit signal to an amplifier and receives an amplified transmit signal from the amplifier and transfers the amplified transmit signal to a band pass filter. In the second state, the switch receives a filtered receive signal from the band pass filter and transfers the filtered receive signal to the transformer.

Abstract: A balanced power amplifier that is insensitive to load line variations is provided. The balanced power amplifier is suitable for use in wireless transmitter applications, such as cellular telephones, mobile computing devices, and portable communication devices. An embodiment of such a balanced power amplifier includes an input coupler, first and second amplifier devices, and a level adjustment component. The input coupler generates a first signal component and a second signal component from an input signal, where the first signal component and the second signal component are out of phase relative to one another. The first amplifier device generates a first output signal that is influenced by the first signal component, and the second amplifier device generates a second output signal that is influenced by the second signal component. The level adjustment component is coupled between the input coupler device and the input of the first amplifier device.

Abstract: A converting circuit for converting differential signals to a single-ended signal. The converting circuit comprises a cascode amplifier comprising a first transistor and a second transistor, wherein the first transistor comprises a control terminal, a first terminal, and a second terminal, the control terminal to which one of the differential signals is input, the control terminal being electrically-grounded; and, the second transistor comprises a first terminal and a second terminal, the first terminal of the second transistor being connected to the first terminal, the second terminal of the second transistor from which output signal is outputted, a capacitor for adjusting the phase, the capacitor being connected to the second terminal; and a current source being connected to the second terminal.

Abstract: A magnetic field tolerant amplifier having an amplifier stage, a differential to single-ended output amplifier stage and a first and second delay line. In another embodiment the invention relates to a magnetic gradient cancellation delay line including two coils connected in series at a junction and non-inductively wound to cancel induced currents from magnetic gradient. In another embodiment the invention relates to a patient lead including a flexible circuit substrate having a flexible conductor having distributed impedance. In still yet another embodiment the invention relates to a wireless transceiver system including an RF cancellation delay line; a differential amplifier stage; a differential to single ended output amplifier stage; an A/D converter; an RF transceiver and an antenna.

Abstract: An RF amplifier can include a differential inductor for single-ended-to-differential signal conversion. With a center tap of the differential inductor coupled to signal ground and the RF input signal coupled to one of the end taps of the inductor, the negative of the RF input signal is obtained at the other end tap of the inductor. The differential RF signal produced can be coupled to a differential transistor amplifier that has cross-coupling capacitances, improving the signal balance of the differential output signal.

Abstract: Various embodiments for converting a differential signal to a single ended signal are disclosed. The embodiments comprise a transistor pair for receiving a differential signal; and a tank circuit coupled to the transistor pair. The tank circuit includes a first inductor and one or more capacitors. The embodiments also include a second inductor magnetically coupled to the first inductor to form a balanced/unbalanced inductor (BIMI) arrangement. The BIMI arrangement directly converts the differential signal to a single ended signal.

Abstract: A differential amplifier is formed from a first single-ended amplifier circuit, a second single-ended amplifier circuit, and a four-port transformer circuit coupled to the first and second single-ended amplifier circuits to form the differential amplifier.

Abstract: An active balun with Darlington pairs obtains a wideband operation. With differential output signals, a size of the active balun is minimized. The present invention can be applied to a transceiver. With a wideband amplitude match and 180° out of phase, the performance of the transceiver is improved by the present invention for a few wide applications.

Abstract: An amplifier circuit with a voltage interpolation function includes an N-type differential pair and a P-type differential pair. The N-type differential pair includes a first transconductance value, and has a first differential input terminal coupled to a first voltage and a second differential input terminal coupled to a voltage output terminal. The P-type differential pair includes a second transconductance value, and has a first differential input terminal coupled to a second voltage and a second differential input terminal coupled to the voltage output terminal. The N-type differential pair and the P-type differential pair are further coupled to the voltage output terminal through an output stage, and voltages outputted by the voltage output terminal are interpolation results of the first voltage and the second voltage weighted by the first transconductance value and the second transconductance value.

Abstract: One embodiment provides an integrated circuit including an input stage and an impedance. The input stage is configured to receive a single-ended input signal and provide a differential output signal. The impedance is configured to receive the single-ended input signal and provide compensation to the input stage to provide symmetrical differential signals in the differential output signal.

Abstract: Provided is a wideband active balun circuit based on a differential amplifier. The active balun circuit is configured to compensate for unbalance between two differential signals and can be applied to wideband systems, such as software defined radio (SDR) systems or ultra wideband (UWB) systems. Also, when signal unbalance is caused by changes in process conditions, such as temperature, errors in amplitude and phase between the two differential signals can be finely tuned by adjusting a voltage tuning terminal outside a chip, so that the active balun circuit can simply solve the unbalance between the two differential signals. Furthermore, input transistors that constitute a pair of differential amplifiers are provided in a cascode structure to prevent the occurrence of signal leakage and self-mixture.

Abstract: The invention relates to a receiver (1) comprising an amplifier (31-34) for amplifying an antenna signal, which amplifier (31-34) comprises an amplifier input (11a) and an amplifier output (12a,12b), the amplifier input (11a) being a single ended input for receiving the antenna signal, the amplifier output (12a, 12b) being a differential output, and the amplifier (31-34) comprising circuit (41,42) for reducing a common mode input impedance of the amplifier (31-34).

Abstract: A low-noise amplifier circuit includes a MOS transistor in a common gate amplifier configuration. A single-ended input is at a source of the MOS transistor. A resonant cavity filter circuit is coupled to a gate of the MOS transistor.

Abstract: A low-noise amplifier circuit to convert a single-ended input into a dual-ended output includes an input transconductance stage circuit, including a first MOS transistor coupled in parallel with a second MOS transistor; a current buffer circuit, including a third MOS transistor coupled in parallel with a fourth MOS transistor; each of the first, second, third, and fourth transistors having a body, gate, source, and drain; the input transconductance stage circuit and the current buffer circuit being cascode coupled, forming a cascode amplifier configuration; the single-ended input being at the source of one of the first and second transistors in the input transconductance stage circuit; the dual-ended output being a differential output across the drain of the third transistor and the drain of the fourth transistor; the first and second transistors of the input transconductance stage circuit being cross-coupled, wherein the body of the first transistor is coupled to the source of the second transistor, and the

Abstract: A circuit for converting a differential signal into a nondifferential signal comprising first and second inputs respectively receiving first and second components of a differential signal. The circuit comprises a single bipolar transistor having an emitter, a base and a collector. The transistor is biased so as to allow flowing of an emitter d.-c. bias current sufficient to allow a linear conversion of a differential RF signal, for example. Both components of the differential RF signal are respectively injected into the emitter and the base of the bipolar transistor so that a remarkably linear conversion is carried out by means of a very simple circuit. The circuit is particularly adapted to the realization of an integrated RF transmission chain.

Abstract: Various embodiments for converting a differential signal to a single ended signal are disclosed. The embodiments comprise a transistor pair for receiving a differential signal; and a tank circuit coupled to the transistor pair. The tank circuit includes a first inductor and one or more capacitors. The embodiments also include a second inductor magnetically coupled to the first inductor to form a balanced/unbalanced inductor (BIMI) arrangement. The BIMI arrangement directly converts the differential signal to a single ended signal.

Abstract: The invention relates to a differential amplifier with internal compensation. The invention also relates to a regulator controller and a regulator which includes such an amplifier. The amplifier includes a preamplifier circuit and a gain circuit. The frequency response of the amplifier is based in part on internal compensation within the preamplifier circuit. The internal compensation of the differential amplifier includes a low frequency zero that is provided by the preamplifier circuit.

Abstract: A low voltage differential signaling transceiver includes a transmitter and a receiver, the transmitter having a first terminal in signal communication with a transmission line, a source resistance in signal communication with the first terminal, a switch in signal communication with the source resistance and in switchable signal communication from ground or an input voltage, a voltage regulator in switchable signal communication with the switch for providing the input voltage to the switch, and a voltage controller in signal communication between the first terminal and the voltage regulator for controlling the input voltage to provide a controlled voltage to a receiver; and the receiver having an amplifier having a first input, a first pad in signal communication with the first input, a load resistance, and a second pad in signal communication with the load resistance, where the first and second pads are both in signal communication with one end of a first transmission line.

Abstract: There is provided an active balun circuit including: a load circuit unit including a first and a second load; a differential amplifying unit including a first amplifying unit connected to the first load, and a second amplifying unit connected to the second load and forming a differential amplifying unit together with the first amplifying unit, the differential amplifying unit differentially amplifying an input signal, and outputting first and second output signals out-of-phase with each other through first and second output terminals, respectively; a current source connected between a ground and a common connection node of the first and second amplifying units, and maintaining a constant amount of current flowing through the differential amplifying unit; and a compensation amplifying unit amplifying the input signal supplied through the input terminal, transmitting the amplified input signal to the second amplifying unit, and rejecting common mode noise of the differential amplifying unit.

Abstract: An apparatus and method for eliminating unwanted signal power dissipation in balanced amplifier circuits and for prohibiting unwanted signal power from appearing at the balanced amplifier load is presented. Load impedances to the amplifier power output transistors are maintained very low at unwanted frequencies, and are at an operational impedance level at the fundamental frequency. An impedance network control concept is presented, which may be either manually or automatically implemented.

Abstract: The present invention discloses a single-ended input/differential output amplifier includes a first bonding wire, a transduction gain circuit coupled to the first bonding wire for receiving an input voltage, a gain control circuit coupled to the transduction gain, a load unit with an end coupled to the gain control circuit to form a first output end, and a second bonding wire coupled to another end of the load unit to form a second output end.

Abstract: A method and apparatus for single-to-differential conversion includes a single-to-differential stage (22), a phase balancing stage (24), and a buffer stage (26). The single-to-differential stage (22) converts a single input signal (Vclk) to a first and second output signal (Vn, Vp), where the first and second output signals (Vn, Vp) correspond to one another. The phase balancing stage (24) is electrically connected to the single-to-differential stage (22), balances and receives the first and second output signals (Vn, Vp), and outputs first and second balanced output signals (V+, V?). The buffer stage (26) is electrically connected to the phase balancing stage (24) for shaping the first and second balanced output signals (V+, V?). The single-to-differential converter (20) is operable over a substantially large bandwidth and achieves low-power consumption and good phase noise performance.

Abstract: Example embodiments of the invention may provide for active baluns. An example active balun may include a resonator that may convert a single-ended input signal to at least two differential input signals, and a differential switching block that includes first and second transistors that each receive a respective one of the at least two differential input signals from the resonator, where the first and second transistors may be cross-coupled to each other to provide a first differential output signal and a second differential output signal. An example active balun may further include one or more loads connected to the first and second differential output signals, and one or more stacked inverters that may provide a first output port and a second output port, where the first output port may be responsive to the first differential output signal and the second output port may be responsive to the second differential output signal.