Abstract: A radio frequency integrated circuit includes a power amplifier, a low noise amplifier, a first transformer balun, and a second transformer balun. The power amplifier includes a first power amplifier section and a second power amplifier section. When enabled, the first and second power amplifier sections amplify an outbound radio frequency (RF) signal to produce a first amplified outbound RF signal and a second amplified outbound RF signal, respectively. The power amplifier provides the first amplified outbound RF signal to the first transformer balun and the second outbound RF signal to the second transformer balun, where the first transformer balun is coupled to a first antenna and the second transformer balun is coupled to a second antenna. The low noise amplifier includes a first low noise amplifier section and a second low noise amplifier section.

Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: An apparatus for converting a fully-differential input signal to an output signal which varies between two rail limits and includes: (a) a first buffer receiving one component at a first input, presenting a first buffer output signal at a first buffer output and generating a first representative signal; (b) a second buffer receiving the other component at a second input, presenting a second buffer output signal at a second buffer output and generating a second representative signal; (c) a control unit coupled with at least one of the buffer outputs and comparing the buffer output signals with a reference signal to generate at least one control signal for reducing drift in the first and second components; and (d) an output unit coupled for combining the representative signals from the buffers to present the single output signal with rail-to-rail variance at an output locus.

Abstract: A method and circuits of a high isolation and high-speed buffer amplifier capable to handle frequencies in the GHz range have been achieved. The output to input isolation is primary dependent on the gate-source capacitance of the active buffer transistor. Having two or more in series and by reducing the impedance between them a high isolation can be achieved. The input signals are split in several signal paths and are amplified in the push-pull mode using source follower amplifiers. Then the amplified signals are being combined again. The amplified output current is mirrored applying a multiplication factor. Said method and technology can be used for buffer amplifiers having differential input and differential output or having single input and single output or having differential input and single output. A high reversed biased (output to input) isolation and a reduced quiescent current have been achieved.

Abstract: An RF circuit configured to inteface a balanced port (1, 2, 11, 12) with an unbalanced port (4, 14) by emulating the function of a balun. Reactive components (20, 30, 120, 130) in both branches of a balanced circuit form two resonant circuits by resonating with parasitic reactance. At a predetermined operating centre frequency, one of the two resonant circuits is above resonance and the other is below resonance, resulting in a 180° phase difference between the signals delivered by the two branches. When used to interface an unbalanced signal source (10) to a balanced load (40), the input impedance may be set to a real value matching the output impedance of the signal source by selection of the reactive component (20, 30) values.

Abstract: An integrated low noise amplifier includes an on-chip balun, a line impedance matching circuit and an on-chip differential amplifier. The on-chip balun is operably coupled to convert a single ended signal into a differential signal. The line impedance matching circuit is operably coupled to the primary of the on-chip balun to provide impedance matching for a line carrying the single ended signal. The on-chip differential amplifier is operably coupled to amplify the differential signal and is impedance matched to the secondary of the on-chip balun.

Abstract: Described are a circuit and system to provide an output signal in response to composite input signal comprising an AC signal component and a DC signal component. An amplifier provides an amplified voltage signal in response to a voltage representative of the composite signal. A filter may provide a filtered voltage signal having a magnitude that is representative of a magnitude of the DC signal component in response to the amplified voltage signal. A DC signal removal circuit may substantially remove at least a portion of the DC signal component from an input terminal in response filtered voltage signal.

Abstract: A circuit, apparatus and method for providing a balanced differential signal from incoming serial data having high or low voltage swings are provided in embodiments of the present invention. In an embodiment of the present invention, a circuit comprises a voltage source and a current source coupled to a node. A first electrical path is coupled to the voltage source and the node. A second electrical path is coupled to the voltage source and the node. The first path includes a first transistor having a first gate and a first channel. The first transistor gate is adapted to receive a reference voltage. The second path includes a second transistor having a second gate and a second channel. The second transistor gate is adapted to receive a data voltage that is variable as a positive and negative voltage relative to the reference voltage. A variable resistor is coupled to the first electrical path and the second electrical path, and provides a predetermined resistance responsive to a control signal.

Abstract: An enhanced performance differential output amplifier and differential amplification method are provided. The amplifier comprises a first transistor to accept a single-ended input signal and supply a first output signal, and a second transistor to supply a second output signal, approximately 180 degrees out of phase from the first output signal. A first capacitor is connected between the base of the first transistor and the emitter of the second transistor. A second capacitor is connected between the emitter of the first transistor and first voltage. At least one emitter resistor, but typically two, is connected between the emitters of the first and second transistors, and a current source. The collectors of the first and second transistors are operatively connected to the first voltage, typically through resistors. The current source is connected between the emitter resistors and a second voltage (Vee) having a lower potential than the first voltage.

Abstract: The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship.

Abstract: An amplifier circuit. In one embodiment, the amplifier includes a first pair of transistors and a second pair of transistors. Each transistor in the amplifier includes a control terminal (e.g. a gate) as well as a first and second terminals. In one embodiment, the transistors are field effect transistors (FETs) and thus the first and second terminals may be either source or drain terminals. First terminals of each of the first pair of transistors may be coupled to a voltage source. The first terminal of each of the second pair of transistors is coupled to the second terminal of one of the first pair of transistors. A current source may be coupled between each of the second terminals and a voltage reference (e.g. ground plane).

Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship.

Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.

Abstract: A single-ended signal is converted to differential signals with a first device that converts an input current of a single-ended input signal to a voltage, a second device coupled to the first device to generate a first output current of a double-ended output signal based on the voltage, and a third device coupled to the first device to generate a second complementary output current of the double-ended output signal based on the voltage. The output currents can be amplified by a gain with respect to the input current, and the gain can be set a relative size of the first device with respect to each of the second and third devices. A fourth device can balance the current gain of the first device and cause the current through the second device and the third device to be equal.

Abstract: A differential to single-ended converter, which is composed of a transconductance amplifier, a current mirror and buffer circuit and a transimpedance stage, is disclosed. A differential voltage signal is provided to the inputs of the transconductance amplifier and converted to a differential current signal. The current mirror and buffer circuit serves as a differential to single-ended current conveyer and isolates the transconductance stage and the following transimpedance stage. Finally, the single-ended current signal is provided to the input of the transimpedance stage and converted to a single-ended current signal.

Abstract: An amplifier circuit is disclosed which receives signals that cause the amplifier to be configured in an asymmetrical mode or symmetrical mode, so that performance may be optimized in each mode.

Abstract: The present invention relates to circuits having differential structure which uses complementary devices for processing single-ended signal. The single-ended differential circuit in accordance with the present invention, comprises first and second complementary devices having first, second, and third terminals, respectively, wherein current flowing from the second terminal to the third terminal has its quantity and direction being varying in dependant on the voltage driven to the first terminal, wherein the currents flowing through the first and second complementary devices vary in opposite relationship.

Abstract: A method and structure for generation of signal distortion. In a first embodiment, a first signal distortion generator (SDG) receives a pair of balanced input currents +X and −X, each having a same angular frequency &ohgr;. The first SDG generates a pair of output currents +X+&Dgr;X1 and −X+&Dgr;X2, wherein &Dgr;X1−&Dgr;X2=G2X2+G3X3. G2 and G3 are each independent of X, and at least one of G2 and G3 is nonzero. In a second embodiment, a second SDG receives an unbalanced input current P having an angular frequency &ohgr;. The second SDG generates an output current UOUT of a form P+(&agr;P+&bgr;P2+&ggr;P3)/2. &agr;, &bgr;, and &ggr; are each nonzero and each independent of P. The second SDG includes a distortion generating circuit path that has an input impedance ratio of at least 5 and an output impedance ratio of at least 5.

Abstract: A circuit, apparatus and method for providing a balanced differential signal from incoming serial data having high or low voltage swings are provided in embodiments of the present invention. In an embodiment of the present invention, a circuit comprises a voltage source and a current source coupled to a node. A first electrical path is coupled to the voltage source and the node. A second electrical path is coupled to the voltage source and the node. The first path includes a first transistor having a first gate and a first channel. The first transistor gate is adapted to receive a reference voltage. The second path includes a second transistor having a second gate and a second channel. The second transistor gate is adapted to receive a data voltage that is variable as a positive and negative voltage relative to the reference voltage. A variable resistor is coupled to the first electrical path and the second electrical path, and provides a predetermined resistance responsive to a control signal.

Abstract: A device converts a differential signal (Vin1, Vin2) to a single signal (Vout). The device includes at least one pair of transistors (Q1, Q2) having equal transconductance gain (gm) and arranged according a differential stage configuration. The transistors (Q1, Q2) have the differential signal (Vin1, Vin2) in input at the drivable terminals, have first non drivable terminals coupled respectively to first terminals of a first (R1) and a second (Rout) passive elements having second terminals connected with a first supply voltage (VDD), second non drivable terminals coupled to a second supply voltage (VEE) lower than the first supply voltage (VDD). The first terminal of the second passive element (Rout) is the output terminal (OUT) of the device.

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: An amplifier circuit includes an amplifier stage and a balun stage. The amplifier stage includes a common node connected to an external ground. An inductance is located between the common node and the external ground. The balun stage is connected to the amplifier stage. The balun stage includes a balun tail. The balun tail is directly connected to the common node of the amplifier stage so that a resulting connection between the balun tail and the common node bypasses the inductance between the common node and the external ground.

Abstract: A differential to single-ended converter, which is composed of a transconductance amplifier, a current mirror and buffer circuit and a transimpedance stage, is disclosed. A differential voltage signal is provided to the inputs of the transconductance amplifier and converted to a differential current signal. The current mirror and buffer circuit serves as a differential to single-ended current conveyer and isolates the transconductance stage and the following transimpedance stage. Finally, the single-ended current signal is provided to the input of the transimpedance stage and converted to a single-ended current signal.

Abstract: A method and an apparatus that reduce power consumption in an ultra wideband (UWB) transmitter that includes a push-pull RF amplifier and a switch that powers up or powers down the amplifier between UWB pulses. The gated push-pull amplifier amplifies the UWB pulses, including spurious signal energy appearing at the detector input, by splitting the signal with a 180-degree phase splitter, amplifying the split signals with substantially identical amplifiers, and combining the amplifier outputs with a 180-degree combiner. The 180-degree combiner essentially cancels common-mode spurious signals typically generated by the UWB amplifier during power-down and power-up.

Abstract: A single-ended to differential converter including a common mode shunt and a load element. The common mode shunt includes first and second reactive elements each having first ends coupled together at a common mode junction. The second end of the first reactive element receives a single-ended input signal referenced to a reference signal, such as ground. The common mode shunt further includes a third reactive element coupled between the common mode junction and ground. The load element is coupled between the second end of the second reactive element and ground. A single-ended input signal is applied at a second end of the first reactive element and the differential signal is developed by the first and second reactive elements. The common mode shunt serves as a differential to single-ended converter by applying the differential signal as an input in which a single-ended output signal develops at the load element.

Abstract: A wide-band single-ended to differential converter (DC to 1 GHz) with very low amplitude and phase matching errors, of the order of 0.01 dB and 0.15 degrees respectively and using CMOS technology, is comprised of a first and a second stage. The very low amplitude and phase matching errors have been achieved firstly by the use of capacitive means CD across the gate and source of the first stage MOS transistor M1 with a value equal to the drain to ground (reference potential) parasitic capacitance of the tail current source device for the first stage, and secondly by using equal valued capacitive means CF1, CF2 in the second stage and setting their values to be several (5-10) times more than the gate-drain parasitic capacitances of either of the differential transistors of the second stage.

Abstract: A single ended input differential output amplifier (100) and integrated circuit including such an amplifier (100). A pair of load resistors (102, 104) are connected between a supply voltage (Vdd) and differential outputs OUTP and OUTM. An inductor (106) is connected between input RFIN and a source bias voltage VBS. A first field effect transistor (FET) (108) is connected, drain to source, between load resistor (102) at output OUTP and inductor (106) at RFIN. A second FET (110) is connected, drain to source, between the second load resistor (104) at output OUTM and the source bias voltage VBS. A gate bias voltage VBg is connected to the gate of FET (108) and through resistor (112) to the gate of FET (110). A coupling capacitor (114) is connected between the input RFIN and the gate of FET (110).

Abstract: A differential receiver circuit including first, second, and third amplification stages. The first amplification stage is configured to receive a differential input signal and to produce a single ended first output signal responsive to the differential input signal. The second amplification stage is connected in parallel with the first stage and configured to receive the differential input signal and to produce a second output signal responsive to the differential input signal. The third amplification stage is configured to receive the first and second output signals and to produce a single ended third output signal indicative of the differential in the first and second output signals.

Abstract: A power amplifier that reduces intermodulation distortion generated by the amplifier while reducing the number of parts is provided. A power amplifier comprises a first balun, to which a combined signal combining two signals of different frequencies is inputted, and which outputs, based on the combined signal, the first and the second signal whose phase are opposite; a first amplifier that outputs the first amplified signal containing the differential frequency component comprising the difference of the frequencies of two signals from the first signal; a second amplifier that outputs the second amplified signal containing the component comprising the difference of the frequencies of two signals from the second signal; and a second balun that outputs the combined signal of the first and the second amplified signals. The component contained in the first and the second amplified signal are inputted via the second and the first amplifier, respectively, to reduce the component.

Abstract: A broadband power amplifier circuit providing wide bandwidth with low distortion. The broadband power amplifier circuit includes a GaAs pHEMT MMIC with two (2) serially coupled cascode amplifiers in a first half of the circuit, two (2) serially coupled cascode amplifiers in a second half of the circuit, a first balun for receiving a single-ended RF or microwave input signal at a circuit input and providing first and second balanced low level signals to the cascode amplifiers of the first and second circuit halves, respectively, and a second balun for receiving first and second balanced high level signals generated by the cascode amplifiers of the first and second circuit halves, respectively, and providing a single-ended amplified broadband output signal with low distortion at a circuit output.

Abstract: A single ended input differential output amplifier (100) and integrated circuit including such an amplifier (100). A pair of load resistors (102, 104) are connected between a supply voltage (Vdd) and differential outputs OUTP and OUTM. An inductor (106) is connected between input RFIN and a source bias voltage VBs. A first field effect transistor (FET) (108) is connected, drain to source, between load resistor (102) at output OUTP and inductor (106) at RFIN. A second FET (110) is connected, drain to source, between the second load resistor (104) at output OUTM and the source bias voltage VBS. A gate bias voltage VBg is connected to the gate of FET (108) and through resistor (112) to the gate of FET (110). A coupling capacitor (114) is connected between the input RFIN and the gate of FET (110).

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: A broadband power amplifier circuit providing wide bandwidth with low distortion. The broadband power amplifier circuit includes a GaAs pHEMT MMIC with two (2) serially coupled cascode amplifiers in a first half of the circuit, two (2) serially coupled cascode amplifiers in a second half of the circuit, a first balun for receiving a single-ended RF or microwave input signal at a circuit input and providing first and second balanced low level signals to the cascode amplifiers of the first and second circuit halves, respectively, and a second balun for receiving first and second balanced high level signals generated by the cascode amplifiers of the first and second circuit halves, respectively, and providing a single-ended amplified broadband output signal with low distortion at a circuit output.

Abstract: An apparatus comprising an amplifier circuit and a control circuit. The amplifier circuit may be configured to generate an amplified signal in response to an input signal. The control circuit generally comprises a differential amplifier having (i) a first input coupled to said amplified signal and (ii) a second input coupled to a reference voltage. The control circuit may be configured to control a dynamic range of the amplifier circuit by adjusting the input signal based on (i) a loop gain of the control circuit and (ii) the reference voltage.

Abstract: A wide-band single-ended to differential converter (DC to 1 GHz) with very low amplitude and phase matching errors, of the order of 0.01 dB and 0.15 degrees respectively and using CMOS technology, is comprised of a first and a second stage. The very low amplitude and phase matching errors have been achieved firstly by the use of capacitive means CD across the gate and source of the first stage MOS transistor M1 with a value equal to the drain to ground (reference potential) parasitic capacitance of the tail current source device for the first stage, and secondly by using equal valued capacitive means CF1, CF2 in the second stage and setting their values to be several (5-10) times more than the gate-drain parasitic capacitances of either of the differential transistors of the second stage.

Abstract: The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

Abstract: First and second inductors are formed in an identical plane of a substrate as thin films each having a spiral shape, and are concentrically arranged and electromagnetically coupled together. The collector of an amplifying transistor and a collector voltage terminal are respectively connected to the two ends of the first inductor. When an unbalanced oscillation signal is input to the base of the amplifying transistor, an oscillation signal output from the collector of the amplifying transistor is transmitted to the first inductor, and is subsequently tuned and coupled by the second inductor. A balanced pair of oscillation signals are consequently output from output terminals at the two ends of the second inductor.

Abstract: A radio frequency single to differential buffer amplifier provides a 180 degree phase difference between two output signals by using a current mirroring circuit and using different referencing on the two output signals. Fine adjustment on the phase of the two output signals can be done by adjusting a phase adjustment device embedded in a cascode amplifier. High input power handling capability is accomplished by class AB operation on two input transistors in the amplifier.

Abstract: To provide an amplifier excellent in temperature characteristic and providing an output signal having small crossover distortion in a wide power source voltage range, voltage values provided to positive phase input terminals of a second and a third amplifier 2 and 3 are made to correspond to voltages between sources and drains of a second P-channel MOS transistor Tr3 and a second N-channel MOS transistor Tr4, a first P-channel MOS transistor Tr1 and a first N-channel MOS transistor Tr2 constituting a power buffer 4, are driven by an output signal of a first operational amplifier 1 via the second and the third amplifiers 2 and 3 and therefore, there can be provided idling currents independently from power source voltage from low power source voltage, there can be provided an output signal having small crossover distortion in a wide power source voltage range and temperature dependency thereof can be improved.

Abstract: The present invention relates to a conversion circuit that converts a single-ended signal to differential signals. According to an embodiment of the present invention, crosstalk is avoided by insuring that none of the transistors in the conversion circuit are directly connected to ground. By not having a transistor directly connected to ground, ground current is avoided and crosstalk associated with ground current is eliminated.

Abstract: A high power amplifier has a first balun propagating a half of an input signal to an in-phase output terminal, and also propagating a fourth of the input signal to first and second opposite-phase output terminals, the signal propagated to the first and second opposite-phase output terminals lagging 180 degrees behind the signal propagated to the in-phase output terminal; first and second power amplifier circuits connected to the first and second opposite-phase output terminals of the first balun and having the same characteristics;a third power amplifier circuit connected to the in-phase output terminal of the first balun and having output power substantially twice as much as the output power of the first or second power amplifier circuit; and a second balun having first and second opposite-phase input terminals for receiving the outputs of the first and second power amplifier circuits, having an in-phase input terminal for receiving the output of the third power amplifier circuit, combining the outputs of th

Abstract: An integrated RF power amplifier 20 includes an on-chip input transformer (24) and an on-chip output transformer (28). Each of the transformers (24, 28) is formed from four spirals. Each primary winding (34, 42) and each secondary winding (38, 44) includes positive and negative spirals arranged so that positive current rotates in opposing rotational directions in the positive and negative spirals. The secondary winding (38) of the input transformer (24) and the primary winding (42) of the output transformer (28) each has a center tap (48, 50) located at the electrical and physical center of the winding. Positive and negative amplifiers (26) couple between the secondary winding of the input transformer (24) and the primary winding of the output transformer (28). DC biasing for the amplifiers (26) is provided through the positive and negative spirals of the center-tapped windings (38, 42) from the respective center taps (48, 50).

Abstract: An exemplary embodiment of the present invention described and shown in the specification and drawings is a transceiver with a receiver, a transmitter, a local oscillator (LO) generator, a controller, and a self-testing unit. All of these components can be packaged for integration into a single IC including components such as filters and inductors. The controller for adaptive programming and calibration of the receiver, transmitter and LO generator. The self-testing unit generates is used to determine the gain, frequency characteristics, selectivity, noise floor, and distortion behavior of the receiver, transmitter and LO generator. It is emphasized that this abstract is provided to comply with the rules requiring an abstract which will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or the meaning of the claims.

Abstract: An apparatus comprising an amplifier circuit and a control circuit. The amplifier circuit may be configured to generate an amplified signal in response to an input signal. The control circuit generally comprises a differential amplifier having (i) a first input coupled to said amplified signal and (ii) a second input coupled to a reference voltage. The control circuit may be configured to control a gain of the amplifier circuit by adjusting the input signal based on (i) a magnitude of the amplified signal and (ii) the reference voltage.

Abstract: A power amplifier that reduces intermodulation distortion generated by the amplifier while reducing the number of parts is provided. A power amplifier comprises a first balun, to which a combined signal combining two signals of different frequencies is inputted, and which outputs, based on the combined signal, the first and the second signal whose phase are opposite; a first amplifier that outputs the first amplified signal containing the differential frequency component comprising the difference of the frequencies of two signals from the first signal; a second amplifier that outputs the second amplified signal containing the component comprising the difference of the frequencies of two signals from the second signal; and a second balun that outputs the combined signal of the first and the second amplified signals. The component contained in the first and the second amplified signal are inputted via the second and the first amplifier, respectively, to reduce the component.

Abstract: A two stage low noise amplifier (10) includes a first stage (12) and a second stage (14). The first stage (12) receives an input signal (VIN), performs single to differential conversion on the input signal (VIN), and generates an input differential signal (VA and VB) therefrom. A bias level of the input differential signal (VA and VB) may be adjusted to an optimal bias point of the second stage (14). The first stage (12) provides the input differential signal (VA and VB) to the second stage (14) And provides image rejection without any loss in amplifier gain. The second stage (14) performs image rejection on the input differential signal (VA and VB) and generates an output differential signal (V+ and V−) therefrom. The first stage (12) and stage (14) include a tuning circuit to adjust a center operating frequency of the amplifier (10). The first stage (12) and the second stage (14) receive control signals from a control bus (16) in order to adjust the center operating frequency.

Abstract: A conversion circuit in a transceiver system is capable of converting a single-ended input voltage signal to balanced differential output signals. An input voltage signal can be referenced to the ground (zero voltage) GND and can travel both above and below the zero voltage. A plurality of feedback circuits, having a plurality of transistors and a plurality of resistances, disposed and coupled in a mirror image, to boost an input impedance to an output impedance of a gain of one of the transistors, to isolate an output load from an input of the conversion circuit, and to provide a voltage gain from the input to an output determined by the plurality of resistances.

Abstract: The present invention relates to a single-to-differential signal transformation circuit which comprises a differential signal generation circuit which is operable to receive a single-ended signal and generate a pair of differential signals having a phase relationship associated therewith. The transformation circuit further comprises a phase analysis circuit operably coupled to the differential signal generation circuit which is operable to ascertain the phase relationship between the differential signals and generate a status indication associated therewith. In addition, a compensation circuit is operably coupled to the phase analysis circuit and is operable to alter a function of the transformation circuit based on the status indication from the phase analysis circuit such that the altered function causes the phase relationship of the differential signals which form a circuit output to be closer to 180 degrees than an initial phase relationship generated by the differential signal generation circuit.

Abstract: A system is provided for enabling single ended to differential conversion of signal. The system includes N serially coupled amplifier stages, wherein N is an integer, for receiving a single ended input signal, wherein each of the N amplifier stages shifts an input signal from the previous stage to a reference associated with each of the N amplifier stages to provide a non-distorted differential output signal at the output of the Nth amplifier stage.