Abstract: The invention relates to high power radiofrequency amplifiers, in particular to amplifiers having output impedance matching networks, exemplary embodiments of which include a radiofrequency amplifier having an active device mounted on a substrate within a device package, the amplifier having an output impedance matching network comprising a high pass network provided at least partly on the active device and a low pass network having a first inductive shunt connection between an output of the active device and a first output lead and a second inductive shunt connection between the output of the active device and a second output lead, wherein part of the second output lead forms an inductance contributing to the inductance of the low pass network.

Abstract: There is provided a power amplifier which may suppress fluctuations in a phase of an output signal in accordance with fluctuations in a level of an input signal by varying an impedance between a signal input terminal and an amplification unit in accordance with a power level of an input signal. The power amplifier includes a bias voltage generation unit generating a bias voltage set in accordance with a power level of an input signal, an amplification unit amplifying the power level of the input signal in accordance with the bias voltage, and an impedance variation unit varying an impedance of a signal transmission path through which the input signal is transmitted to the amplification unit in accordance with the bias voltage.

Abstract: An amplifying circuit for use in, for example, broadband transceivers is described. A bias filter is connected between an amplifying transistor and a power supply to block a wide range of frequencies associated with amplified RF input signals from reaching the power supply, while permitting DC power to reach the transistor.

Abstract: An integrated circuit for transmit and receive matching is described. The integrated circuit includes a transmit amplifier. The transmit amplifier includes a first transistor, a second transistor and a first inductor. The first inductor couples the first transistor to the second transistor. The integrated circuit also includes a low noise amplifier. The low noise amplifier includes a third transistor, a fourth transistor, the first inductor, a second inductor, a third inductor and a transformer. The second inductor couples the first inductor to the third transistor. The third inductor couples the third transistor to ground.

Abstract: A power amplifier includes a first amplifier and a second amplifier which include large and small size elements. An RF input signal is amplified by the first and second amplifiers. An output of the first amplifier is connected to an input of a first output matching circuit. An output of the second amplifier is connected to an input of a second output matching circuit. An output of the second output matching circuit is connected to an RF signal output terminal. In a high power state, the RF input signal is amplified by the first amplifier. In a low power state, the RF input signal is amplified by the second amplifier. In amplification with low power and high frequency, reactances of the second output matching circuit are set at predetermined values. In amplification with low power and low frequency, the reactances of the second output matching circuit are set at larger values.

Abstract: An amplifier circuit includes: a first transformer in which a first inductor and a second inductor are magnetically coupled; a first field-effect transistor in which a gate is connected to a first input node via the first inductor, a drain is connected to a drain bias potential node via the second inductor, and a source is connected to a reference potential node; and a first output node connected to the drain of the first field-effect transistor.

Abstract: According to one embodiment, a class-C power amplifier includes an amplifying element whose power supply voltage is expressed as Vdc and whose maximum current is expressed as Imax, a conduction angle ?o of the amplifying element being less than ?(rad), and load impedance of a fundamental wave being expressed as Z1=R1+j·X1 and load impedance of a 2nd harmonic being expressed as Z2=R2+j·X2 which are observed from a dependent current source of an equivalent circuit of the amplifying element, wherein a relationship between variables X1 and R1 is set to ?R1<=X1<=R1, variable R1 is set to R1=Vdc/Imax·?·{1?cos(?o/2)}/{?o/2?sin(?o)/2}, and variable X2/X1 is set to X2/X1=?{?o/2?sin(?o)/2}/{sin(?/2)?sin(1.5·?o)/3}, or each of the variables is set thereto so as to become equal substantially.

Abstract: A multi-mode RF power amplifier circuit that operates under dynamic power supply conditions. The power amplifier circuit operates under a high power mode and a low power mode. The multi-mode RF power amplifier includes a low power path and a high power path. Under the high power mode of operation, the high power path becomes active and the low power path becomes inactive. Each of the low power path and the high power path includes impedance matching networks and power amplifiers. Under either mode of operation, an inactive path will present at least five times higher input impedance than that of an active path. An impedance matching network connected between output terminals of the high power path and the low power path provides isolation between the output terminals of the high power path and the low power path.

Abstract: A radio frequency (RF) amplifier structure provides highly efficient RF signal amplification across a wide bandwidth, when implemented in both inverting and non-inverting Doherty designs, by employing matching impedance transform circuits that comprise a low pass multiple section inductance-capacitance circuit and that provides impedance matching between the output of an amplifier device and a power combiner, wherein the output matching impedance transform circuit has approximately an odd multiple of 90 electrical degrees over the RF amplifier structure's frequency range of operation, and adjustable phase delay circuits that route an amplified RF signal to the power combiner and that are controllably adjusted based on a frequency of an RF input signal over an operating frequency range of the RF amplifier structure.

Abstract: A power amplifier is configured to generate impedances at harmonic frequencies such that the power amplifier operates in a class C mode in a low output amplitude range and in a class F or inverse F mode in a high output amplitude range. Related methods of operation are also discussed.

Abstract: A power amplifier includes: an input terminal at which an input signal is input; a first amplifier element amplifying the input signal; a second amplifier element amplifying an output signal of the first amplifier element; an output terminal from which an output signal of the second amplifier element is output; a matching circuit connected between an output of the second amplifier element and the output terminal; a first switch connected between an output of the first amplifier element and an input of the second amplifier element; and a second switch having a first end connected to the output of the first amplifier element, and a second end. The matching circuit includes a first inductor and a first capacitor connected in series between the output of the second amplifier element and a grounding point. The second end of the second switch is connected to a connecting point of the first inductor to the first capacitor.

Abstract: A power amplifier circuit comprising a transistor for receiving a signal to be amplified at an input and for outputting an amplified signal at an output; a modulated power supply connected to the transistor output; and a resistive element connected at the transistor output such that a low impedance is maintained at the transistor output across a range of operational frequencies.

Abstract: Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity.

Abstract: A radio frequency system includes a power amplifier that outputs a radio frequency signal to a matching network via a transmission line between the power amplifier and the matching network. A sensor monitors the radio frequency signal and generates first sensor signals based on the radio frequency signal. A distortion module determines a first distortion value according to at least one of (i) a sinusoidal function of the first sensor signals and (ii) a cross-correlation function of the first sensor signals. A first correction circuit (i) generates a first impedance tuning value based on the first distortion value and a first predetermined value, and (ii) provides feedforward control of impedance matching performed within the matching network including outputting the first impedance tuning value to one of the power amplifier and the matching network.

Abstract: The present invention relates to a power amplifier unit (30, 40, 50, 60a-60d, 70) comprising a power amplifier element (31, 41, 51, 71) and a matching unit (32, 42, 52, 72). The unit comprises an impedance matched MicroElectroMechanicalSystem (MEMS) switch element (33, 43, 53, 73) between said power amplifier element (31, 41, 51, 71) and said matching unit (32, 42, 52, 72).

Abstract: An amplification circuit, which may be in a receive path of a communication device, includes an amplifier including at least a first amplification device and a switchable attenuation circuit. The switchable attenuation circuit includes one or more switches and a plurality of attenuation devices and is operable to provide different levels of attenuation to an input signal prior to input to the amplifier depending on the status of the one or more switches. The attenuation devices may be capacitors, wherein the capacitors may be arranged to form a capacitive divider with a level of attenuation dependent on the status of the switches. The switchable attenuation circuit may be a switched capacitive attenuation ladder of n stages, n being any integer, each ladder stage including a capacitive divider. The amplification circuit may also include a switch, which when closed provides an unattenuated path for the input signal to the amplifier input.

Abstract: A radio frequency power amplifier includes a transistor and amplifies a radio frequency signal of a first frequency; an input matching circuit connected to an input terminal of the transistor; and an output matching circuit connected to an output terminal of the transistor. A reactance control circuit includes one end connected to the output terminal of the transistor, and the other end connected to an input terminal of an output matching circuit and a bias terminal. The reactance control circuit has a reactance which resonates at a second frequency with a parasitic capacitance of the transistor at the output terminal of the transistor, and the second frequency is identical or close to the first frequency.

Abstract: Exemplary techniques for performing impedance matching are described. In an exemplary embodiment, the apparatus may include an amplifier (e.g., a power amplifier) coupled to first and second matching circuits. The first matching circuit may include multiple stages coupled to a first node and may provide input impedance matching for the amplifier. The second matching circuit may include multiple stages coupled to a second node and may provide output impedance matching for the amplifier. At least one switch may be coupled between the first and second nodes and may bypass or select the amplifier. The first and second nodes may have a common impedance. The apparatus may further include a second amplifier coupled in parallel with the amplifier and further to the matching circuits. The second matching circuit may include a first input stage coupled to the amplifier, a second input stage coupled to the second amplifier, and a second stage coupled to the two input stages via switches.

Abstract: A method and apparatus is provided for linearizing the output of a non-linear device, such as a power amplifier. The input signal to the non-linear device is predistorted based on a predistortion model to compensate for distortion introduced by a non-linear device. A wideband feedback signal is generated from the output signal of the non-linear device, and the wideband feedback signal is filtered to generate two or more narrowband distortion signals with predetermined frequencies corresponding to anticipated distortion components in the output signal. Model parameters of the predistortion model are adapted based on the narrowband distortion signals.

Abstract: A method is provided for process, voltage, temperature (PVT) stable transfer function calibration in a differential amplifier. The gain resistors of a differential amplifier are initially selected to achieve a flat amplitude transfer function in the first frequency band. After calibration, the degeneration capacitor is connected and tuned until a peaked amplitude transfer function is measured, which is resistant to variations in PVT. As an alternative, the degeneration capacitor is not disconnected during initial calibration. Then, the gain resistors and the degeneration capacitor values are selectively adjusted until the first peaked amplitude transfer function is obtained. The peaked amplitude transfer function remains even more stable to variations in PVT than the flat amplitude calibration method.

Abstract: A high frequency power amplifier includes: a first transistor for amplifying an input high-frequency signal; a second transistor for amplifying an output signal of the first transistor; a third transistor connected in parallel with the first transistor and for amplifying the input high-frequency signal; a first switching element connected between an output of the first transistor and an input of the second transistor; a second switching element connected between an output of the third transistor and the first switching element; third and fourth switching elements connected in series between the output of the first transistor and an output of the second transistor, and between the second switching element and the output of the second transistor; and a first capacitor connected between the third switching element and the fourth switching element.

Abstract: There is a need to provide a high-frequency power amplifier capable of reducing a talk current and reducing a phase deviation in output. The high-frequency power amplifier includes differently sized first through fifth power amplification transistors and impedance matching circuits for example. The high-frequency power amplifier changes a signal path to be used in accordance with a power specification signal. The high-frequency power amplifier uses a signal path from the first transistor to the second transistor in high power mode. The high-frequency power amplifier uses a signal path from the first transistor to the third transistor in medium power mode. The high-frequency power amplifier uses a signal path from the fourth transistor to the fifth transistor in low power mode. The high-frequency power amplifier is configured so that each of the signal paths includes the same number of stages of power amplification transistors and impedance matching circuits.

Abstract: A quadrature amplifier comprises first and second amplifiers, each having an input and an output, a signal splitter connected to the inputs of the two amplifiers, a signal combiner connected to the outputs of the two amplifiers, and an impedance transformer connected to the output of the signal combiner. The signal splitter is a ?3 dB hybrid that splits an input signal into two output signals of equal amplitude that are in phase quadrature. The signal combiner is a ?3 dB hybrid that combines the output signals at the outputs of the two amplifiers. Since the output signals are in phase quadrature, the signals are combined to produce an inphase signal. The impedance transformer matches the output signal to an impedance of approximately 50 Ohms. Capacitive and resistive tuning networks connected to the ports of the signal combiner allow for adjustment of the center frequency and impedance of the signal combiner.

Abstract: For use in a wireless network, a tunable power amplifier circuit includes a power amplifier transistor and a plurality of laminate MEMS (microelectromechanical system) capacitors coupled to the power amplifier transistor. The laminate MEMS capacitors are arranged in a tunable matching network and configured to provide a matching impedance for the power amplifier transistor. In some embodiments, the laminate MEMS capacitors are arranged in a binary array.

Abstract: A multi-stage amplifier is provided that uses tunable transmission lines, as well as a calibration method for the multi-stage amplifiers. A multi-stage amplifier, comprises a plurality of tunable amplification stages, wherein each of the tunable amplification stages comprises a tunable resonator based on a transmission line having a tunable element. The tunable elements may vary a capacitance or an inductance to tune a frequency of an applied signal. A calibration method is provided for a multi-stage amplifier having a plurality of transmission lines, an input stage and an output stage. The multi-stage amplifier is calibrated by generating a signal to determine a frequency for a substantially maximum power; generating an error signal by comparing the frequency for the substantially maximum power with a desired frequency; varying a digital control code applied to each of the tunable transmission lines, input stage and output stage until the error signal satisfies predefined criteria.

Abstract: A radio signal is input to a first terminal and output after amplification at a second terminal. There is a third terminal which is common to both the first and the second terminal. There is an inductance interfacing the second terminal to a direct current power supply; and a radio frequency filter connected in shunt with the inductance. In an exemplary embodiment the first, second and third terminals are respective base, collector and emitter terminals of a bipolar transistor. Such a bipolar transistor is characterized in that voltage from the power supply passes to the second terminal through the inductance but not through the radio frequency filter; and the signal output passes from the second terminal through the radio frequency filter but not through the inductance. The illustrated embodiments show the radio frequency filter as a surface acoustic wave filter in direct connection with the second terminal.

Abstract: Described is an inductive compensating network coupled between the differential inputs of an operational amplifier circuit. The inductive compensating network includes at least one inductive element having an inductance value selected so as to provide proper compensation of the operational amplifier circuit. Also described is a feedback compensation scheme which adjusts loop characteristics by introducing zeros into a system with the addition of inductive or capacitive elements in a feedback path.

Abstract: A radio frequency power amplifier includes: an amplifying element which amplifies an input signal and outputs the signal from an output terminal; and an output load circuit which includes a first resonant circuit and a second resonant circuit that are connected to the output terminal. The first resonant circuit has a resonance frequency higher than the frequency of the second harmonic of the input signal, and the second resonant circuit has a resonance frequency lower than the frequency of the third harmonic of the input signal. The output load circuit has such an impedance looking from the output terminal that a phase of a reflection coefficient at the second harmonic of the input signal is greater than 180 degrees and less than 360 degrees, and a phase of a reflection coefficient at the third harmonic of the input signal is greater than 0 degrees and less than 180 degrees.

Abstract: An integrated circuit comprises a GaAs substrate thermally and mechanically mounted on a SiC substrate. The GaAs substrate is doped to define first and second transistors. Circuit conductors are defined on the GaAs substrate, which conductors interconnect the source of the first transistor to neutral and the drain to the source of the second transistor. Conductors connect the gate of the second transistor to neutral, to define a cascode amplifier. The SiC substrate supports first and second matching circuits, one of which is connected to the gate of the first transistor, and the other of which is connected to the drain of the second transistor.

Abstract: The present invention provides a single chain power amplifier for a multi-mode and/or multi band wireless communication. The power amplifier comprise switchable input, inter-stage and output matching networks as well as active periphery adjustable driver stage power device and power stage power device. Switches and bias are configured for each frequency band and/or wireless communication standard. A driver stage power device, switches, control and bias circuitry, input matching, inter-stage matching and a part of output matching is fabricated on CMOS Silicon On Insulator process (SOI), while a power stage power device maybe fabricated by Gallium Arsenide (GaAs) processing.

Abstract: An amplifier module with multiple operating modes is described. In an exemplary design, an apparatus includes a plurality of amplifiers. The apparatus may also include a plurality of switches, each switch coupled to an output of an associated amplifier in the plurality of amplifiers and configured to provide an amplified signal in a first mode and bypass the associated amplifier and provide an associated bypass signal in a second mode. Further, the apparatus may include an output circuit including a plurality of matching circuits, each matching circuit coupled to an associated amplifier in the plurality of amplifiers and an associated switch in the plurality of switches.

Abstract: A power amplifier, which includes n+1 amplifying units coupled in parallel, where n is an integer greater than or equal to 0, third input ends VR(i) of the n+1 amplifying units are coupled to a power input VL, output ends D(i) of the n+1 amplifying units are coupled to a power input VH, and an output power of the power amplifier is in an increasing function relationship with a capacitance value obtained through accumulation of energy returning capacitors xC of the n+1 amplifying units. The power amplifier changes circuit impedance in a manner of controlling the parallel capacitance value by a switching digital signal, thereby controlling a magnitude of a returned power value and forming different output powers.

Abstract: A power amplifier is provided, which includes a power dividing unit, a first power amplification tributary, a second power amplification tributary, and an impedance conversion unit. Input ends of the first power amplification tributary and the second power amplification tributary are coupled to two output ends of the power dividing unit respectively. An output end of the first power amplification tributary is coupled to an output end of the second power amplification tributary through the impedance conversion unit. Rated power of a peak power amplifier in the second power amplification tributary is greater than that of a main power amplifier in the first power amplification tributary. The beneficial effects of the present invention lie in that larger back-off exists at the peak of an efficiency curve of the power amplifier, and in the case that power is back-off, efficiency of the power amplifier is improved.

Abstract: A mode-switching LNA generally includes an input unit, an output unit and a bias voltage generator. The input unit amplifies an input signal to generate an amplified signal. The output unit receives the amplified signal from the input unit and operates either in an oscillation mode or in an amplification mode in response to a control signal to generate an output signal having a center frequency equal to a target frequency. The control signal indicates whether the center frequency of the output signal is the same as the target frequency. The bias voltage generator provides an input bias voltage to the input unit in response to the control signal, where the input bias voltage includes a first bias voltage in the amplification mode and a second bias voltage in the oscillation mode.

Abstract: A low-noise amplifier (LNA) filter for use with global navigation satellite system (GNSS) devices is disclosed. A first LNA stage, which is configured to connect to an antenna configured to receive GNSS signals, includes an LNA. A second LNA stage, which is connected to the output of the first LNA stage, has a surface acoustic wave (SAW) filter and an LNA. A third LNA stage, which is connected to the output of the second LNA stage, also has a SAW filter and an LNA.

Abstract: Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated second bias voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of the impedance matching stage is also used, together with the output of the gain stage, to produce an output of the amplifier. A signal reuse stage may be provided between the output of the impedance matching stage and the output of the amplifier.

Abstract: A radio frequency amplifier circuit includes: low-output transistors, each of which includes an input terminal, an output terminal, and a ground terminal, and amplifies a radio frequency signal; a harmonic processing circuit provided for each of the low-output transistors to be connected to the output terminal of the low-output transistor, and processing a secondary harmonic included in an amplified radio frequency signal, and a resistor connected to the output terminal of each of the low-output transistors. The input terminal of each of the low-output transistors is connected to an input terminal of the radio frequency amplifier circuit via an inductor, and the output terminal of each of the low-output transistors is connected to the other output terminal via the resistance and is further connected to an output terminal of the radio frequency amplifier circuit via an inductor.

Abstract: A power amplifier (PA) system is provided for multi-mode multi-band operations. The PA system includes one or more amplifying modules, each amplifying module including one or more banks, each bank comprising one or more transistors; and a plurality of matching modules, each matching module being configured to be adjusted to provide impedances corresponding to frequency bands and conditions. A controller dynamically controls an input terminal of each bank and adjusts the matching modules to provide a signal path to meet specifications on properties associated with signals during each time interval.

Abstract: A power amplifier is configured to generate impedances at harmonic frequencies such that the power amplifier operates in a class C mode in a low output amplitude range and in a class F or inverse F mode in a high output amplitude range. Related methods of operation are also discussed.

Abstract: Embodiments provide an amplifier and a method for using and manufacturing said amplifier that incorporate an impedance matching stage, a feedback circuit, and a gain stage. The impedance matching stage is coupled to the feedback circuit wherein the feedback circuit provides a compensated operating voltage for the impedance matching stage. The output of the impedance matching stage is used to set an input bias voltage for both the impedance matching stage and the gain stage. The output of the impedance matching stage is also used, together with the output of the gain stage, to produce an output of the amplifier.

Abstract: An analog-to-digital converter (ADC) circuit comprising two time-interleaved successive approximation register (SAR) ADCs. Each of the two time-interleaved SAR ADCs comprises a first stage SAR sub-ADC, a residue amplifier, a second stage SAR sub-ADC and a digital error correction logic. The residue amplifier is shared between the time-interleaved paths, has a reduced gain and operates in sub-threshold to achieve power effective design.

Abstract: Power amplifying systems and modules and components therein are designed based on CRLH structures, providing high efficiency and linearity.

Abstract: An amplifier having an operating frequency includes: an input port and an output port; three gain elements, each having an input terminal and an output terminal; an input matching network; and an output matching network. The input matching network includes: a first microstrip line which is connected to the input port and is an inductor at the operating frequency; a second microstrip line extending between the input terminals of the three gain elements; and a first split shunt capacitor connecting the first microstrip line to the second microstrip line. The output matching network includes: a third microstrip line which is connected to the output port and is an inductor at the operating frequency; a fourth microstrip line extending between the output terminals of the three gain elements; and a second split shunt capacitor connecting the third microstrip line to the fourth microstrip line.

Abstract: System and method for compensating for changes in an output impedance of a power amplifier uses an impedance compensating circuit with an impedance inverter coupled to the power amplifier. The impedance inverter of the impedance compensating circuit is configured such that an output impedance of the impedance inverter is proportional to the inverse of the output impedance of the power amplifier to compensate for changes in the output impedance of the power amplifier.

Abstract: A signal processing apparatus includes: a digital processing unit to which a digital input signal is supplied, which performs a digital process on the digital input signal to produce a digital signal, and which produces a control signal designating a specific time period when an amplitude of an analog output signal is to be lowered; a DA-conversion unit which converts the digital signal to produce an analog signal; and a variable gain unit which adjusts an amplitude of the analog signal to produce the analog output signal, and which lowers the amplitude of the analog output signal during the specific time period designated by the control signal.

Abstract: A Bi-Directional and Adjustable Current Source (“BACS”) for providing an input voltage to a mute/standby control pin of a power stage integrated circuit (“IC”) of an amplifier input with a voltage signal that is linear, where an output of the BACS and the input to the control pin are shunted with a capacitor, is described. The BACS may include a first switch in signal communication with a high voltage reference and a first current source in signal communication with the first switch. The BACS may also include a second switch in signal communication with a low voltage reference and a second current source in signal communication with the second switch. The BACS may further include a directional current element in signal communication with both the first current source, the second current source, the output of the BACS, the input to the control pin, and the capacitor, where the directional current element is configured to prevent current flow from the output BACS to the first current source.

Abstract: An amplifier output impedance matching configuration including a first impedance transformer and one or more second impedance transformers. The first impedance transformer receives input signals from a power amplifier and generates output signals to a load. The one or more second impedance transformers are connected between the first impedance transformer and the load through which the output signals are passed.

Abstract: A pre-driver for an amplifier comprising a load network in which the following elements are connected in the following order: a resistor-an inductor-a capacitor. Also described are a power amplifier comprising such a pre-driver, a method of fabricating a pre-driver for an amplifier, and a method of performing power amplification.

Abstract: In a Doherty amplifier (100), the amplifier's input is connected to a main device (102) via a first branch and to a peak device via a second branch. The first branch has a first frequency-dependent input impedance with a first real part and a first imaginary part. The second branch has a second frequency-dependent input impedance with a second real part and a second imaginary part. The first and second imaginary parts have opposite polarity. The first and 5 second imaginary parts have a same magnitude so as to compensate each other in the frequency band. The first imaginary part and the second imaginary part implement a first phase shift in the. first branch and a second phase shift in the second branch, respectively. The first and second phase shifts each have a magnitude of substantially 45 degrees substantially in the middle of the frequency band and are of opposite polarity.

Abstract: A power amplifier includes an input matching circuit, an amplifier transistor for amplifying an input signal received through the input matching circuit, an element for varying the collector voltage of the amplifier transistor, a bias circuit for varying the idle current in the amplifier transistor, and a compensation circuit for varying capacitance of the input matching circuit to maintain the phase shift and the input reflection in the power amplifier constant when the collector voltage and the idle current are varied, to prevent a decrease in the efficiency of the power amplifier due to changes in the output power of the amplifier transistor.