Including Plural Stages Cascaded Patents (Class 330/310)
  • Patent number: 5191300
    Abstract: An amplifier for use with a twisted pair LAN. Each stage of the amplifier provides amplification including higher frequency emphasis for a predetermined length of line. The correct number of stages are automatically activated within the amplifier. Thus a singly configured amplifier may be used for different line lengths.
    Type: Grant
    Filed: May 15, 1992
    Date of Patent: March 2, 1993
    Assignee: Tutankhamon Electronics, Inc.
    Inventors: Martin H. Graham, Anthony J. Ireland, Mark Miller, Matthew Taylor
  • Patent number: 5126689
    Abstract: A direct-coupled grounded-base amplifier comprising two or more grounded-base amplifying circuits. The same circuit used as the output stage of a first grounded-base amplifying circuit is mounted in each of second and subsequent grounded-base amplifying circuits. The base potentials of output stges of the second and subsequent grounded-base amplifying circuits are applied by the same circuit, thereby equalizing the DC potentials at both ends of an input resistor of the second and subsequent grounded-base amplifying circuits. Therefore, a capacitor outside of the IC is unnecessary.
    Type: Grant
    Filed: November 16, 1990
    Date of Patent: June 30, 1992
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroyuki Nakamura
  • Patent number: 5113144
    Abstract: A feed-back type emphasis circuit is disclosed which comprises an input amplifier, a low pass filter, an output amplifier and a feed-back amplifier. The input amplifier receives an input through its positive terminal, and the low pass filter receives the output of the input amplifier, and supplies its output to both the output amplifier and the feed-back amplifier. The output amplifier receives the output of the low pass filter and the input from the outside, while the feed-back amplifier receives both the output of the low pass filter and the input from the outside, with the polarities of its input terminals being shiftable correspondingly with the system specification of the set. The feedback amplifier includes a differential amplifier with adjustable gain and balance for two inputs, whereby the amount of emphasis can be adjusted and the circuit of the present invention can satisfy any specification, thus no new circuit is required when the specification is changed.
    Type: Grant
    Filed: October 22, 1990
    Date of Patent: May 12, 1992
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Young W. Song
  • Patent number: 5099204
    Abstract: An amplification circuit having a compensation circuit for receiving a control signal and generating a corresponding compensation signal according to predetermined compensation characteristics. An input amplification circuit is provided for, receiving an input signal and the compensation signal amplifying the input signal at an input gain level determined by the compensation signal and providing a corresponding input amplification circuit output signal. A filter element receives and filters unwanted frequency components from the input amplification circuit output signal. An output amplification circuit is provided for, receiving the filtered input amplification circuit output signal and the compensation signal, amplifying the filtered input amplification circuit output signal at an output gain level determined by the compensation signal and providing a corresponding output amplification circuit output signal.
    Type: Grant
    Filed: October 15, 1990
    Date of Patent: March 24, 1992
    Assignee: Qualcomm Incorporated
    Inventor: Charles E. Wheatley, III
  • Patent number: 5083095
    Abstract: An amplifier having improved input impedance and reduced susceptibility to power supply ripple, particularly suited for use with a high impedance signal source, utilizes at least two field-effect transistors; the signal source is connected to the gate of the first FET, which is connected to a reference potential by a high resistance, whereas the source electrode of the first FET is connected to the reference potential (usually ground) through a much smaller load resistance and is also connected to the gate of the second FET. The source of the second FET is connected to the drain of the first FET and the drain of the second FET is connected to a power source, usually a low voltage source.
    Type: Grant
    Filed: August 22, 1990
    Date of Patent: January 21, 1992
    Assignee: Knowles Electronics, Inc.
    Inventor: Peter L. Madaffari
  • Patent number: 5057788
    Abstract: A two-stage differential amplifier connected in cascade according to the present invention is suitable for fabrication within an integrated circuit, in which a constant current source circuit is connected with the common emitters of the transistors in the preceding stage differential amplifier, and the emitters of the transistors in the succeeding stage differential amplifier are connected with the collectors of these transistors through impedance elements. Current consumption in the overall amplifier is reduced and heat production therein is suppressed. Furthermore, since a capacitor is connected between the collector of each of the transistors in the preceding stage differential amplifier and the base of each of the transistors in the succeeding stage differential amplifier, it is possible to match easily the input and the output impedances in the succeeding and preceding amplifier by means of this capacitor and the impedance elements described above.
    Type: Grant
    Filed: August 28, 1990
    Date of Patent: October 15, 1991
    Assignee: Alps Electric Co., Ltd.
    Inventors: Susumu Ushida, Sadao Igarashi
  • Patent number: 5006814
    Abstract: A current amplifier including two stages. A first stage is formed by a primary operational amplifier (IC1) connected in a virtual earth feedback configuration and having a feedback loop formed by a resistor (R1) and capacitor (C1) connected in parallel so that the primary operational amplifier has a frequency response up to a predetermined frequency and thereafter the frequency response rolls off at a predetermined rate. A second stage including another operational amplifier (IC2) connected in a virtual earth or non-inverting feedback configuration having a frequency characteristic chosen to provide in combination with the frequency characteristic of the primary amplifier a desired operating range for the amplifier.
    Type: Grant
    Filed: October 10, 1989
    Date of Patent: April 9, 1991
    Assignee: W.A. Technology Limited
    Inventor: Colin J. Wilson
  • Patent number: 5001440
    Abstract: An audio system having a main chassis including an audio preamplifier and a remote chassis including a power amplifier has a clipping level detector circuit in the remote chassis for detecting the onset of clipping by the power amplifier and has a gain control element in the main chassis for controlling the gain of the preamplifier. Thus, clipping distortion is eliminated without introduction of other distortion and while preserving the spectral balance of the audio signal.
    Type: Grant
    Filed: December 21, 1989
    Date of Patent: March 19, 1991
    Assignee: Ford Motor Company
    Inventor: Richard D. Zerod
  • Patent number: 4996498
    Abstract: A filter cell having common mode compensation for use in a differential integrating filter includes a transconductance amplifier that comprises a pair of differentially connected transistors the bases of which are coupled to respective inputs of the filter cell and whose emitters are interconnected to a current sinking transistor while the collectors are coupled via respective output circuitry to first and second outputs of the filter cell. Circuitry is provided to set the common voltage levels at the first and second outputs of the comprising a pair of resistors commonly connected at a circuit node that is a virtual ground for differential signals and the first and second filter cell outputs respectively. The circuit node is also coupled to the base of the current sinking transistor to thereby for a common mode closed loop in conjunction with a current supply that is also coupled to the circuit node.
    Type: Grant
    Filed: January 3, 1990
    Date of Patent: February 26, 1991
    Assignee: Motorola, Inc.
    Inventor: John E. Hanna
  • Patent number: 4987382
    Abstract: A microwave integrated circuit having a level shift circuit includes level shift diodes connected in series, a transistor resistor connected to form a two-terminal device which serves as a resistance, a field effect transistor and a series resonant circuit. The field effect transistor may be a GaAs field effect transistor and has a gate electrode receiving an input signal having frequency ranges from D.C. to super high frequencies, a drain electrode connected to the drain voltage line and a source electrode connected, through the series connection of the level shift diodes, to the transistor resistor and an output terminal. The series resonant circuit comprises a peaking capacitance and a peaking inductance and is provided in parallel with the level diodes. The series resonant circuit connected in parallel with the level shift diodes enables to reduce the device area for the level shift circuit and improves high frequency characteristics thereof.
    Type: Grant
    Filed: October 13, 1989
    Date of Patent: January 22, 1991
    Assignee: NEC Corporation
    Inventor: Yasuo Saitoh
  • Patent number: 4973919
    Abstract: A signal is amplified with a plurality of amplifiers, each amplifier having a reference port, a reference node coupled to the reference port, and a signal port, and each amplifier being supplied by a power source with operating potential with respect to the reference node that is coupled to the reference port of that amplifier. The amplifiers are cascaded in a manner selected so that the output of a first amplifier (which receives the signal to be amplified at its input port) drives the reference node of a second amplifier, and the reference node of the first amplifier provides an input at the signal port of the second amplifier, whereby the first and second amplifiers are directly coupled together to amplify the applied signal.
    Type: Grant
    Filed: March 23, 1989
    Date of Patent: November 27, 1990
    Assignee: Doble Engineering Company
    Inventor: Lars P. Allfather
  • Patent number: 4972512
    Abstract: Circuit arrangement for linearly amplifying and demodulating an AM-modulated signal, and integrated semiconductor element for said circuit arrangement. A linear amplifier and demodulator for AM-modulated signals comprises a logarithmic amplifier having a number of amplifier stages successively operating in a limiting mode, an antilog circuit, and DC separation between the logarithmic amplifier and the antilog circuit.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: November 20, 1990
    Assignee: U.S. Philips Corp.
    Inventor: Arnoldus Garskamp
  • Patent number: 4935705
    Abstract: A high efficiency variable power amplifier suitable for use in a battery powered device is provided wherein a variable power amplifier has at least a first (2) and a second (12) amplification stage. Base bias potential (8) for the second amplification stage (12) is derived from the bias potential provided to the first amplification stage. In this way, as the bias potential to the first amplification stage is modified to vary the output power, the base bias potential for the second amplification stage is correspondingly modified to maintain the amplifier's efficiency.
    Type: Grant
    Filed: December 29, 1988
    Date of Patent: June 19, 1990
    Assignee: Motorola, Inc.
    Inventors: Cris S. Estanislao, Ole Hammer
  • Patent number: 4897617
    Abstract: This high voltage linear FET amplifier operates at voltage levels of ten's of thousand's of volts with power dissipation capabilities in the kilowatt range. It is a broadband device which features power amplification from DC to frequencies well in excess of 100 KHz. The amplifier uses a unity-gain inverting amplifier as its basic building block. N-number of these building blocks are stacked to accommodate whatever voltage stand-off level is desired. To operate stacked high voltage amplifiers, it is necessary to provide a bias shift (reference) progressively increasing in equal increments from the ground reference stage to the highest voltage level stage while preserving the fidelity of the signal applied to the first stage. This is done by establishing a phantom ground at all amplifiers for each progressive bias level.
    Type: Grant
    Filed: February 28, 1989
    Date of Patent: January 30, 1990
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Walter E. Milberger, Franklin B. Jones, Charles S. Kerfoot
  • Patent number: 4866401
    Abstract: The invention teaches the placement of a plurality of conducting paths in the vicinity of the base of the final stage of a Darlington configured transistor group. When an abrupt change in carrier density occurs, such as during switching intervals, the added conduction paths facilitate the removal of carriers from the base region, thereby facilitating the turn-off process. The extra conductive paths allow a more even current density within the volume of the base during changes in carrier density.
    Type: Grant
    Filed: November 30, 1988
    Date of Patent: September 12, 1989
    Assignee: Fuji Electric Co., Ltd.
    Inventor: Zirou Terasima
  • Patent number: 4864249
    Abstract: A nonslewing amplifier comprises two push-pull voltage-amplification stages each having a complementary pair of grounded-emitter transistors. The first stage has a load impedance connected to each of the transistor collectors. A pair of feedback compensation capacitors are each connected from the collector output to the base input of a respective transistor of the second stage. When a large fast signal causes slewing in one half of these stages due to insufficient current from the respective load impedance to charge the associated compensation capacitor at the rate required by the signal, the transistor in the other half of the first stage draws enough current to discharge the other compensation capacitor at a rate fast enough to transmit an undistorted signal to the second stage where it is amplified and transmitted to the following drive stage. Slew limiting and transient intermodulation distortion are thereby avoided.
    Type: Grant
    Filed: December 29, 1988
    Date of Patent: September 5, 1989
    Inventor: Martin G. Reiffin
  • Patent number: 4845442
    Abstract: According to the teachings of this invention, a novel sense amplifier is provided which includes a current steering transistor having its emitter connected to the collector of a current mirror transistor, its collector connected to the base of an output transistor, and its base driven by the input signal. With a low input signal, the emitter of the current steering transistor is pulled low, thereby pulling the base of the output transistor low. Conversely, when the input signal is high, and the current steering transistor ceases to operate in the active saturation mode and begins to operate in the inverse active saturation mode, thereby providing current from its base to its collector in order to turn on the output transistor.
    Type: Grant
    Filed: June 13, 1988
    Date of Patent: July 4, 1989
    Assignee: National Semiconductor Corp.
    Inventors: Jay R. Chapin, Thomas M. Luich
  • Patent number: 4820999
    Abstract: A method and apparatus for amplifying signals is disclosed. In one embodiment, the apparatus comprises a first MOSFET having a drain, a source and a gate. The apparatus further comprises a second MOSFET having a drain, a source and a gate. The second MOSFET is a depletion mode device having a substantially greater drain saturation current than the first MOSFET. The drain of the first MOSFET is connected to the source of the second MOSFET through a first conductor, and the source of the first MOSFET is connected to the gate of the second MOSFET through a second conductor. Finally, the apparatus further comprises a conductor for connecting the drain of the second MOSFET to biasing source to apply sufficient voltage to cause saturation of the first and second MOSFETs.
    Type: Grant
    Filed: September 11, 1987
    Date of Patent: April 11, 1989
    Assignee: The Aerospace Corporation
    Inventor: Geza Csanky
  • Patent number: 4797633
    Abstract: An audio amplifier has a collapsible power supply coupled to an audio amplifier circuit to drive voltage rails of the power supply in an inverse relationship to the power consumed by the amplifier circuit. A variable gain input stage includes a linear potentiometer gain control followed by a gain stage and buffer to drive separate bass and treble controls, summed before appearing at the input of an integrated circuit amplifier. The main voltage amplification is provided by an integrated circuit, supplied with power by common base circuits to isolate the integrated circuit from power supply induced distortion. Staggered output stages are coupled to the output of the amplifier, the earlier stages having a longer duty cycle and light duty factor, while the later stages having a shorter duty cycle and heavier duty factor. A voltage doubler sensing power drawn by amplifier to modify voltage rails available at the output of the amplifier circuit.
    Type: Grant
    Filed: March 20, 1987
    Date of Patent: January 10, 1989
    Assignee: Video Sound, Inc.
    Inventor: Theodore J. Humphrey
  • Patent number: 4767946
    Abstract: A high-speed, supply independent level shifter is implemented in bipolar, JFET, MOSFET or MESFET integrated circuit technology. A level shift circuit having a desired input potential V.sub.1 and a required output potential V.sub.2, is incorporated into a first current leg connected between first and second supply voltages. A second current leg in parallel with the first leg establishes a reference current. The two current legs are coupled by a current mirror to establish a fixed, preferably equal, relationship between the currents in the two legs. Each current leg includes a reference resistor. A buffered, floating voltage source is coupled in series with the resistor in the first leg to the control conductor of the current mirror. The voltage source is designed and the resistor values selected to provide a potential V.sub.3 that is an additive function of potentials V.sub.1 and V.sub.2 such that V.sub.1 is independent of the supply voltages.
    Type: Grant
    Filed: January 12, 1987
    Date of Patent: August 30, 1988
    Assignee: Tektronix, Inc.
    Inventor: Stewart S. Taylor
  • Patent number: 4728905
    Abstract: An integrable, high frequency superlinear amplifier and its fabrication method is disclosed which is related to the basic amplifier fabrication field having negative feedback and signal conversion. The three stage amplifier design involves a first and second stage which have a narrow bandwidth response and a third amplifier stage with a larger or wider bandwidth response. The bandwidth of the wide bandwidth stage is such that when the gain curve for the two narrow bandwidth stages passes through the -6dB point at a first frequency then the peak point of the wide bandwidth stage is located at a second frequency higher than the first frequency. The wide bandwidth stage utilizes a single capacitor so that the resulting curve of the three stages has an approximately flat portion below the zero gain point. The impedance of the network is adjusted to a desired value through a feedback configuration.
    Type: Grant
    Filed: March 31, 1986
    Date of Patent: March 1, 1988
    Inventor: Yu Zhiwei
  • Patent number: 4695807
    Abstract: In a circuit arrangement with a Darlington stage, there are provided for clearing the charges of the Darlington transistors, transistors which are connected in such a way that the base current of the Darlington transistor preceding the last Darlington transistor travels in each case via the switched-through collector emitter section of a clearing transistor to the base of a following clearing transistor and actuates it.
    Type: Grant
    Filed: March 12, 1986
    Date of Patent: September 22, 1987
    Assignee: Telefunken electronic GmbH
    Inventors: Ralph Annacker, Joachim Dietl
  • Patent number: 4663598
    Abstract: A current mirror which is stable and accurate for a broad range of beta gain factors of the individual transistors thereof has two transistors of one type connected substantially as a Darlington pair. A multiplying, multi-collector transistor of the opposite type is connected serially between the collectors of the Darlington pair from base to emitter. One collector is diode connected to the base and the other is returned to a potential source. The collectors are of equal area.
    Type: Grant
    Filed: May 12, 1986
    Date of Patent: May 5, 1987
    Assignee: The Grass Valley Group
    Inventors: Birney D. Dayton, Richard Bannister
  • Patent number: 4663599
    Abstract: A four-terminal integrated circuit high-frequency RF amplifier connects to external circuitry via a ground terminal, and RF input terminal, an RF output terminal and a DC biasing terminal. A two stage amplification architecture is employed--a current gain transistor (common-emitter) is cascoded with a subsequent voltage gain transistor (common-base) while yet maintaining RF signal inversion overall from input to output so as to increase stability. A biasing current-mirror transistor provides biasing current to the current-gain transistor. A fourth transistor connected as a forward-biased collector-base shorted diode between the current mirror biasing transistor and a common external biasing terminal supplies bias current to the current-mirror biasing transistor while simultaneously minimizing voltage swings across the current-gain transistor.
    Type: Grant
    Filed: May 21, 1985
    Date of Patent: May 5, 1987
    Assignee: General Electric Company
    Inventor: Richard J. Patch
  • Patent number: 4631495
    Abstract: A low-noise radio-frequency preamplifier, especially suited for use in the reception channel of a nuclear magnetic resonance spectrometer and the like, utilizes a low-noise input stage having a plurality of bipolar junction transistors effectively connected in radio-frequency parallel, but with each of the plurality of parallel bipolar transistors isolated from one another for direct current flow through at least one electrode thereof.
    Type: Grant
    Filed: May 6, 1985
    Date of Patent: December 23, 1986
    Assignee: General Electric Company
    Inventors: Otward M. Mueller, William A. Edelstein
  • Patent number: 4631493
    Abstract: The present invention includes an apparatus and a method for connecting at least a pair of stages in DC series between a pair of power-supply potentials so as to provide economical utilization of the power supply. The stages are connected so as to maintain their AC independence.
    Type: Grant
    Filed: March 18, 1985
    Date of Patent: December 23, 1986
    Assignee: Eaton Corporation
    Inventors: George D. Vendelin, Behruz Rezvani
  • Patent number: 4628278
    Abstract: An amplifying system and method produces a substantial reduction in the D.C. and even-order harmonics in an output signal by employing a first inverting amplifying stage cascaded with an attenuating stage which is cascaded with a second inverting amplifying stage. The electrical characteristics of each of the two inverting amplifying stages are substantially the same. The gain, in dB, exhibited by each of the amplifying stages is substantially equal to the attenuation loss, in dB, produced by the attenuator stage. Conventional components and fabrication techniques allow substantial attenuation of the D.C. and even-order harmonic components produced by the nonlinearities in the active devices of the amplifiers as compared to a single amplifier case producing the same gain A.
    Type: Grant
    Filed: June 28, 1984
    Date of Patent: December 9, 1986
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Jeffrey S. Bottman
  • Patent number: 4628281
    Abstract: The base of a transistor constitutes the input of an amplifier arrangement, to which an input signal may be applied. The emitter of this transistor is coupled to the negative power-supply terminal by means of a first resistor. The collector of this transistor is coupled to the input terminal of a first current multiplier circuit, whose output terminal is connected to the output of the amplifier arrangement and to the emitter of the transistor by means of a second resistor. The first current multiplier circuit further has a sum terminal which is connected to the positive power-supply terminal. In order to reduce the distortion in the arrangement it further comprises a second current multiplier circuit whose input terminal is connected to the collector of the transistor and whose sum terminal is connected to the input terminal of the first current multiplier circuit. The output of the second current multiplier circuit is connected to the negative supply terminal of the transistor.
    Type: Grant
    Filed: November 14, 1985
    Date of Patent: December 9, 1986
    Assignee: U.S. Philips Corporation
    Inventor: Adrianus Sempel
  • Patent number: 4588956
    Abstract: An amplifier-limiter device intended to amplify a received signal up to a predetermined value. The device comprises 2n integrated circuits of the emitter coupled logic type which are connected in series, these integrated circuits forming n successive pairs and each pair having associated with it a compensating circuit which compensates for the linear distortion caused by the integrated circuits of the pair.
    Type: Grant
    Filed: November 21, 1984
    Date of Patent: May 13, 1986
    Assignee: Alcatel Thomson Faisceaux Hertziens
    Inventors: Patrick de Corlieu, Jacques Bursztejn
  • Patent number: 4563652
    Abstract: A dual-stage band pass-band reject filter with feedback. Two state variable band pass filters with identical topology are cascaded as first and second stages. Each stage employs two inverting adders and two inverting integrators in a state variable topology, and each provides a band pass output and a band reject output. Both stages are selectively tuned to the same fundamental frequency. The filter output may be switched from a band pass to a band reject mode. In the band reject mode decreased attenuation of harmonics of the fundamental frequency is achieved by providing a predetermined amount of feedback from either the band reject output or band pass output of the second stage to the input of a respective one of the two adders of the first stage.
    Type: Grant
    Filed: April 12, 1985
    Date of Patent: January 7, 1986
    Assignee: Audio Precision, Inc.
    Inventor: Bruce E. Hofer
  • Patent number: 4563653
    Abstract: An improved servo demodulator channel employing a transconductance balanced modulator as a polarity switch, an AGC amplifier and a signal separation circuit. A transconductance balanced modulator comprises two amplification transistors and four output transistors which together form two signal channels, each comprised of an amplification transistor connected in parallel to two output transistors. In a specific embodiment, the transistors are n-p-n transistors, the emitters of the two output transistors associated with a given channel being connected to the collector of the amplification transistor. The transconductance balanced modulator is configured so that the two amplification transistors are interconnected as a differential amplifier, and the base electrode of an output transistor in one signal channel is connected to the base electrode of an output transistor in the other signal channel, the base electrodes of the other two output transistors also being interconnected.
    Type: Grant
    Filed: September 23, 1982
    Date of Patent: January 7, 1986
    Assignee: Pertec Computer Corporation
    Inventor: Avraham Perahia
  • Patent number: 4562406
    Abstract: An improved voltage controlled amplifier employing an operational transconductance amplifier which is temperature independent and offering an improved dynamic range for the input signal is disclosed. An operational amplifier configured in the inverting mode is used as an input device having a first operational transconductance amplifier in the feedback path as a gain control element. The output of the operational amplifier provides a control voltage to effectively drive a second operational transconductance amplifier.
    Type: Grant
    Filed: September 16, 1982
    Date of Patent: December 31, 1985
    Assignee: Ampex Corporation
    Inventor: Jay S. Baker
  • Patent number: 4559502
    Abstract: A multi-stage amplifier (21, 22, 23, or 24) has three or more amplifier stages (A1, A2, and A3) arranged in a capacitatively nested configuration for frequency compensation. The technique consists of nesting two of the stages together with a pole-splitting capacitor (C1) to form a stable device (21 or 22) and then nesting this device and a third of the stages together with another pole-splitting capacitor (C2) to form the amplifier.
    Type: Grant
    Filed: April 19, 1984
    Date of Patent: December 17, 1985
    Assignee: Signetics Corporation
    Inventor: Johan H. Hiujsing
  • Patent number: 4559501
    Abstract: A signal translating circuit comprises first and second transistors connected to each other in such a manner that a collector of the first transistor is coupled with a base of the second transistor and an emitter of the second transistor is coupled with a base of the first transistor so as to form a negative feedback circuit arrangement, an input resistor connected between the base of the first transistor and a source of an input voltage signal for converting the input voltage signal into an input current signal to be supplied to the base of the first transistor, a biasing current source connected to the base of the first transistor, first and second current sources supplying the same currents and connected to the emitter of the first transistor and a collector of the second transistor, respectively, and means for deriving an output current signal from the collector of the second transistor.
    Type: Grant
    Filed: December 22, 1983
    Date of Patent: December 17, 1985
    Assignee: Sony Corporation
    Inventors: Tooru Akutagawa, Yukihiko Machida
  • Patent number: 4559503
    Abstract: An amplifier for correcting group time delay of electrical signals comprises first and second DC voltage supply terminals, an input transistor to which a signal to be amplified is applied, an output transistor, a group time delay corrector network, at least one capacitor and a choke. The input and output transistors have their respective collector-emitter junctions connected in series between the first and second supply terminals. They are configured as common-emitter voltage amplifiers. The collector of the input transistor is connected to the base of the output transistor through the group time delay corrector network. The emitter of the output transistor is connected to one of the supply terminals through the capacitor and to the collector of the input transistor through the choke.
    Type: Grant
    Filed: January 29, 1985
    Date of Patent: December 17, 1985
    Assignee: Alcatel Thomson Faiscequx Hertziens
    Inventors: Michel Camand, Jean-Pierre Chobert
  • Patent number: 4555677
    Abstract: An amplifier for use in the I.F. stages of an F.M. radio receiver comprises several identical direct-coupled stages 2,4,6 each comprising common emitter transistors 8 and inductive loads 10.
    Type: Grant
    Filed: April 3, 1984
    Date of Patent: November 26, 1985
    Assignee: Sinclair Research Limited
    Inventor: Graham E. Beesley
  • Patent number: 4533878
    Abstract: A circuit for amplifying electrical signals, particularly for devices for transmitting frequency-modulated emitter coupled logic (ECL) broad-band signals by means of coaxial lines utilizes a plurality of ECL logic elements as amplifier stages. The input of each logic element is connected to a bias voltage and is charged by means of a coupling capacitor with the signal to be amplified. The circuit amplifies electrical signals to ECL level with an improved signal pulse duty factor.
    Type: Grant
    Filed: March 23, 1983
    Date of Patent: August 6, 1985
    Assignee: Siemens Aktiengesellschaft
    Inventors: Hans Rehm, Horst Breitenfeld
  • Patent number: 4528518
    Abstract: A chain amplifier assembly, includes a semiconductor body, a chain amplifier disposed in the semiconductor body and having an input, an output, a plurality of interconnected amplifier stages having transition regions therebetween, each of the stages including a plurality of field-effect transistors having source, gate and drain terminals, each of the source terminals being connected to a given common source potential, a plurality of ohmic resistors and inductances connected in series between the gate terminals forming a gate line, a plurality of capacitances each having a lead connected in parallel to the gate line and another lead connected to the given common source potential, a plurality of inductances connected in series between the drain terminals forming a drain line, a plurality of additional ohmic resistors having a lead connected in parallel to the drain line and another lead connected to the given common source potential, a plurality of additional capacitances having a lead connected in parallel to
    Type: Grant
    Filed: July 28, 1983
    Date of Patent: July 9, 1985
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jakob Huber, Ewald Pettenpaul, Felix Petz
  • Patent number: 4486718
    Abstract: The present invention provides an amplifier having cascade-connected first and second transistors, a constant current source for supplying an operating current to the first transistor, and a load resistor connected to the collector of the first transistor at one end and to a substantially constant voltage terminal at the other end. The amplifier arrangement of the invention removes the necessity of a large capacitance capacitor for noise suppression.
    Type: Grant
    Filed: March 19, 1982
    Date of Patent: December 4, 1984
    Assignee: Nippon Electric Co., Ltd.
    Inventor: Mitsutoshi Sugawara
  • Patent number: 4472689
    Abstract: A multi-purpose filter includes a first integration circuit including a first differential amplifier having first input terminals and a first output, a first capacitor connected with the first output, and a first output circuit; a second integration circuit connected in series with the first integration circuit and including a second differential amplifier having second input terminals and a second output, a second capacitor connected with the second output, and a second output circuit; a feedback circuit connected between the first and second output circuits and the first input terminals; and a plurality of capacitor terminals connected with both ends of the first and second capacitors such that different filter characteristics are obtained by selecting different ones of the first input terminals, the second input terminals and the plurality of capacitor terminals as an input and an output of the filter.
    Type: Grant
    Filed: March 18, 1983
    Date of Patent: September 18, 1984
    Assignee: Sony Corporation
    Inventors: Noriyuki Fukushima, Masao Suzuki
  • Patent number: 4471319
    Abstract: A buffer amplifier circuit is provided in which the effects of power supply noise is substantially reduced while contemporaneously exhibiting the attributes of low thermal distortion and high linearity. The amplifier comprises a source follower input stage which contains additional devices to absorb power supply variations, and an emitter follower output stage. A constant-current bias network includes means for bootstrapping the gate-to-drain capacitance of the input source follower.
    Type: Grant
    Filed: June 28, 1982
    Date of Patent: September 11, 1984
    Assignee: Tektronix, Inc.
    Inventor: Arthur J. Metz
  • Patent number: 4454480
    Abstract: An electronic Class B master power amplifier is cascaded with a like slave Class B electronic power amplifier between ground and an output terminal to which the output of the slave amplifier is connected. A first pair of D.C. sources deliver potentials of magnitude V.sub.ss but opposite polarity to the master power amplifier and each have a reference terminal connected to ground. A second pair of D.C. sources deliver potentials of magnitude V.sub.ss but opposite polarity to the slave power amplifier, and each have a reference terminal connected to the outupt of the master amplifier. A common input signal to be amplified is delivered to the inputs of the master and slave amplifiers.
    Type: Grant
    Filed: July 15, 1981
    Date of Patent: June 12, 1984
    Inventors: Lars P. Allfather, John E. Levreault
  • Patent number: 4433305
    Abstract: A push-pull amplifier circuit using bipolar transistors in which non-linear distortion caused by the base-emitter voltages of the amplifying transistors of the circuit is eliminated without the use of negative AC feedback and in which variations in a DC output level at the output terminal of the amplifier are detected and fed back to the input side of the amplifier whereby the stability of the circuit at very low frequencies is remarkably improved. A first amplifier stage includes a first transistor having a base to which an input signal is applied and a second transistor the base of which is coupled to an output of the first transistor with the second transistor being of the opposite conductivity type to the first transistor. A current mirror circuit supplies currents to the first and second transistors with the currents thus supplied having a constant ratio. A second amplifying stage is provided having the same construction.
    Type: Grant
    Filed: September 19, 1980
    Date of Patent: February 21, 1984
    Assignee: Pioneer Electronic Corporation
    Inventors: Akio Ozawa, Susumu Sueyoshi, Keishi Sato, Kikuo Ishikawa, Kiyomi Yatsuhashi, Satoshi Ishii, Masamichi Yumino
  • Patent number: 4423388
    Abstract: An RF amplifier including first and second FETs which are interconnected to function as a single transistor with improved gate. An input signal is applied across the gate and source of the first FET, and an output signal is obtained across the drain and source of the second transistor. RF coupling of the FETs is provided by first and second serially connected transmission lines connected between the drain of the first FET and the gate of the second FET. A third transmission line connects the common terminal of the first and second transmission line to circuit ground. In a preferred embodiment, the amplifier comprises a monolithic circuit formed in gallium arsenide with the transmission lines comprising microstrip.
    Type: Grant
    Filed: October 29, 1981
    Date of Patent: December 27, 1983
    Assignee: Watkins-Johnson Company
    Inventors: Emil J. Crescenzi, Jr., Walter T. Wilser, Richard W. Oglesbee, Richard B. Gold
  • Patent number: 4417216
    Abstract: An operational amplifier includes an input stage, an output stage including first and second NPN output transistors and an intermediate stage including first and second emitter follower transistors. In this manner, a .beta..sup.3 current gain is achieved from the amplifier output to the output of the input stage to reduce output loading effects on the input stage. A first capacitor network is coupled between the amplifier output and the output of the input stage to frequency stabilize the amplifier. A second capacitor is coupled between the base terminals of the first and second emitter follower transistors, and a resistor (or diode) is coupled between the emitter of the first emitter follower transistor and the base of the second emitter follower transistor. This network frequency stabilizes the parasitic feedback loop associated with the intermediate stages, the NPN output transistor and the first capacitor network.
    Type: Grant
    Filed: August 17, 1981
    Date of Patent: November 22, 1983
    Assignee: Motorola, Inc.
    Inventor: William F. Davis
  • Patent number: 4412335
    Abstract: A digital signal distribution system for distributing digital signals to remote points of a machine. It is comprised of a distribution device arranged at each of said points. In each device, a receiver receives on its true and complementary inputs, the signal to be distributed. The drivers are connected to the receivers through a crossed connection, the true output of the receiver being connected to the complementary input of the driver, and the complementary output of the receiver being connected to the true input of the driver, so as to cancel the skew of the pulse width of the signal to be distributed. The signals on outputs of the driver circuits can be utilized locally or transmitted to another remote point.
    Type: Grant
    Filed: September 25, 1981
    Date of Patent: October 25, 1983
    Assignee: International Business Machines Corporation
    Inventors: Jean-Claude Froment, Jean-Louis Marijon, Gerard Orengo, Michel Verhaeghe
  • Patent number: 4408167
    Abstract: A multi-stage current mode differential amplifier is disclosed in which each cascaded stage includes a pair of input transistors which have their bases connected to a common voltage source and a pair of control transistors which have their emitters connected to a common current source. A diode-like device is inserted between the collector of a control transistor in one stage and the emitter of an input transistor of the succeeding stage which increases the input impedance seen by the control transistor, thereby permitting an increase in amplification for that stage. In both embodiments, the current signal is amplified at a higher rate than the rate of increase of the bias currents supplied to the emitters of the control transistors in each stage.
    Type: Grant
    Filed: April 3, 1981
    Date of Patent: October 4, 1983
    Assignee: International Business Machines Corporation
    Inventors: Dennis L. Rogers, Albert X. Widmer
  • Patent number: 4401953
    Abstract: An electrical RF signal amplifier for providing high temperature stability and RF isolation and comprised of an integrated circuit voltage regulator (26), a single transistor (22), and an integrated circuit operational amplifier (24) mounted on a circuit board (80) such that passive circuit elements (92) are located on side of the circuit board while the active circuit elements (22, 24, 26) are located on the other side. The active circuit elements are embedded in a common heat sink (70) so that a common temperature reference is provided for changes in ambient temperature. The single transistor (22) and operational amplifier (24) are connected together to form a feedback amplifier powered from the voltage regulator (26) with transistor (22) implementing primarily the desired signal gain while the operational amplifier (24) implements signal isolation. Further RF isolation is provided by the voltage regulator (26) which inhibits cross-talk from other like amplifiers powered from a common power supply.
    Type: Grant
    Filed: July 17, 1981
    Date of Patent: August 30, 1983
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventors: William A. Adams, Victor S. Reinhardt
  • Patent number: 4389620
    Abstract: A current transfer amplifier includes a voltage signal source for supplying a voltage signal to be amplified, a voltage/current converter for converting the voltage signal from the voltage signal source into a current signal proportional to the voltage signal, a tone control circuit of a current amplification type supplied with the current signal, a non-linear switching element interposed between the output of the voltage/current converter and the input of the tone control circuit to transmit the current signal therethrough, a variable resistor for receiving the current signal to produce a voltage signal proportional to the current signal.
    Type: Grant
    Filed: January 27, 1981
    Date of Patent: June 21, 1983
    Assignee: Sony Corporation
    Inventor: Kazuo Yamaguchi
  • Patent number: 4348643
    Abstract: A constant phase limiter is disclosed utilizing cascaded RC coupled amplifiers with complex feedback. In the illustrative embodiment, five NPN transistors connected in a common emitter configuration are cascaded. The first stage is a signal conditioning amplifier for setting the limiting threshold. By harmoniously selecting the operating conditions for each of the other stages, an overall constant phase/limited output characteristic can be achieved for the desired range of input signal.
    Type: Grant
    Filed: November 5, 1980
    Date of Patent: September 7, 1982
    Assignee: General Electric Company
    Inventor: W. Richard Tennyson