Abstract: An object of the present invention is to provide a radio frequency power amplifier of multi stage amplifying method that is designed to reduce instability of output power caused by electromagnetic coupling of bias supply terminals and interconnections of each stage to thereby operate stably. Another object of the present invention is to provide a radio frequency power amplifier that is designed to reduce distortion of output power caused by electromagnetic coupling of bias supply terminals and interconnections of each stage to thereby provide high efficiency.

Abstract: A hybrid preamplifier with a vacuum tube input stage driving a JFET output stage dubbed TIJO (for Tube Input JFET Output) that uses zero feedback circuitry and a common low voltage B+ power supply. A single output low voltage transformer provides all necessary voltages including the filament voltage. No attempt is made to minimize distortion or maximize bandwidth by adding feedback. The vacuum tube is mounted externally to allow easy tube swapping for varying the gain and tonal palette, with no dangerous high voltages present.

Abstract: A high-frequency circuit is provided that can prevent the generation of an undesired peak and contribute to the reduction in area of a chip. The high-frequency circuit includes an amplifying block 10 in which an amplifying element 11, a choke inductor 12, and a by-pass capacitor 13 are provided, and an amplifying block 20 in which an amplifying element 21, a choke inductor 22, and a by-pass capacitor 23 are provided. Electric power is supplied from a common power terminal 31 to the amplifying element 21 via the choke inductor 22 and to the amplifying element 11 via the choke inductor 12 and a resistive element 37. The amplifying elements 11 and 21, the choke inductors 12 and 22, the by-pass capacitors 13 and 23, and the resistive element 37 are formed on the same substrate.

Abstract: In order to provide a high sensitivity variable gain amplifier, there is provided a structure in which at least one path comprising at least a stage of the voltage-input/voltage-output amplifier+ a stage of voltage-input/current-output amplifier and a path comprising a stage of the voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal or, a structure in which a plurality of paths each comprising at least a stage of voltage-input/voltage-output amplifier+a stage of voltage-input/current-output amplifier are connected in parallel between the input terminal and output terminal. A gain is switched by selecting and operating any one of paths. When any one path is selected, an input impedance viewed from the input terminal is suppressed almost not to change or an output impedance viewed from the output terminal is suppressed almost not to change. Thereby, a high sensitivity wireless receiver can be realized.

Abstract: An FET band amplifier for providing a high gain. An FET band amplifier 5 included in an AM receiver comprises amplifiers 11 to 15 e.g. at five stages and a BPF 16 inserted halfway in their connection. Each of the amplifiers 11 to 15 acts as a differential amplifier comprising a p-channel FET as an amplification element. The BPF 16 allows the passage of a component of a band wider than the amplification band of the whole of the FET band amplifier and reduces a 1/f noise by removing the low-band component of a signal amplified by the amplifiers 11 to 13 at three stages and thermal noise by removing the high-band component. Thus, each of the amplifiers 14, 15 connected to the rear stage of the BPF 16 is not saturated by a noise component.

Abstract: An amplifier and bypass switch circuit includes a circuit input, a circuit output, an amplifier and a switching circuit. The amplifier has an amplifier control input, and a first amplifier output. The amplifier control input is connected to the circuit input. The amplifier output is connected to the circuit output. The switching circuit includes a control input, a switch input, a switch output and a phase matching network. The switch output is connected to the circuit output. The switch input is connected to the circuit input. The phase matching network preserves phase information when the amplifier and bypass switch circuit switches between an amplifier mode and a bypass mode.

Abstract: A circuit and method for bridging an analog signal between two integrated circuits operating at different supply voltages. The circuit is a two stage fixed gain amplifier. The first stage is a transconductance amplifier and the second stage is an operational amplifier. The first stage converts an input signal from a voltage into a current. The second stage converts the current signal to an output voltage signal.

Abstract: A power amplifier system has a high frequency power amplifier circuit section employing source-grounded enhancement type n-channel MESFETs for receiving a drain bias voltage and a gate bias voltage of zero volts or positive low potentials supplied from a unipolar power supply, and amplifying a superposed input signal therewith to output an amplified signal indicative of a change in drain currents. An output matching circuit section applies impedance matching to the amplified signal and outputs the resultant signal. A gate bias voltage circuit section supplies a gate bias voltage to the high frequency power amplifier circuit. When a forward direct current gate voltage is applied to a gate terminal with a source terminal coupled to ground, the DC gate voltage becomes greater than or equal to 0.65 volts, the DC gate voltage causing a gate current value per gate width of 100 micrometers to exceed 100 microamperes.

Abstract: A combined multiplexer and switched gain circuit (250) that selectively multiplexes differential analog signals from a primary channel (20) and a diversity channel (22) in a diversity receiver system (10) to a single output. The circuit (250) is based on a current mode logic design where a plurality of separate conduction paths (278-284) are provided between a voltage line (266) and a current source (268). An output line (264) of the circuit (250) is coupled to each conduction path (278-284) so that the differential analog signals from the primary channel (20) and the diversity channel (22) can be selectively outputted to the circuit (250). Each conduction path (278-284) includes a gain device, such as degenerative resistor, that provides signal gain or no signal gain for that conduction path (278-284). Control signals are selectively applied to switching devices (310-324) and each conduction path (278-284) so that the conduction path (278-284) can be independently selected to provide the multiplexing.

Abstract: A drain current flowing through a first transistor in a multistage amplifier circuit and a drain current flowing through a second transistor may have different current values from each other by a current regulator circuit. As a result, the amplifying operation of the second transistor may not be saturated even when the output power of the first transistor is increased. Accordingly, the circuit can operate with low current consumption and improve the output power.

Abstract: By extracting a portion of RF signals from an input side of a multistage RF amplifier with a detector, and converting extracted signals into envelope signals, low-frequency second-harmonic distortion components are efficiently extracted. Then, the extracted low-frequency second-harmonic distortion components are amplified with a low-frequency amplifier, and phase adjusted with a phase shifter, after which they are injected into a gate or base bias of the final stage of the multistage RF amplifier. As a result, the low-frequency second-harmonic distortion components are converted into third-harmonic distortion due to the non-linearity of transistors, and the third-harmonic distortion thus obtained cancels out the third-harmonic distortion originally present in the multistage RF amplifier.

Abstract: The invention discloses a system for improving performance of the RF amplification stage of communication receivers by accounting for the signal environment of the RF amplifier. The linearity, gain and power supply voltage of the RF amplification stage of the communication receiver is adjusted to produce an optimal signal into the succeeding narrow-band amplification stage(s). The adjustment of the RF stage includes mechanisms such as adjusting the RF amplifier power supply level using a DC to DC converter. It also includes allowing distortion in the RF amplification stage if the distortion in the RF amplification stage does not affect the target signal. For example, if there were a strong signal that fell within the same band as the target signal, amplification would be allowed to be so high that it distorted the undesired signals, but not the tined signals.

Abstract: The invention relates to an amplification device AD, comprising a first and a second amplifier AMP1 and AMP2, arranged in cascade, each amplifier being provided with a feedback loop Zi (where i=1 or 2) and having a gain proper Gi equal to Ai/(1+Ai.Zi). In accordance with the invention, the value of the inverse of the gain proper Gi of the first amplifier AMP1 is substantially equal to three times the value of the inverse of the gain proper G2 of the second amplifier AMP2 raised to the power of three: (1/G1)=3/(G2)3. Such a choice provides the amplification device AD with an optimum linearity.

Abstract: A broadband power amplifier module for high bit-rate SONET/SDH transmission channels, such as OC-192 and OC-768 applications. The power amplifier module, or also frequently referred to as modulator driver module, comprises amplifiers connected in series to amplify an input signal. A bias tee circuit is incorporated into the power amplifier module by connecting a conical shape inductor between the output stage of the amplifiers and the supply voltage and connecting a pair of blocking capacitors also at the output stage of the amplifiers. The conical shape inductor is adapted to provide high impedance over the entire bandwidth. The capacitors are adapted to provide high self-resonant frequency that is approaching or exceeding the bandwidth frequency. A power detection circuit can also be incorporated into the power amplifier module at the output stage of the amplifiers. The power detection circuit has a voltage divider circuit connected between the output stage and a ground supply.

Abstract: A variable gain amplifier includes at least two amplifiers for amplifying a signal, the at least two amplifiers being connected in series with one another, and a variable resistor having a resistance that is controlled in accordance with a voltage applied to a control terminal, the variable resistor being connected between the outputs of two of the at least two amplifiers having opposite output phases. As a result, the variable gain amplifier is capable of a low-gain operation and an attenuating operation in a high-frequency amplifier used in a communications device for transmitting and receiving high-frequency signals.

Abstract: Expansion of the bandwidth of a wideband CMOS data amplifier is accomplished using various combinations of shunt peaking, series peaking, and miller capacitance cancellation. These various combinations are employed in any of the amplifier input stage, in intermediate stages, or in the last stage.

Abstract: A node for commonly supplying a ground potential in an amplification circuit (MMIC11) is formed. The input and output system ground surfaces of a printed wiring board (PWB) on which the amplification circuit (MMIC11) is to be mounted are electrically separated from each other on the printed wiring board (PWB). Since no ground pattern is present on the amplification circuit (MMIC11), the ground node of the amplification circuit (MMIC11) serves as a means for supplying a true ground potential. While a compact package is realized by preventing an increase in number of leads, oscillation is prevented, so a high gain can be realized.

Abstract: A two-stage amplifier includes a first stage and a second stage that are DC-connected through a coupling capacitor Cp. A charge pump generates a bias voltage Vp that is applied across the coupling capacitor Cp leads to maintain the time average of the voltage across said coupling capacitor constant.

Abstract: A high-frequency circuit is provided that can prevent the generation of an undesired peak and contribute to the reduction in area of a chip. The high-frequency circuit includes an amplifying block 10 in which an amplifying element 11, a choke inductor 12, and a by-pass capacitor 13 are provided, and an amplifying block 20 in which an amplifying element 21, a choke inductor 22, and a by-pass capacitor 23 are provided. Electric power is supplied from a common power terminal 31 to the amplifying element 21 via the choke inductor 22 and to the amplifying element 11 via the choke inductor 12 and a resistive element 37. The amplifying elements 11 and 21, the choke inductors 12 and 22, the by-pass capacitors 13 and 23, and the resistive element 37 are formed on the same substrate.

Abstract: Transimpedance amplifier having an input stage (1) to which an input current to be amplified is fed and an output stage (2) which outputs an output voltage (uo) corresponding to the amplified input current. By means of a current control circuit (4) the current (Ic) flowing through the amplifying element (Q1) of the input stage (1) is detected and controlled in such a way that said current is independent of the ambient temperature and of the supply voltage (Vcc). To detect the current (Ic) a dummy transimpedance amplifier (5) is used in combination with a current mirror circuit (6), the current (Ic) being controlled in that the control voltage (Uc) of a further transistor (Qc) coupled to the amplifying element (Q1) configured as a transistor is adjusted accordingly.

Abstract: A Darlington amplifier comprising a first stage and a second stage. The first stage generally comprises one or more first transistors and configured to generate a first and a second signal in response to an input signal. The second stage generally comprises one or more second transistors and may be configured to generate an output signal in response to the first and second signals. The Darlington amplifier may be configured to provide thermal emitter ballasting of the first transistors.

Abstract: A high-frequency power amplifying apparatus includes a plurality of series-connected amplifiers, a power controller for selectively supplying an output terminal with an output from a desired one amplifier in accordance with a demanded output power and for causing one or more amplifiers downstream of the desired one amplifier to be in a cutoff state, and an output delay line connected between the output terminal and the final-stage amplifier and having a line length thereof providing the final-stage amplifier with a high impedance as viewed from the output terminal when the final-stage amplifier is in a cutoff state.

Abstract: A multistage power amplifier circuit with superior isolation between gain stages provides alternative common lead currents paths from the individual gain stage elements to obtain improved stability and operational performance.

Abstract: A high-frequency semiconductor amplifier circuit minimizing deterioration of high-frequency characteristics and attaining high thermal stability. A driver stage of a power amplifier has a multi-stage configuration with multi-finger HBTs connected in shunt with each other, each multi-finger HBT having a single emitter. An output stage has a single stage configuration multi-finger HBTs connected in shunt with each other, each HBT including two emitters. As a result, while an increase in capacitance of a p-n junction between an emitter layer and a base layer of the driver stage is prevented, thermal nonuniformity arising in the output stage is minimized. Thus, a power amplifier as a whole is configured with high thermal stability without deterioration of a high-frequency characteristic of the power amplifier.

Abstract: A power amplifier module comprises a plurality of amplifier stages, each including a reference amplifier for emulating the operation of the amplifier. The current flowing to the base of a bipolar transistor that forms each reference amplifier depending on an input power level is detected, amplified, and supplied as base current of the transistor of the corresponding amplifier.

Abstract: A high-frequency power amplifier includes a semi-insulating GaAs substrate having disposed thereon an amplifying bipolar transistor, a bias circuit, a bias circuit output terminal connected to the bias circuit, and a base electrode connection terminal connected to the bipolar transistor; a chip inductor connected between the bias circuit output terminal and the base electrode connection terminal; and a mounting substrate on which both the semi-insulating GaAs substrate and the chip inductor are disposed, side by side.

Abstract: A tuning circuit for compensating an inter-stage matching network included in an integrated multistage radio frequency (RF) amplifier includes one or more capacitors connected in shunt between ground and a voltage supply to the amplifier. The capacitors have values selected to effectively compensate the inductance from a pull-up inductor included in the inter-stage matching network to provide improved inter-stage matching when inductance and capacitance values of the inter-stage matching network deviate from their desired values due to parasitics and/or when other components, such as input-stage and output-stage transistors of the amplifiers deviate from their pre-fabrication simulation models.

Abstract: Transimpedance amplifiers that provide moderate bandwidth and very large overdrive current capabilities while consuming a minimum amount of power supply current. Existing transimpedance amplifier topologies use a quiescent current somewhat larger than the overdrive current that must be tolerated while the present invention reduces the value of the quiescent current and can tolerate bi-directional overdrive current several times larger than the current consumption of the circuit itself. The preferred embodiment of the invention is arranged such that stability of the circuit is ensured under all operating conditions, including overdrive conditions. Various embodiments are disclosed.

Abstract: A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive a first frequency f1 and second frequency f2 (f2=2×f1). It includes a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor. The output circuit has a transmission line connected to the drain end of the output transistor, a parallel resonance circuit connected in series to the transmission line to resonate at harmonics of a frequency twice the frequency f2, a series resonance circuit provided between one end of the resonance circuit and the ground to resonate at harmonics of a frequency twice the frequency f2 and an output matching circuit provided in series to the other end of the parallel resonance circuit for matching with f1 and f2.

Abstract: A low-power differential optical receiver useful for high-speed optical communication between CMOS chips includes a multi-stage differential amplifier circuit including a first differential transimpedance stage (22) followed by a plurality of differential feed-forward, high-bandwidth gain stages (24) and a final, differential-to-single-ended converter output stage (26). The inputs of the transimpedance stage receive input signals from a MSM or PIN diode photo-detector. Transistors having plural, different threshold levels are employed within each differential amplifier stage to reduce the size of the footprint of the circuit and improve the gain and bandwidth while decreasing the parasitic capacitance. The optical receiver is fabricated on a silicon on insulator chip, such as in an ultra-thin silicon on sapphire CMOS process which enables the design of high speed circuits with low power consumption and no substrate cross-talk.

Abstract: An amplifier including a first transistor whose emmiter is connected to an amplifier output and whose collector is connected to a first of two current supply terminals, with the base of the first transistor being connected to an input. A constant load circuit is connected between the emitter of the first transistor and the second current supply terminal. The constant load circuit is adapted to ensure that the current through the first transistor will always exceed a lowest value, so that the first transistor will always lie in a limited, generally linear area of its working curve.

Abstract: The present invention provides a breakdown resistant transistor structure for amplifying communication signals. This structure includes a first NMOS transistor having a source connected to ground and a first gate for receiving the input radio frequency signal. The first gate is disposed above a first insulator and the first NMOS transistor having a first transconductance and a first breakdown voltage associated therewith. Also included is a second NMOS transistor having a source connected to the drain of the first NMOS transistor, a gate connected to the reference DC voltage, and a drain that provides the output for the amplified radio signal, the load being disposed between the reference DC voltage and the drain of the second NMOS transistor. The second gate is disposed above a second insulator, the second NMOS transistor has a second transconductance and a second breakdown voltage associated therewith, and the second insulator may be thicker than the first insulator.

Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.

Abstract: A linear amplifier comprises a first current-mirror circuit including a first transistor whose base and collector are short-circuited for diode connection and whose collector is connected via a first resistance to a power-supply terminal, a second current-mirror circuit including a second transistor whose collector and base are connected to power-supply terminals, and an amplification transistor whose emitter is grounded. The base of the first transistor and the emitter of the second transistor are connected to the base of the amplification transistor.

Abstract: Receive band filtering between the last two stages of an N-stage power amplifier can reduce the Rx band noise. There are N−1 interstage matching networks interposing N stage amplifiers, where N≧2. The interstage matching networks and stage amplifiers are electrically connected in series. The N−1th interstage matching network includes a receive band reject filter positioned proximate to the output of the N−1th stage power amplifier.

Abstract: The present invention teaches a variety of transconductance circuits formed having two or more class AB transconductor amplifiers coupled in parallel. The class AB transconductor amplifiers have non-linear voltage to current transfer functions and are each designed with an offset chosen such that the combination of the individual nonlinear transfer functions achieve a more linear transconductance circuit.

Abstract: An amplifier circuit for amplifying an input signal to generate an amplifier output signal incorporates a cascaded series of reflection amplifiers arranged along a signal path and operative to amplify signals propagating in a forward direction along the signal path. The circuit is operative to counteract signal propagation in a reverse direction along the signal path, thereby hindering spontaneous oscillation from arising within the circuit. Incorporation of reflection amplifiers into the circuit enables it to provide high gain, for example 50 dB, while consuming low currents, for example, tens of microamperes. The circuit is especially suitable for use at intermediate frequencies in radio receivers such as mobile telephones.

Abstract: A two-stage op-amp circuit including a double-cascode telescopic op-amp circuit in the input stage and a fully-differential op-amp circuit in the output stage and having very high open-loop DC gain, very high unity-gain frequency, and relatively very low power consumption is presented. The input stage op-amp circuit and the output stage op-amp circuit are each comprised of a plurality of electrically connected MOSFET's. The input stage op-amp circuit provides very high gain, high input resistance, and large common mode rejection. The output stage op-amp circuit provides gain, low output resistance, and minimal output loss.

Abstract: Realizing a stabilized gain slope without increasing circuit scale or entailing extra time or care for correcting impedance. A resonant circuit that is made up of a capacitor and an inductor is provided in an output stage outside a feedback loop for realizing peaking at a particular frequency and for realizing a gain slope having a desired slope of, for example, 1 dB or more.

Abstract: A high-frequency power amplifying apparatus includes a plurality of series-connected amplifiers, a power controller for selectively supplying an output terminal with an output from a desired one amplifier in accordance with a demanded output power and for causing one or more amplifiers downstream of the desired one amplifier to be in a cutoff state, and an output delay line connected between the output terminal and the final-stage amplifier and having a line length thereof providing the final-stage amplifier with a high impedance as viewed from the output terminal when the final-stage amplifier is in a cutoff state.

Abstract: The present invention provides a method and the apparatus thereof to protect MOS components from antenna effect. Via the bypass PMOS and NMOS transistors, charges with either polarity are conveyed and neutralized. The present invention thus protects the gate oxide layer of the MOS component in the IC circuit from damage or degradation.

Abstract: There is disclosed an amplifier comprising: 1) a plurality of cascaded NMOS differential amplifier stages, wherein a first one of the plurality of cascaded NMOS differential amplifier stages is coupled to at least one input signal; 2) a PMOS differential amplifier stage having a first input coupled to a first NMOS differential output of a last one of the plurality of cascaded NMOS differential amplifier stages and a second input coupled to a second NMOS differential output of the last cascaded NMOS differential amplifier stage, wherein the PMOS differential amplifier comprises a first diode-connected PMOS load transistor having a gate and a drain connected to ground and a second diode-connected PMOS load transistor having a gate and a drain connected to ground; and 3) an output differential amplifier stage comprising: a) load transistors comprising a third PMOS transistor having a gate and a drain connected together and a source connected to a power supply rail and a fourth PMOS transistor having a gate coupl

Abstract: A multistage power amplifier circuit with superior isolation between gain stages provides alternative common lead currents paths from the individual gain stage elements to obtain improved stability and operational performance.

Abstract: A CCD signal processing channel with input and output offset correction is offered. Integrators are positioned to provide correction at the input to a correlated double sampling circuit and at the output of a programmable gain amplifier. Gain control is provided for the programmable gain amplifier. The second integrator may be all digital or may combine analog and digital signals. The channel may also be constructed using a digital programmable gain amplifier. The digital programmable gain amplifier can be combined with an analog programmable gain amplifier in the signal processing channel.

Abstract: The amplifier includes two or more amplification stages. The rear amplification stage amplifies an output signal of a front stage transistor is comprised of two or more transistors connected in parallel. Bias point of the front stage transistor and a first rear stage transistor is class AB. Base bias of a second rear stage transistor is controlled according to an RF input by a rear stage DC bias control circuit. As a result, the second rear stage transistor is turned on when the output power is high, whereas it is turned off when the output power is low or medium.

Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a driver transistor, with the amplifying transistor being connected in either a common emitter or a common source configuration and the driver transistor being connected in a corresponding common collector or a common drain configuration, depending upon whether bipolar or field effect transistors are used. A current-mirror bias circuit is coupled between an input terminal and an output terminal of the driver transistor, with a resistor being provided for coupling the current mirror to the input terminal of the driver transistor. The resistor, which typically has a value of between about 20 and 100 ohms, provides a negative impedance cancellation effect while minimizing power consumption at low bias levels.

Abstract: A process and product providing a High Efficiency Microwave Power Amplifier (HEMPA) which propagates S-Band microwave frequency square waves; utilizing a program simulating FETs at high DC-to-RF efficiencies, which analyses linear elements of selected FETs in a frequency domain, and non-linear elements of the FETs in a time domain, and converts the time domain values into the frequency domain, and performs DC and S-parameter simulated measurements based on predefined data for each FET. Individual FET parameters are extracted and isolated by converting the S-parameters to admittance or impedance parameters to derive FET models for each FET, which the program uses to provide a final output of a HEMPA circuit based on iterative simulations of an amplification circuit utilizing microwave topology and frequencies. Iterative simulations of the amplification circuit analyze output values of a plurality of cascaded stages of the FETs, which are arranged in a push-pull configuration.

Abstract: A radio frequency power amplifier module for a dual-band type mobile communication apparatus that can transmit and receive the first frequency f1 and the second frequency f2 (f2=2×f1) is structured as explained below. This radio frequency power amplifier module for dual-band type mobile communication apparatus is comprised of a drive stage amplifier having the gain peaks at f1 and f2 with a matching circuit and a radio frequency power output circuit including a radio frequency power output transistor.

Abstract: A circuit for conditioning an input control voltage signal that is used to drive an LC tank oscillator in a phase locked loop (PLL). The conditioning circuit includes a two-stage amplifier including a first stage amplifier connected to a second stage comprising an active cascode circuit, a diode-connected transistor and a resistor tied to a reference voltage (e.g. ground). The first stage amplifier receives a control voltage input signal, which would typically be produced at the output of a loop filter in a PLL, and produces a conditioned control voltage output signal at its output, which is connected to the drain of the diode-connected transistor. The purpose of the amplifier is to lower the impedance of the conditioned output signal, which is then used to drive the LC tank oscillator, wherein the series resistor acts both to lower the impedance and to act as the degenerating resistor for the diode-connected transistor.

Abstract: A power amplifier has a front and a rear stage. In the rear stage, to a base of a signal-amplifying bipolar transistor is connected one end of a variable impedance element whose impedance changes according to an input power level. An adjusting circuit is connected between the other end of the variable impedance element and a ground. A DC current adjusting element is connected between the other end of the variable impedance element and a supply voltage terminal. The front stage is made to perform class A operation or class AB operation near class A operation, while the rear stage is made to perform class B operation or class AB operation near class B operation. The distortion characteristic of the rear stage is adjusted by the variable impedance element, the adjusting circuit, and the DC current adjusting element so as to offset the distortion characteristic of the front stage.