Abstract: An on-chip oscillator generates a substantially temperature-independent clock signal by compensating for temperature-induced changes in its RC time constant and in a range between trigger voltages. A resistor with a positive temperature coefficient determines the range between trigger voltages, which increases with increasing temperature. A comparator response time contributes to a delay period that occurs after a trigger voltage is passed and before the charging or discharging of a capacitor is reversed. After the delay period, a remainder period elapses before another trigger voltage is passed. As temperature increases, the delay period is decreased by increasing a bias current supplied to the comparator. The bias current is programmably adjusted such that the sum of the delay period and the remainder period remains substantially constant over a large temperature range.

Abstract: A linear fractional-N synthesizer includes phase and frequency detection module, a charge pump circuit, a loop filter, a voltage controlled oscillator, and a fractional-N divider. The phase and frequency detection module is operably coupled to produce a charge up signal, a charge down signal, or an off signal based on a phase difference and/or a frequency difference between a reference oscillation and a feedback oscillation. The charge pump circuit is operably coupled to produce a positive current when the charge up signal is received, a negative current when the charge down signal is received, and a non-zero offset current when the off signal is received. The charge pump includes a resistor and a control module. The resistor provides the non-zero offset current and the control module maintains the non-zero offset current at a substantially constant value.

Abstract: An oscillator circuit may include a latch circuit, a feed-back circuit, and an input circuit. The latch circuit may be configured to generate an oscillating output signal responsive to first and second input signals, and the feed-back circuit may be configured to generate first and second complementary feed-back signals responsive to the oscillating output signal from the latch circuit. The input circuit may be configured to generate the first and second input signals responsive to the first and second complementary feed-back signals. Related methods are also discussed.

Abstract: The oscillator circuit comprises an oscillator including an oscillating transistor through which an oscillating current flows; a first mirror transistor where the source/drain of which is grounded and the drain/source of which is connected to the oscillating transistor in series; a first reference transistor where the source/drain of which is grounded and the drain/source and the gate of which are connected in common to the gate of the first mirror transistor; a second mirror transistor where the source of which is connected to a power line and the drain/source of which is connected to the drain/source of the first reference transistor; and a second reference transistor where the source/drain of which is connected to the power line, the drain/source and the gate of which are connected in common to the gate of the second mirror transistor and the drain/source of which is connected to an external terminal to which an external resistor is connected.

Abstract: A circuit arrangement for controlling an amplitude of an oscillator signal is accomplished by comparing the oscillator signal to reference signals. The amplitude of the oscillator signal is capable of being adjusted by means of a control signal. The control signal is developed by a regulating circuit that depends upon a comparison result of the oscillator signal with a reference signal such that the amplitude of the oscillator signal adopts a desired value. At least one further reference signal is compared to the oscillator signal and the regulating circuit is adjusted depending on the comparison.

Abstract: A method for producing an oscillating signal comprises: generating an oscillating signal by discharging after charging to a high trigger level and charging after discharging to a low trigger level; and turbo-charging at the initial of a change-over from charging to discharging while resuming a normal charging/discharging thereafter, and vice versa. The present invention makes use of the turbo-charging/discharging for a linear compensation, such that the produced oscillating signal has the features of concurrently eliminating phase noises and jitters as well as maintaining the modulation linearity.

Abstract: The oscillator circuit comprises a capacitor and first to fourth constant current supplies and switches are connected to the capacitor. Both terminals of the capacitor are used for charges and discharges. One period comprises four steps; charging the first terminal of the capacitor, discharging the second terminal, charging the first terminal, and discharging the second terminal.

Abstract: A low power oscillator circuit for a self-refresh timer in a memory array is disclosed. When a voltage (V1) of a comparison node (N1) exceeds a first reference voltage (Vref1), a differential amplifier (101) in an oscillator (1) causes a pulse generator (110) to output a pulse. A charge/discharge circuit (105) discharges the comparison node (N1) in response to pulse. In this event, a control circuit (4) disables a first control signal (CT1) to halt operation of the differential amplifier (101). When the voltage (V1) exceeds a second reference voltage (Vref2) equivalent to the sum of threshold voltages of a discharge circuit (43) in consequence of gradually charging the comparison node (N1) by the charge/discharge circuit (105) after it was discharged, the control circuit (4) activates the first control signal (CT1) to operate the differential amplifier (101).

Abstract: An oscillation circuit has: a first MOS transistor having a gate connected to a first node and a source connected to the ground; a second MOS transistor having a gate connected to a second node and a source connected to the ground; a current supply circuit supplying a control current; a threshold correction circuit supplying a correction current; and a charge-discharge circuit which supplies a charge current which is a superposition of the control current and the correction current to the first node and the second node alternately in response to potentials of drains of the first and the second MOS transistors. The threshold correction circuit increases the correction current as threshold voltages of the first and the second MOS transistors become large.

Abstract: An integrated temperature-compensated RC oscillator circuit includes an inverter having an input and an output. An RC network is coupled between the inverter and a pair of comparators. A first comparator has an inverting input coupled to a first reference voltage, a non-inverting input coupled to the RC network, and an output. A second comparator has an inverting input coupled to the RC network, a non-inverting input coupled to a second reference voltage, and an output. A set-reset flip-flop has a set input coupled to the output of the first comparator, a reset input coupled to the output of the second comparator, and an output coupled to the input of the inverter. Differential amplifiers in the comparators each have a diode-connected p-channel MOS transistor controlling a mirrored p-channel MOS transistor whose channel width is less than that of the diode-connected p-channel current mirror transistor.

Abstract: A relaxation oscillator for generating an oscillator output signal having a predetermined frequency. The relaxation oscillator includes an interleaved charge pump for providing a restoring charge to an integrator in response to at least one charge pump control signal. The relaxation oscillator further includes an integrator having an integrator input connected to the current summing node. The integrator is adapted to produce an integrator output signal having the predetermined frequency at an integrator output. A comparator having an input connected to the integrator output is adapted to generate the oscillator output signal having the predetermined frequency in response to the integrator output signal.

Abstract: An on-chip oscillator generates a substantially temperature-independent clock signal by compensating for temperature-induced changes in its RC time constant and in a range between trigger voltages. A resistor with a positive temperature coefficient determines the range between trigger voltages, which increases with increasing temperature. A comparator response time is part of a delay period that occurs after a trigger voltage is passed and before the charging or discharging of a capacitor is reversed. After the delay period, a remainder period elapses before the other trigger voltage is passed. As temperature increases, the oscillator increases current supplied to a comparator to decrease the response time. Moreover, as temperature increases, the oscillator increases a charge/discharge current so that the capacitor charges and discharges faster as the range between trigger voltages increases.

Abstract: An oscillation circuit capable of outputting an oscillation signal of constant frequency free from the influence of source voltage, temperature, and nonuniformity and fluctuation in inverter threshold voltage. An inverter inverts a voltage applied to one end of a capacitive element and outputs the inverted voltage to transistors and an inverter. A constant voltage source outputs a constant voltage free from the influence of source voltage and temperature. The transistors connect the other end of the capacitive element to the constant voltage source or ground in accordance with the voltage output from the first-mentioned inverter. A constant current source causes a constant current free from the influence of the source voltage and temperature to flow into or out of the one end of the capacitive element in accordance with the voltage from the second-mentioned inverter connected to the first-mentioned inverter.

Abstract: A dual range oscillator provides two different ranges of oscillator frequency output based on switched current sources charging a capacitor. As several current sources are combined to charge capacitor, the interval for charging the capacitor decreases and changes the oscillator frequency output accordingly. A reference voltage supplied to a comparator checks the voltage on the capacitor to determine when to combine current sources to charge the capacitor and modify the timing interval and the corresponding oscillator frequency output. The different current sources are switched to the capacitor to provide modified charging slopes. The dual slope, dual range oscillator permits frequency switching operation in a variety of environments and applications with a simplified control and integration into a single chip.

Abstract: A relaxation oscillator circuit is configured to provide an output signal. The relaxation oscillator circuit includes two capacitors that are alternatively charged and discharged. Each capacitor is charged by a separate current that is provided by mirroring a reference current. The reference current for the current mirror may be provided by a bias circuit such that the reference current may vary significantly over temperature and supply voltage. Also, the reference current is mirrored to a resistor to provide the reference voltage. The resistor has a temperature coefficient that is substantially zero. Accordingly, the output signal is relatively independent of temperature and supply voltage, even though the reference current and the reference voltage may vary significantly over temperature and supply voltage.

Abstract: An oscillator includes a comparison voltage generating circuit, a comparing circuit and a clock switching circuit. The comparison voltage generating circuit is driven by a power source voltage, and generates comparison voltages that change in response to clock signals which have a frequency that varies in inverse proportion to the power source voltage and a first reference voltage. The comparing circuit compares levels of the comparison voltages to a second reference voltage and outputs logic signals having logic levels as a result of the comparison. The clock switching circuit outputs the clock signals which have a frequency that varies in inverse proportion to the power source voltage, in response to the logic signals.

Abstract: A time base circuit, for an oscillator and apparatus, defines a time interval in terms of a time taken for a capacitor to charge from a reference voltage level to a detection voltage level. The circuit operates by: supplying at the start of the interval a capacitor charging current, using a first semiconductor device supplied from a first power supply voltage, the device delivering the charging current according to a predetermined dependency on the first power supply voltage; and identifying the detection voltage level to signal the end of the time interval, using a second semiconductor device supplied from the first power supply voltage, the second semiconductor device identifying the detection voltage level value according to the same predetermined dependency on the first power supply voltage as for the first semiconductor device, the time interval being made substantially independent of variations of the first power supply voltage.

Abstract: A programmable oscillator comprises a capacitor; a current generator couplable to said capacitor that generates a charging current of said capacitor; further comprising at least one resistance coupled to said capacitor; a comparator coupled to said capacitor for comparing a voltage at the terminals of said capacitor with a prefixed reference voltage and for generating an output signal; a first switch, controlled by said output signal, coupled to said capacitor that creates a current path able to facilitate the discharging of said capacitor.

Abstract: A microcontroller having a dual mode relax oscillator that is trimmable. In one embodiment, the present invention provides a relaxation oscillator circuit comprising two current sources for establishing a reference voltage for use in causing the relaxation oscillator circuit to operate in two power modes, and a control coupled to both current sources for switching between power modes. In one embodiment, one power mode is a low power mode for standard operation of the microcontroller and one power mode is a very low power mode for use in a sleep mode. In one embodiment, the relaxation oscillator circuit further comprises digitally trimmable components operable to control a current charging a capacitor of the relaxation oscillator circuit to account for process variation in the capacitor, wherein the current is for controlling a frequency of the microcontroller.

Abstract: Temperature-stabilized oscillator circuit A temperature-stabilized oscillator circuit (1) comprises a first part with a first temperature dependence and a second part with a second temperature dependence, which is different from the first temperature dependence. A charge storage device (C2), a controllable upward-integration current source (T2) for charging the charge storage device (C2), a controllable downward-integration current source (TB3) for discharging the charge storage device (C2) and two resistors (R2, R1) having the same temperature coefficients are contained in each case in one of the two parts.

Abstract: A variable-frequency oscillator (10) is formed to change an internal delay of the oscillator inversely proportional to changes in the frequency of the oscillator.

Abstract: An oscillator has timing characteristics that are determined by resistor and capacitor values. The circuit comprises an astable multivibrator and a current reference. The multivibrator comprises a first and a second timing capacitor. The multivibrator is configured to produce an oscillating output signal in response to charging and discharging the first and the second timing capacitors. The current reference is configured to control the rate of change of charge of the first and second timing capacitors. The current reference is determined in part by the resistor values.

Abstract: A low current oscillator circuit comprising a comparator for driving an output signal. A first capacitor chain is coupled to the comparator. The first capacitor chain is configured for setting a first input voltage of the comparator. A second capacitor chain is also coupled to the comparator. The second capacitor chain is configured for setting a second input voltage of the comparator, wherein the first capacitor chain and the second capacitor chain determine a first voltage level and a second voltage level of oscillation of the comparator. The first capacitor chain and the second capacitor chain are free of DC current flow.

Abstract: A CR oscillation circuit includes an oscillation unit having first through third invertion circuits connected in series between a first node and a second node, a capacitance element provided between the first node and an output terminal of the second inverting circuit, and a switch part for electrically connecting the first and second nodes according to a level of a control voltage; a constant current unit for allowing a constant current to flow according to a resistance value of an externally-provided resistive element to thereby supply a constant voltage; and a level conversion unit for converting a level of the constant voltage to thereby produce the control voltage.

Abstract: A high-voltage oscillator including a first normally-on switch in series with a resonant circuit, a second normally-on switch in parallel with the resonant circuit, and a control circuit preventing the simultaneous conduction of the two switches.

Abstract: An oscillator circuit is described comprising of a capacitor; a capacitor charging means arranged to supply a current to charge the capacitor to a first predetermined threshold voltage; a capacitor discharging means arranged to discharge the capacitor to a second predetermined threshold voltage; and a switching means arranged to switch between a capacitor discharging mode and a capacitor charging mode. The switching means is responsive to the capacitor reaching at least one of said threshold voltages. Furthermore at least one threshold voltage is determined by a threshold setting means, which provides a voltage threshold that varies to compensate for changes in temperature.

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract: An oscillator circuit having a charge storage device, an upward integration current source, and a downward integration current source is described. The charge storage device is also connected to a comparator in order to drive the current sources as a function of a lower comparator threshold and an upper comparator threshold. In consequence, a triangular waveform voltage is formed across the charge storage device, on the basis of the relaxation principle. The difference voltage from the two comparator thresholds is dropped across a first resistor. Since the comparator itself as well as the lower and upper current thresholds are formed in a common current path, this oscillator circuit has a particularly low current draw.

Abstract: The invention relates to an electric circuit for generating a periodic signal comprising: a capacitor device which has a first terminal and a second terminal; a signal node that is connected, via a first signal having a first period is applied; a discharging device that is connected, via a third switching device, to the first terminal and, via a fourth switching device, to the second terminal, whereby the second terminal, via a fifth switching device, and the first terminal, via a sixth switching device, are connected to a first reference potential; and comprising a clock pulse generating device for receiving the first signal and for generating a first switch clock pulse, a second switch clock pulse, and the periodic signal. The first and the second switch clock pulse do not overlap and are inverse with regard to one another.

Abstract: An oscillator includes a comparator and a variable voltage element. The comparator has a first input set to a reference voltage, a second input, and an output configured to produce an output voltage as a function of the voltages at the first and second inputs. The variable voltage element delivers to the second input a second voltage that is a function of a switched current. The switched current is a function of the reference voltage.

Abstract: The present invention describes a circuit for activating a control unit such as an ABS controller in a vehicle by way of a CAN bus, with the ignition turned off, which is in particular characterized by a first input for a logic activation signal for the control unit, an input filter for suppressing disturbing pulses in the activation signal, and a device for producing an output signal (CAN_WU) that activates the control unit when a predeterminable number of activation signals is recorded within a predeterminable duration.

Abstract: An oscillator circuit (40, 60) has a comparator circuit (48, 68) and a monitor and control circuit (50, 80). The comparator (48, 68) provides a periodic output signal. The monitor and control circuit (50, 80) controls the voltage swing of the periodic output voltage in response to monitoring a periodic input voltage. A capacitor (52, 90) is coupled between the output terminal of the monitor and control circuit (50, 80) and input terminal of the comparator (48, 68) and is sized to set the oscillation frequency. The monitor and control circuit (50, 80) functions to limit the input voltage excursions without using an attenuation capacitor (16). Eliminating the attenuation capacitor (16) provides a smaller oscillator circuit having reduced power supply current spikes and which is easier to implement.

Abstract: A crystal-less oscillator circuit with trimmable current control. In one embodiment, the present invention provides an oscillator circuit comprising a digital to analog converter circuit for generating a current, a band gap reference circuit for generating a voltage, and a relaxation oscillator circuit for creating a frequency based on the current and the voltage. In one embodiment, the digital to analog converter circuit comprises a trimmable current control. In one embodiment, the relaxation oscillator circuit is coupled to a frequency doubler circuit wherein the frequency is passed through the frequency doubler circuit for generating a second frequency. In another embodiment, the present invention provides a phase locked loop circuit comprising a phase detector circuit and the aforementioned oscillator circuit. In another embodiment, the present invention provides a microcontroller comprising a phase locked loop circuit comprising a phase detector circuit and the aforementioned oscillator circuit.

Abstract: A circuit is shown which outputs a pulse width having a duty cycle of less than 50% and the circuit having an oscillator providing a desired repetition rate controlled by a changing RC time constant.

Abstract: A quadrature coupled controlled oscillator comprising a first and a second circuit module, each of the circuit modules (100 and 100′) comprising an astable multivibrator circuit (103). The first circuit module is coupled with the second circuit module and the second circuit module is cross coupled with the first circuit module. Each of the circuit modules (100 and 100′) comprises a first and a second Voltage Controlled Current Source (101) (VCCS). In each of the circuit modules, each VCCS is coupled to a phase shifter (102) for shifting the phase of a current (110) supplied by the VCCS to a resonator (104) included in that circuit module. A communication arrangement (300) for communicating via a bi-directional communication channel (304), comprises an oscillator (303) as described above for generating a periodic signal. A receiving module (301) generates an output signal from the periodic signal and a receiving signal received from the channel (304).

Abstract: There is disclosed a voltage controlled oscillator (VCO) that receives +V(IN) and −V(IN) control voltages and outputs a VCO output signal having an oscillation frequency determined by the +V(IN) and −V(IN) control voltages. The VCO comprises: 1) a storage capacitor charged linearly by a constant charge current and discharged linearly by a constant discharge current; 2) a comparator for comparing the storage capacitor voltage to an upper threshold voltage and a lower threshold voltage. The comparator output drops to a negative saturation voltage (−V(SAT)) when the storage capacitor voltage rises above the upper threshold voltage and rises to a positive saturation voltage (+V(SAT)) when the storage capacitor voltage drops below the lower threshold voltage.

Abstract: A differential negative resistance source that provides negative resistance to a differential resonator of a differential VCO. The differential negative resistance source includes first and second active devices, each having first and second current terminals and a control terminal, first and second current sinks, each coupled to a corresponding one of the second current terminals of the first and second active devices, and at least one capacitive device coupled between the second terminals of the first and second active devices. The capacitive device and the separate current sinks form a capacitive degeneration circuit that operates to reduce or otherwise eliminate net differential capacitance at the output of the differential negative resistance source. The capacitive degeneration offsets extra capacitance, which enables an increase of the maximum operating frequency for a given process, and which enables the VCO to be less sensitive to operating conditions.

Abstract: An adjustable oscillating frequency function generator. The oscillating frequency of the function generator can be adjusted externally. The oscillation frequency is independent of the magnitude of the voltage source. Therefore, a pulse signal that withstands the voltage source signal can be provided.

Abstract: Provided are a first RC oscillator (10) including a resistance and capacitor, a counter (20) for counting the number of source oscillation clocks from the first RC oscillator (10), a frequency setting register (30) for setting the number of source oscillation clocks in accordance with a desired oscillation frequency, and a comparator for comparing between a count value of the counter (20) and a set value of the frequency setting register (30). A clock is outputted depending upon a result of comparison by the comparator.

Abstract: An oscillator circuit (300) disclosed herein includes an improved capacitor discharge circuit. The oscillator includes at least one capacitor coupled to a charging circuit portion (202, 210) and a discharging circuit portion (208) through a switching network (204, 216, 218, 220 and 222). In the alternative, an oscillator including more than one capacitor includes respective charging and discharging circuit portions connected to respective switching networks. Each charging circuit portion (202, 210) provides sufficient charge to charge the coupled capacitor (206) to a high threshold voltage (VtH). Each discharging circuit portion (208) discharges each coupled capacitor (206) to a low threshold voltage (VtL). The switching network alternately connects each coupled capacitor (206) to the charging circuit portion (202, 210) and the discharging circuit portion (208) to thereby alternately charge and discharge for each coupled capacitor (206) alternately.

Abstract: The invention creates an oscillator circuit, in particular for a refresh timer device of a dynamic semiconductor memory, having a capacitor device (C; C′) which is connected between a first node (6) and a first supply potential (P2); a current mirror circuit (T1; T2) for supplying a charging current for the capacitor device (C; C′) which is connected via a first transistor device (T4) to the first node (6) and which has a current source (SQ) for supplying a substantially temperature-independent reference current (Iref); a second transistor device (T5), which is connected between the first node (6) and the first supply potential (P2); the first and second transistor devices (T4; T5) and a control signal being configured in such a way that the capacitor device (C; C′) can be charged via the first node (6) when a potential (Vcomp) at the first node (6) is lower than the reference potential (Vref), and can be discharged via the first node (6) when the potential (Vcomp) at the first node (6) is h

Abstract: An integrated oscillator that may be used as a time clock includes circuitry that oscillates about an RC time constant, which RC time constant is adjustable to provide a desired frequency of oscillation. More specifically, the oscillator includes a capacitor array that has a plurality of capacitors coupled in parallel wherein each capacitor may be selectively included into the RC time constant or selectively excluded there from. Rather than setting the capacitance values to a desired capacitance value, a system for adjusting the time constant includes circuitry for measuring an output frequency and for comparing that to a certified frequency source wherein the time constant is adjusted by adding or removing capacitors from the capacitor array until the frequency of the internal clock matches an expected frequency.

Abstract: A gated oscillator is provided for digital circuits. The gated oscillator is achieved by the unconventional use of controlling the operating point of a Van der Pol oscillator. Oscillations are achieved by Van der Pol self-oscillation behavior.

Abstract: The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.

Abstract: A RC oscillator circuit with a stable output frequency, having an oscillating integrated circuit working under an operation voltage, the resistor, a first capacitor, a second capacitor, and a transistor. The first and second capacitors construct a RC circuit. The resistor has first and second terminals coupled to output and input terminals of the oscillating integrated device, respectively. The first capacitor has first and second terminals coupled to the input terminal of the oscillating integrated device and the second terminal of the resistor, respectively. The second capacitor has first and second terminals coupled to the second terminal of the first capacitor and ground, respectively. The transistor has a gate coupled to the operation voltage, a drain coupled to the first terminal of the second capacitor, and a grounded source. The RC oscillator circuit with a modulable frequency can work under difference operation voltages and output the same frequency.

Abstract: An oscillator circuit for efficiently generating a triangular wave signal having multiple phases. The oscillator circuit includes capacitors, each having two terminals and having a voltage between the two terminals. The capacitors include a first capacitor. A plurality of charge/discharge switching circuits are connected to the first capacitor. Each of the charge/discharge switching circuits generates a switching signal for an associated one of the switches to control the charging and discharging of the associated capacitor. The switching signals of the charge/discharge switching circuits have different phases. Each of the charge/discharge switching circuits receives a first capacitor voltage between the terminals of the first capacitor and compares the first capacitor voltage with a first reference voltage and a second reference voltage to generate the switching signal that has a predetermined phase. A triangular wave signal is generated at one of the two terminals of each of the capacitors.

Abstract: A switching transistor is connected to a primary winding of a transformer, an oscillation frequency control circuit is connected to a feedback winding, the oscillation frequency control circuit controls a first controlling transistor, and the first controlling transistor controls the delay time when the switching transistor is turned on. The oscillation frequency control circuit is set in a first operation mode in which the above delay does not take place at the rated load, in a second operation mode in which the oscillation frequency is controlled such that the oscillation frequency becomes constant or slowly decreases at light loading and in a third operation mode in which the oscillation frequency is further decreased while a switch is switched on.

Abstract: An oscillator includes a first sawtooth waveform generator for generating a first sawtooth waveform having a selectively started ramp portion and a second sawtooth waveform generator for generating a second sawtooth waveform having a selectively started ramp portion. A controller is also included for alternatingly controlling the first and second sawtooth waveform generators so that a transition to the ramp portion of one sawtooth waveform is based upon determining the ramp portion of the other sawtooth waveform reaching a trip point. The controller also sets the trip point substantially independent of a supply voltage so that the oscillator has reduced sensitivity to supply voltage changes.

Abstract: A RC oscillator circuit with a stable output frequency, having an oscillating integrated circuit working under an operation voltage, the resistor, a first capacitor, a second capacitor, and a transistor. The first and second capacitors construct a RC circuit. The resistor has first and second terminals coupled to output and input terminals of the oscillating integrated device, respectively. The first capacitor has first and second terminals coupled to the input terminal of the oscillating integrated device and the second terminal of the resistor, respectively. The second capacitor has first and second terminals coupled to the second terminal of the first capacitor and ground, respectively. The transistor has a gate coupled to the operation voltage, a drain coupled to the first terminal of the second capacitor, and a grounded source. The RC oscillator circuit with a modulable frequency can work under difference operation voltages and output the same frequency.

Abstract: The present invention relates to a trimmable oscillator circuit which comprises a comparator circuit operable to compare an output voltage of the oscillator circuit to a reference voltage and output a control signal in response thereto. The oscillator circuit further comprises an output capacitor, wherein a voltage at a node of the capacitor comprises the output voltage of the oscillator circuit, and the oscillator circuit also comprises a selectively trimmable charge/discharge circuit coupled between the comparator circuit and the output capacitor. The charge/discharge circuit is operable to charge or discharge the output capacitor based on the control signal, wherein a rate of charge or discharge is dictated by one or more user selectable control signals. Thus an oscillation frequency of the oscillator circuit may be trimmed.