Abstract: A circuit may comprise an amplifier powered by a first supply voltage, with a first input of the amplifier coupled to a stable reference voltage, and the output voltage of the amplifier provided as a designated supply voltage to an oscillator configured to produce a periodic signal having a specified frequency. The circuit may further include a control circuit coupled to a second input of the amplifier, to the output of the amplifier, and to ground, and configured to control the rate of change of the output voltage of the amplifier with respect to temperature. This rate of change may be specified according to a characterization of the oscillator over supply voltage and temperature, and may result in stabilizing the specified frequency across temperature. The periodic signal may therefore be unaffected by variations in the first supply voltage, and the amplitude of the periodic signal may be proportional to the stable reference voltage.

Abstract: An oscillator circuit comprises a charging block with a first terminal for feeding a first charging current, to which terminal a first capacitor and a series circuit of a first and a second switch are connected, and with a second terminal for feeding a second charging current, to which terminal a second capacitor and a series circuit of a third and a fourth switch are connected, as well as a comparison circuit with a first and a second comparator. The comparators are configured to compare voltages at the first and second terminals to a reference voltage, wherein their output is connected to control terminals of the third or first switch. The oscillator circuit further comprises a flipflop that is coupled on the input side to the outputs of the first and second comparators, and on the output side, to control terminals of the second and fourth switches, as well as to an oscillator output.

Abstract: A frequency dithering circuit reduces emissions that cause Electro-Magnetic Interference (EMI) by spreading the spectrum of a clock. The clock sequences a counter that drives a digital count value to a digital-to-analog converter (DAC). The DAC outputs a sawtooth wave with a wide voltage swing. A subtractor scales down the voltage swing to produce a reduced-swing sawtooth wave which is used as an upper limit voltage. Comparators trigger a set-reset latch to toggle the clock when current pumps charge and discharge a capacitor beyond voltage limits. Since the upper limit voltage is the reduced sawtooth wave from the subtractor, the amount of time to charge the capacitor varies, dithering the period of the clock. The degree of dithering can be adjusted by programming the feedback resistance in the subtractor. The subtractor reduces the sensitivity of dithering to errors in the DAC, allowing for an inexpensive, less precise DAC.

Abstract: There is provided relaxation oscillator. The relaxation oscillator includes: a ramp wave generator generating ramp waves by a complementary operation between a first capacitor module charged and discharged according to a first switching signal and a second capacitor module charged and discharged according to a second switching signal; a negative feedback circuit unit generating a compensation voltage for compensating errors with reference voltage by being fedback with the ramp waves; and a switching signal generator generating the first switching signal controlling the charging and discharging of the first capacitor module and the second switching signal controlling the charging and discharging of the second capacitor module from the compensation voltage and the ramp waves. As a result, the present invention can generate ramp waves having a stable frequency while preventing a frequency from being changed due to a delay or an offset of the comparator.

Abstract: The oscillator circuit includes a comparator circuit which compares a potential supplied to one of input terminals with a potential supplied to the other of the input terminals and outputs a high power supply potential or a low power supply potential, a capacitor which is electrically connected to the one of the input terminals of the comparator circuit, and a charge and discharge circuit which charges and discharges the capacitor. The charge and discharge circuit includes a first current supply circuit and a second current supply circuit. Each of a current value of the first current supply circuit and a current value of the second current supply circuit can be controlled with the use of a digital control signal.

Abstract: A current mirror circuit duplicates an input current that flows through an input terminal, and outputs an output current via an output terminal. A first transistor, a second transistor, and a diode are sequentially arranged in series between a power supply terminal to which a fixed voltage is applied and an input terminal. A third transistor and a fourth transistor are sequentially arranged in series between the power supply terminal and the output terminal. The gate of the first transistor and the gate of the third transistor are connected to the drain of the second transistor. The gate of the second transistor and the gate of the fourth transistor are connected to the input terminal.

Abstract: Method and apparatus for adding jitter to an oscillator for reducing EMI are disclosed An oscillator circuit includes an oscillator configured to generate a first clock having a first frequency and a frequency jitter circuit including a charge pump configured to charge and discharge first and second capacitors repeatedly for obtaining a time-varying voltage having a second frequency. The time-varying voltage is coupled to the oscillator to vary the first frequency within a frequency range. The charge pump includes a first switch for coupling the first capacitor to a voltage source and a second switch for coupling the first capacitor to the second capacitor. A charge transfer between the first and second capacitors is configured to provide the time-varying voltage.

Abstract: The low-power relaxation oscillator comprises a first module (21) having a ramp generator formed by a reference current source (31) and a storage capacitor (32) defining a ramp voltage (Vramp1), and a voltage comparator (m1, m2) for comparing the ramp voltage with a reference voltage, a second module (22, 41, 42, Vramp2, m3, m4) similar to the first module and an asynchronous flip-flop (23) receiving the output signal of the comparator of the first module at a first input (s) and the output signal of the comparator of the second module at a second input (r). For each module a generator of said reference voltage is configured by adding a reference resistance (33, 43) between the reference current source and the storage capacitor. Thus, the generation of the reference voltage and the ramp voltage is conducted on the very same current branch. This enables the electrical power consumption of the oscillator to be reduced.

Abstract: A variable-capacitance device includes a first capacitance element coupled between a first power supply terminal and an output terminal, a capacitance selection switch that is turned on and off in accordance with a capacitance switching signal, a second capacitance element coupled in parallel to the first capacitance element and in series to the capacitance selection switch, and an error correction circuit configured to operate such that in a state in which the capacitance selection switch is in an OFF state, in response to a charge reset signal that causes a voltage at the output terminal to be reset to a reset voltage, the error correction circuit substantially eliminates a difference between the voltage at the output terminal and a voltage at a capacitance switching node at which the second capacitance element is coupled to the capacitance selection switch.

Abstract: An oscillator that increases the accuracy of an output frequency, without using a charge pump, has an oscillation circuit, first and second voltage supply circuits, and a calibration value generation circuit. The first voltage supply circuit includes a resistor and a capacitor, the resistance and capacitance of which are determined so that a first voltage reaches a reference voltage within a reference time. The second voltage supply circuit includes first and second switching means, which perform switching when receiving pulse signals corresponding to the frequency of the oscillation circuit to raise the second voltage. A calibration value generation circuit provides the oscillation circuit with a calibration value that lowers the frequency when the second voltage reaches the reference voltage before the first voltage and raises the frequency when the second voltage reaches the reference voltage after the first voltage.

Abstract: A periodic signal generating circuit which is dependent upon temperature for establishing a temperature independent refresh frequency is presented. The periodic signal generating circuit includes a reference voltage generating unit and a periodic signal generating unit. The reference voltage generating unit produces a reference voltage which exhibits a variable voltage level in response to temperature. The periodic signal generating unit produces a periodic signal in response to a set voltage to determine the reference voltage and an oscillation period, wherein a transition timing of the set voltage is controlled by the reference voltage. As a result the periodic signal has a relatively constant period which can be produced regardless of the temperature variation.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: A circuit uses a single control input to an oscillator of an electronic ballast to program the parameters of soft-start frequency, pre-heat frequency, ignition ramp time, and ballast run frequency. The output frequency of the oscillator is based on an electrical parameter at the control input node. A resistor-capacitor network may be used to program the soft-start ramp time and ignition ramp time. The resistive element of the restive-capacitance network may be used to program the pre-heat frequency. A switchable impedance may be used to program the ballast run frequency. A look-up table circuit may also be used in the alternative to implement a single control input for the oscillator of an electronic ballast.

Abstract: A self-calibrating oscillator that increases the output frequency accuracy without using a charge pump includes an oscillation circuit, a pulse counter, a charging circuit, a reset circuit, a calibration circuit, and a timing control unit. The pulse counter counts a pulse signal having frequency f0 from the oscillation circuit based on a count start signal provided from the timing control unit, while providing an output signal to the charging circuit. The charging circuit connects a constant current source and capacitor when provided with the output signal to raise the voltage at the connection node. The calibration circuit provides the oscillation circuit with a calibration value for increasing the frequency if the voltage when the output of the output signal ends is higher than a high potential reference voltage and provides a calibration value for lowering the frequency if this voltage is lower than a low potential reference voltage.

Abstract: A slope compensation circuit includes an oscillator for generating a first clock signal having a reference frequency, a ramp signal generator for generating a ramp signal having a duty ratio of about 50% or higher based on the first clock signal, and a slope compensation signal generator for outputting a slope compensation current based on the ramp signal.

Abstract: An apparatus and method for setting a ratio of a discharge rate to a charge rate for measuring a capacitance on a sensor element of a sensing device. The apparatus may include a sensor element of a sensing device, a relaxation oscillator having a first and a second programmable current source, and a ratio decoder to receive a ratio of a discharge rate to a charge rate, and to set the first and second programmable current sources based on the received ratio.

Abstract: A relaxation oscillator includes a capacitor connected to a comparator input, current sources switched to supply power to the capacitor based on an output of the comparator, and a duplicate integrator shifting a voltage on the capacitor to offset a propagation delay through the comparator. The duplicate integrator includes current sources and a capacitor matching and switched in tandem with those within the relaxation oscillator, plus an additional current source, and is selectively switched into connection with the comparator input. By canceling the comparator propagation delay, the oscillator output frequency can be stably controlled through selection of resistive and capacitive values, using cheaper technology and tolerating large temperature, voltage and process variations.

Abstract: A frequency-jittering apparatuses includes an oscillator and a frequency control circuit. The oscillator generates a signal. When the magnitude of the signal exceeds a magnitude of a reference signal, the oscillator operates substantially in a first state; and when the magnitude of the signal is lower than the magnitude of the reference signal, the oscillator operates substantially in a second state different from the first one. The frequency control circuit varies the reference signal to change the frequency of the signal output from the oscillator.

Abstract: A temperature compensated CMOS RC oscillator circuit changes the source-bulk voltage to stabilize the MOSFET's threshold voltage variation over temperature using a resistor and temperature-correlated bias current. The MOSFET's source is connected to ground through a resistor. This temperature-correlated bias current also runs through this resistor. When temperature increases, the bias current also increases, which increases the MOSFET's source-bulk voltage. The increased source-bulk voltage helps to stabilize the threshold voltage of MOSFET at high temperature. A power saving logic is also embedded in this oscillator to achieve higher frequency at lower power consumption. In the present invention, there is no high gain op amp or high speed comparator, which makes the resultant oscillator to be low power design and which can be integrated into a single chip with other system.

Abstract: An oscillator circuit according to the invention comprises an oscillator with a toggle circuit having an output and an inverting input, whereby the output is connected to the inverting input via a feedback resistor, the inverting input is connected, for example, to the ground, via a first oscillator capacitor, and also connected, for example, to the ground, via a second oscillator capacitor and via a control resistor whose value can be adjusted or electrically controlled, so that the frequency of the oscillator can be varied by increasing or decreasing the value of the control resistor. In order to control the value of the control resistor, preferably a modulated 1-bit signal is used that is integrated by an integrator. Preferably, the oscillator is an integral part of a closed-loop control circuit in which the frequency of the oscillator forms the actual value and a predefined target frequency forms the target value.

Abstract: The relaxation oscillator includes a comparator and a latch. The comparator includes a comparator output and a comparator input that is configured to receive a first input signal in response to a first signal and configured to receive a second input signal in response to a second signal. The latch includes a latch-set input that is configured to be coupled to the comparator output in response to a third signal, a latch-reset input that is configured to be coupled to the comparator output in response to a fourth signal and a latch output that is configured to output the second signal. The relaxation oscillator is configured to achieve an approximately fifty percent duty cycle without requiring the use of a second comparator.

Abstract: An oscillator circuit generates a constant delay time by use of a current source and a load element to determine a frequency of a clock. The oscillator circuit includes an integrator which integrates the clock, a first comparator which compares an output voltage of the integrator with a reference voltage, and a variable current source which changes a current in accordance with the comparison result of the first comparator. The frequency is corrected in accordance with the current of the variable current source.

Abstract: The disclosed current-controlled hysteretic oscillator operates by controlled currents opposing each other in differential pairs to set a controlled hysteresis for improved relaxation oscillations with immunity to phase or frequency error.

Abstract: A constant determination unit (90) determines various constants, that are the magnitude of a charge current outputted from a charge pump circuit (30), the time constant of a loop filter (40), and the gain of a voltage controlled oscillator (50), so as to make the proportionality constant of a natural frequency of a phase locked loop circuit for the input frequency of the phase locked loop circuit and the damping factor to be predetermined values, and outputs various control signals based on the determined constants. The charge pump circuit (30), the loop filter (40), and the voltage controlled oscillator (50) modify the magnitude of the charge current, the time constant, and the gain, respectively, in accordance with control signals outputted from the constant determination unit (90).

Abstract: An embodiment for low power-consumption RC oscillator is disclosed. A voltage transforming unit transforms a power supply voltage to an internal voltage. A current mirroring unit is coupled to the voltage transforming unit and receives the internal voltage to provide constant two current outputs with different phases. A current charging/discharging unit includes first and second nodes to receive the two constant current outputs of the current mirroring unit, wherein first and second capacitors are coupled to the first and second nodes, respectively. The first and second capacitors are charged by the two constant current outputs. A voltage sensing and outputting unit is coupled to the first and second nodes, senses voltage levels of the first and second nodes and outputs clock signals when one of the sensed voltage levels is greater than a logic threshold. A pulse generating unit generates pulse signals in response to the clock signals.

Abstract: Disclosed is an oscillator including a reference voltage generator generating a reference voltage, and a logic combination circuit generating complementary first and second internal clock signals in response to the reference voltage and complementary first and second output voltages. One of the first and second output voltages—the one going high—is provided to the logic combination circuit before the other one of the first and second output voltages—the one going low.

Abstract: A first comparator compares an output voltage Vout appearing at a capacitor with a maximum threshold voltage Vmax. A second comparator compares the output voltage Vout with a minimum threshold voltage Vmin. An edge detection circuit detects an edge of a synchronization signal SYNC having approximately ½ of frequency of the output voltage Vout and outputs an edge detection signal SE. A charge-discharge control unit refers to the first and the second comparison signal, and sets the charge-discharge circuit to a discharging state when the output voltage Vout becomes higher than the maximum threshold voltage Vmax and sets the charge-discharge circuit to a charging state when the output voltage Vout becomes lower than the minimum threshold voltage Vmin. When the edge signal SE becomes the predetermined level, the charge-discharge control unit switches the charging state and the discharging state of the charge-discharge circuit.

Abstract: The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component.

Abstract: This oscillation circuit includes a triangular wave generation circuit that generates a triangular wave signal corresponding to an outputted clock signal, a comparison circuit that generates a clock signal corresponding to a comparison of the triangular wave signal with a first reference voltage and a second reference voltage, a current adjusting circuit that adjusts the value of adjusted current according to the power supply voltage for the comparison circuit, and a reference voltage generation circuit that generates the first reference voltage and the second reference voltage having a voltage differential that corresponds to the value of the adjusted current. The current adjusting circuit increases the adjusted current when the power supply voltage for the comparison circuit rises, and reduces the adjusted current when the power supply voltage drops.

Abstract: An oscillator is provided. The oscillator comprises a flip-flop module, a first and a second setting module. The first setting module comprises: a first switch device to generates a first switch signal according to a first oscillating signal, an NMOS and an inverter. The NMOS comprises a drain to receive a first charging current and a gate to receive the first switch signal, wherein the drain is charged or discharged according to the first switch signal. The inverter is connected to the drain to generate a first setting signal. The second setting module comprises a second switch device to generate a second switch signal according to a second oscillating signal and a comparator to generate a second setting signal according to the second switch signal and a reference voltage. The flip-flop module generates the first and the second oscillating signal according to the first and the second setting signal.

Abstract: A charging and discharging circuit of a triangular wave oscillation circuit includes an inverter circuit; a discharging reference potential generating circuit; a first NMOS transistor having a drain connected with a connection point between a first current source circuit and the capacitor, and a gate connected with the discharging reference potential generated by the discharging reference potential generating circuit; a second NMOS transistor having a gate inputted with the switching signal through the inverter circuit, a drain connected with the gate of the first NMOS transistor, and a source connected with a source of the first NMOS transistor; and a third NMOS transistor having a gate inputted with the switching signal, a drain connected with a connection point between the source of the first NMOS transistor and the source of the second NMOS transistor, and a source grounded.

Abstract: An oscillator utilizes two current sources that have the same temperature and VDD dependency so they generate the same current in changing conditions. Therefore, there is very low VT dependency. The resistor and fringe capacitor temperature coefficient are very low and opposite so they compensate for each other. A comparator with a short period of operation also minimizes VT dependency.

Abstract: An integrated oscillator (10), for an integrated circuit, comprises i) first (CI1) and second (CI2) compensated inverters mounted in series and each comprising first (PI11;PI21) and second (PI12;PI22) plain inverters mounted in parallel and comprising transistors having channel lengths respectively shorter and longer than an optimal channel length, the first compensated inverter (CI1) having input and output terminals respectively connected to first (N1) and second (N2) nodes and the second compensated inverter (CI2) having input and output terminals respectively connected to the second node (N2) and to a third node (N3), ii) a resistor (R) having a chosen resistance value and comprising first and second terminals connected respectively to the first (N1) and second (N2) nodes, and iii) a capacitor (C) comprising first and second terminals connected respectively to the first (N1) and third (N3) nodes, and having a chosen capacitance value to charge and discharge oneself in order to periodically deliver a clock

Abstract: Apparatus includes a single-pin input interface, which is operative to sense a voltage across a capacitor of a Resistor-Capacitor (RC) network in which the capacitor is repetitively charging and discharging so that the voltage oscillates as a function of time. A measurement circuit is coupled to measure time durations in which the capacitor is charging and in which the sensed voltage lies between first and second predefined thresholds. A clock generation circuit is coupled to generate an output clock signal having a frequency, and to adjust the frequency responsively to the measured time durations.

Abstract: A voltage reference connects to a voltage-to-current converter to generate a reference current dependent on the reference voltage. Outputs of a toggle-type flip flop connect to switching transistors controlling the reference current charging capacitors. The toggling of the flip-flop is controlled by comparing the capacitor voltages to the reference voltage, such that the toggle frequency is proportional to the time charging the capacitors. Optionally, temperature compensation data, representing a magnitude and direction rotation of the frequency versus temperature characteristic is stored and, based on a sensed temperature, retrieved to modify the reference current.

Abstract: A capacitive sensor includes a sensing electrode, control unit, first and second comparator wherein the sensing electrode includes a first and a second conductors. A positive input terminal of the first comparator and a negative input terminal of the second comparator are coupled to the first conductor. A positive input terminal of the second comparator and a negative input terminal of the first comparator are coupled to the second conductor. The first and second comparators respectively output first and second comparing signals according to voltages of the positive and the negative terminals thereof. The control unit charges the first conductor and discharges the second conductor when the first and second comparing signals correspondingly are in first and second logic states. The control unit is operable on the contrary when the first and second comparing signals are in opposition to the abovementioned description.

Abstract: A relaxation oscillator. The relaxation oscillator includes a comparator and a latch. The comparator includes a comparator output and a comparator input that is configured to receive a first input signal in response to a first signal and configured to receive a second input signal in response to a second signal. The latch includes a latch-set input that is configured to be coupled to the comparator output in response to a third signal, a latch-reset input that is configured to be coupled to the comparator output in response to a fourth signal and a latch output that is configured to output the second signal. The relaxation oscillator is configured to achieve an approximately fifty percent duty cycle without requiring the use of a second comparator.

Abstract: An oscillator includes a first comparator circuit, a second comparator circuit, an oscillation signal generator circuit, and a frequency voltage generator circuit. The first comparator circuit generates a first pulse when a frequency voltage reaches a first reference voltage, and the second comparator circuit generates a second pulse when the frequency voltage reaches a second reference voltage. The oscillation signal generator circuit generates an oscillation signal by latching a first voltage in response to the first pulse and latching a second voltage in response to the second pulse. The frequency voltage generator circuit raises or lowers the frequency voltage in response to the oscillation signal. The driving capability of the first comparator circuit is reduced at the latching of the first voltage and is restored at the latching of the second voltage.

Abstract: A low temperature coefficient oscillator including a current generator, a first and a second voltage generator, an amplifier, a resistor, a switch, a capacitor and an oscillating unit is provided. The current generator generates a first through a fourth current according to a control signal. The first voltage generator generates a first voltage according to the first current. The second voltage generator generates a second voltage according to the second current and a frequency signal. The amplifier generates the control signal according the first and second voltages. The resistor is coupled between a first terminal of the switch and ground, and a first terminal thereof receives the third current. The switch is conducted or not according the frequency signal. The capacitor is coupled between a second terminal of the switch and ground. The oscillating unit generates the frequency signal according to the fourth current and a voltage of the capacitor.

Abstract: A frequency jitter generation circuit having a voltage generator and an oscillator circuit is provided. The voltage generator receives an input voltage and converts the input voltage into an upper reference voltage output to the oscillator circuit. Voltage level of the upper reference voltage is varying. The oscillator circuit is coupled with the voltage generator. Voltage level of a reference voltage in the oscillator circuit is oscillated between the upper reference voltage and a lower reference voltage to generate a frequency signal with a jitter based on the variation of the upper reference voltage.

Abstract: Widening the frequency range without increasing the power consumption. Current circuits output charge current based on control current. Capacitors are provided in association with the current circuits and store the charge current. Discharge transistors are provided in association with the capacitors and cause the capacitors to discharge electric charge. On-off transistors are connected between the current circuits and the capacitors and open or close the paths between the current circuits and the capacitors in accordance with the voltages across the capacitors. Signal output transistors have their gates connected between the current circuits and the on-off transistors and output signals to a flip-flop in accordance with the charge current. The flip-flop drives the discharge transistors alternately in accordance with the signals.

Abstract: In one embodiment, an oscillator circuit is configured to oscillate at a base frequency. The oscillator is configured to receive a synchronization signal and restart a period of the oscillator signal responsively to the synchronization signal.

Abstract: A digital controlled oscillator including a programmable current source, a first variable capacitor and a second variable capacitor. A comparator compares the voltage across the variable capacitors with a reference voltage level and generates a DCO output clock signal. A switching means alternately switches the variable capacitors to either charge from a programmable current source or discharge in response to an output signal of the comparator. A clock divider divides the DCO output clock signal by a factor N substantially greater than 1. A frequency monitor receives the divided clock signal, determines the time difference of successive clock periods of the divided clock signal and generates a feedback signal to adapt the frequency of the DCO output clock signal.

Abstract: An oscillator arrangement is specified, in which a relaxation oscillator is refined to the extent that the comparator (2) to be used for comparing the voltage across a charge storage device (1) with a switching threshold (VTH) is a current comparator with two current branches (5, 6). One of these two current branches is used in the present case for guiding a charging or discharging current of the charge storage device (1). In this way, a current branch is eliminated, so that the proposed principle is preferably suitable for so-called ultra low power applications.

Abstract: According to some embodiments, a process, voltage, and temperature compensated clock generator is disclosed. The clock generator may be a charge-charge clock generator including a first load capacitive element and a second load capacitive element. A process, voltage, and temperature compensated current source is coupled to the charge-charge clock generator, and is used to charge the first load capacitive element and the second load capacitive element.

Abstract: A low power oscillator is disclosed in one embodiment of the invention as including a Schmitt trigger having an input, an output, and an input stage coupled to the input. The input stage may include multiple transistors connected in series between a power source and ground. A switch, controlled by the output of the Schmitt trigger, may be connected in series with the multiple transistors. The switch is configured to interrupt shoot-through current passing through the transistors when the transistors are turned on at the same time. In certain embodiments, the switch may reduce the shoot-through current by substantially half.

Abstract: A relaxation oscillator includes a capacitor connected to a comparator input, current sources switched to supply power to the capacitor based on an output of the comparator, and a duplicate integrator shifting a voltage on the capacitor to offset a propagation delay through the comparator. The duplicate integrator includes current sources and a capacitor matching and switched in tandem with those within the relaxation oscillator, plus an additional current source, and is selectively switched into connection with the comparator input. By canceling the comparator propagation delay, the oscillator output frequency can be stably controlled through selection of resistive and capacitive values, using cheaper technology and tolerating large temperature, voltage and process variations.

Abstract: Oscillator devices and methods of operating such oscillator devices are disclosed. The oscillator devices include a current source, and an oscillation module to provide a clock signal. The frequency of the clock signal depends on the relationship between a threshold voltage of a transistor at the oscillation module and the current level provided by the current source. The transistor at the oscillation module is matched to a transistor at the current source so that the frequency of the clock signal is relatively insensitive to changes in device temperature.

Abstract: Techniques for voltage controlled oscillator (VCO) circuits that are independent of temperature and process variations are described herein.

Abstract: An oscillator structure has a sync signal processor with an input interface for an external clock based sync signal and an output interface for a duty cycle indication signal depending on a signal property of the sync signal and an oscillator with an input interface for the duty cycle indication signal and the sync signal and an output interface for an oscillation signal synchronized with the external clock and having a duty cycle adjusted according to the duty cycle indication signal.