Abstract: Apparatuses and methods are disclosed for oscillators that are substantially insensitive to supply voltage variations. In one such example apparatus, a capacitance circuit is configured to be charged and discharged. Charging and discharging circuits are coupled to the capacitance circuit and configured to charge and discharge, respectively, the capacitance circuit by charging and discharging currents responsive to charge and discharge signals. A control circuit is coupled to the charging circuit and the discharging circuit, and is configured to provide the charge and discharge signals responsive to a voltage of the capacitance circuit, and is further configured to provide an oscillation signal responsive to the voltage of the capacitance circuit. The charging current, the discharging current, or both the charging and discharging currents are proportional to a difference between a first reference voltage and a second reference voltage.

Abstract: Provided is a CR oscillator circuit that achieves a small occupied area and good oscillation frequency accuracy while having small current consumption. The CR oscillator circuit includes: a reference voltage circuit configured to switch and output a reference voltage; a first constant current source configured to charge a capacitor; a second constant current source configured to discharge the capacitor; a voltage comparator configured to compare voltages of the reference voltage circuit and the capacitor; and a logic circuit. The logic circuit is configured to switch between the reference voltage circuit and the constant current source simultaneously in response to an output signal of the voltage comparator.

Abstract: An amplifier comprises a biasing unit, an amplifying unit and a Schmitt trigger. The biasing unit is configured to generate a bias current which is independent of the power supply, so as to increase power supply rejection ratio. The amplifying unit is connected to the biasing unit and configured to receive an input voltage and generate an amplified voltage based on the biasing current. The Schmitt trigger is connected to the amplifier and configured to generate and output a modified voltage.

Abstract: Systems, apparatuses, and methods for providing non-transcranial electrical stimuli to a biological subject may employ a support structure, at least one waveform generator, and at least a first electrode and a second electrode. The system can be sized and dimensioned to be worn on a head of the biological subject and operable to deliver non-transcranial electrical stimuli to at least one of the temporomandibular joints of the biological subject.

Abstract: An oscillator circuit comprising at least a first component arranged to be statically calibrated to calibrate the oscillator circuit to achieve a symmetrical frequency/temperature profile for the oscillator circuit. The oscillator circuit further comprises at least one further component arranged to be dynamically calibrated to enable an oscillating frequency of the oscillator circuit to be dynamically adjusted, and at least one temperature compensation component arranged to receive at least one temperature indication for the oscillator circuit and to dynamically adjust the at least one further component based at least partly on the at least one received temperature indication. In some examples, the at least one temperature compensation component is arranged to dynamically adjust the at least one further component based on a standardized temperature compensation scheme.

Abstract: A clock signal generation circuit includes a CR oscillator circuit having a capacitor, a resistor, and an amplifier circuit, and a voltage generation circuit adapted to generate a power supply voltage, and then supply the CR oscillator circuit 170 with the power supply voltage VDOS. An oscillation frequency of the CR oscillator circuit in a case in which a power supply voltage VDDL is a fixed voltage has a positive temperature characteristic. The voltage generation circuit generates the power supply voltage VDOS having a negative temperature characteristic based on a work function difference between transistors, and then supplies the power supply voltage VDOS as a power of the amplifier circuit of the CR oscillator circuit.

Abstract: An ultra-low power oscillator is designed for wake-up timers that can be used in compact wireless sensors, for example. A constant charge subtraction scheme removes continuous comparator delay from the oscillation period, which is the source of temperature dependence in conventional RC relaxation oscillators. This relaxes comparator design constraints, enabling low power operation. In 0.18 ?m CMOS, the oscillator consumes 5.8 nW at room temperature with temperature stability of 45 ppm/° C. (?10° C. to 90° C.) and 1%/V line sensitivity.

Abstract: A resistive/residual Charge to Digital Timer (RCDT) provides efficient, accurate measurement of short time delay between two signals, by converting the time delay to current, and measuring the charge integrated by a capacitor over a duration. In one embodiment, in quantizing this charge (measured as voltage), a residual charge is maintained cycle-to-cycle. This allows for implementation of a Noise shaping Charge to Digital Timer (NCDT), providing improved resolution over a plurality of measurement cycles. The RCDT/NCDT is particularly (but not exclusively) well suited for phase error detection in a Digital Phase Locked Loop.

Abstract: Provided is a voltage regulator which consumes low power and uses an NMOS transistor as an output transistor. A delay circuit includes, between a constant current circuit and a capacitor, a depletion type NMOS transistor having a gate and a back gate each connected to a ground terminal, the constant current circuit including a depletion type NMOS transistor and a resistor connected between each of a gate and a back gate of the depletion type NMOS transistor and a source thereof.

Abstract: A circuit includes a comparator unit, a capacitive device, and a switching network. The comparator unit is configured to set a control signal at a first logical value when an output voltage reaches a first voltage value from being less than the first voltage value, and to set the control signal at a second logical value when the output voltage reaches a second voltage value from being greater than the second voltage. The capacitive device provides the output voltage. The switching network is configured to charge or discharge the capacitive device based on the control signal.

Abstract: An oscillation circuit includes a first current source having dependency of current value/temperature exhibiting a first characteristic; a second current source having dependency of current value/temperature exhibiting a second characteristic; a first conversion section, input with a current from the first current source, that outputs a first current having a specific characteristic which is converted from the first characteristic; a second conversion section, input with a current from the second current source, that outputs a second current having a specific characteristic which is converted from the second characteristic; a subtraction section, input with the first and the second current, that outputs a difference current that is a difference between the first and the second current; and a clock generation section that generates a clock signal by alternately charging and discharging a first capacitor and a second capacitor based on the difference current.

Abstract: Relaxation oscillator circuitry is presented with low drift and native offset cancellation, including an amplifier amplifying a first current signal to provide a pulse amplifier output waveform, an integrator integrating a second current signal to provide a ramp output waveform, and a comparator comparing the integrator output waveform with a threshold set by the amplifier output waveform to generate an alternating oscillator output used to switch the polarities of the first and second current signals.

Abstract: An oscillator circuit comprises a current path including a capacitor having a first side and a second side, wherein each of the first and second side of the capacitor is selectively connectable to at least a first supply terminal to apply a first voltage potential or a second supply terminal to apply a second voltage potential. The oscillator circuit comprises a comparator having a first input terminal being selectively connectable to the first or the second side of the capacitor, and a second input terminal being connected to a terminal to apply a reference voltage. An output signal of the oscillator circuit is generated in dependence on a comparator output signal of the comparator.

Abstract: An oscillator includes a flip-flop that outputs a first signal having a phase that is inverted according to a comparison signal, a comparison circuit that compares an amplification voltage with a first reference voltage and outputs the comparison signal, a current source having an output voltage that is fixed to a second reference voltage, and an amplification circuit that generates the amplification voltage according to a current outputted from the current source and the second reference voltage.

Abstract: In an electronic device, an RC oscillator generally includes a resistor, a capacitor and at least one inverter. The resistor and capacitor generate a time-varying voltage. The time-varying voltage is provided to the at least one inverter to cause a clock signal to propagate therethrough. The clock signal propagates with a time delay that is at least partially dependent on a supply voltage. The supply voltage is adjusted to maintain the time delay at almost a constant value.

Abstract: An oscillator circuit for providing an output clock signal is described. The oscillator circuit comprising a voltage reference, a first current source, first capacitor, first capacitor switch, second current source, second capacitor, second capacitor switch, first comparator, second comparator and flip-flop. The first comparator comprises a first chopper-stabilized comparator switchable between a compare phase and a zeroing phase in dependence on the output clock signal and arranged to operate in the compare phase in a first half-phase of the output clock signal to provide a first comparator output from comparing the first capacitor voltage to the reference voltage and in the zeroing phase in the second half-phase.

Abstract: A method for setting adjusting frequency of an electric oscillating circuit of a corona ignition device. The circuit is excited with a starting value (f1) of the excitation frequency and a reference value (IR) of a frequency-dependent variable is measured. The excitation frequency is incrementally changed. After every increment a value (I) of the frequency-dependent variable is measured and it is determined whether the measured value (I) deviates significantly from the reference value (IR). Depending upon the measured value (I) relative to the reference value, the value (f) of the excitation frequency is either set as the new starting value (f1) or stored as a boundary value. Further incremental changes to the excitation frequency are made in one of two directions and further comparisons of the values I and IR are performed. Ultimately, the excitation frequency can be set to a mean value between first and second boundary values.

Abstract: A self-biased RC (resistor-capacitor) oscillator and ramp generator circuit includes a combined current and voltage reference circuit for providing a reference current, a first reference voltage, and a second reference voltage. The combined current and voltage reference circuit includes a circuit branch of an NMOS transistor in a diode connection, a PMOS transistor in a diode connection, and a resistor coupled in series. The circuit also has a signal generating circuit that includes a capacitor. The signal generating circuit is configured to charge and discharge the capacitor between the first reference voltage and the second reference voltage. The self-biased RC oscillator and ramp generator circuit is configured to provide a ramp or saw tooth signal at a node of the capacitor and to provide an oscillator output signal at an output of the signal generating circuit.

Abstract: A transistor device includes a compound semiconductor body, a drain disposed in the compound semiconductor body and a source disposed in the compound semiconductor body and spaced apart from the drain by a channel region. A gate is provided for controlling the channel region. The transistor device further includes a gate overvoltage protection device connected between the source and the gate, the gate overvoltage protection device including p-type and n-type silicon-containing semiconductor material.

Abstract: Apparatuses and methods are disclosed for oscillators that are substantially insensitive to supply voltage variations. In one such example apparatus, a capacitance circuit is configured to be charged and discharged. Charging and discharging circuits are coupled to the capacitance circuit and configured to charge and discharge, respectively, the capacitance circuit by charging and discharging currents responsive to charge and discharge signals. A control circuit is coupled to the charging circuit and the discharging circuit, and is configured to provide the charge and discharge signals responsive to a voltage of the capacitance circuit, and is further configured to provide an oscillation signal responsive to the voltage of the capacitance circuit. The charging current, the discharging current, or both the charging and discharging currents are proportional to a difference between a first reference voltage and a second reference voltage.

Abstract: Devices, systems, and methods for spread spectrum clock generation are disclosed. The devices, systems, and methods generate a clock signal at a frequency and generate a voltage output based on the frequency of the clock signal, wherein the generated voltage output is indicative of the frequency of the generated clock signal. The devices, systems, and methods also compare the frequency of the clock signal generated to a desired frequency output by comparing the generated voltage output to a voltage reference and adjust the frequency of the clock signal generated based on the results of the comparison.

Abstract: A periodic signal generator includes a resonant LC tank circuit that generates a periodic reference signal at a first frequency at a differential output thereof. A temperature-responsive frequency compensation module is electrically coupled to the differential output of the resonant LC tank circuit. This module includes a temperature dependent voltage control module that generates a temperature dependent control voltage and an array of switchable capacitive modules that is electrically coupled to a first node of the differential output of the resonant LC tank circuit and responsive to the temperature dependent control voltage and a plurality of switching coefficients. The array of switchable capacitive modules includes a fixed capacitor having a first terminal electrically coupled to the first node and a voltage-controlled variable capacitor having a first terminal electrically coupled to the first node.

Abstract: A temperature controlled oscillator includes an oscillation unit and a filter unit. The oscillation unit is configured to generate at least one reference voltage based on a supply voltage and a ground voltage, and to generate an oscillation signal having a period varying according to a temperature, the oscillation unit configured to generate the oscillation signal based on a filter voltage and the at least one reference voltage. The filter unit is configured to generate the filter voltage based on the oscillation signal.

Abstract: A voltage or current controlled current-feedback operational-amplifier based multivibrator provides oscillation based on two current feedback operational amplifiers, three resistors and one grounded capacitor. The multivibrator can achieve almost constant frequency of oscillation and its duty cycle can be adjusted by a control voltage or a control current. The multivibrator can be used for generating pulse-width modulated signals.

Abstract: A relaxation oscillator is provided in the present invention. The relaxation oscillator includes a R-S latch, a first delay circuit and a second delay circuit. The input terminal of the first delay circuit is coupled to the Q output terminal of the R-S latch, and the output terminal of the first delay circuit is coupled to the reset terminal of the R-S latch. The input terminal of the second delay circuit is coupled to the inversion Q output terminal of the R-S latch, and the output terminal of the second delay circuit is coupled to the set terminal of the R-S latch. When the input terminal of the first delay circuit inputs a first logic voltage, after a delay time, the output terminal of the first delay circuit outputs a second logic pulse. When the input terminal of the second delay circuit inputs the first logic voltage, after the delay time, the output terminal of the second delay circuit outputs the second logic pulse.

Abstract: One example of generating a clock signal via an oscillator system includes increasing a first comparison voltage at a first comparison node from a first magnitude to a second magnitude in response to a clock signal. A second comparison voltage is increased at a second comparison node from the first magnitude to the second magnitude in response to the clock signal. The clock signal changes state in response to the second comparison voltage increasing to a magnitude that is greater than the first comparison voltage. The first comparison voltage decreases from the second magnitude to the first magnitude in response to the clock signal. The second comparison voltage decreases from the second magnitude to the first magnitude in response to the clock signal. The clock signal changes state in response to the second comparison voltage decreasing to a magnitude that is less than the first comparison voltage.

Abstract: Embodiments of the present disclosure may provide a relaxation oscillator with improved performance against phase noise error. The phase noise error may be reduced from sources whose power is greater at lower frequencies. To reduce the noise error, the relaxation oscillator may include chopping in the charging current driver; chopping in the trigger level generator; and/or chopping in the currents that feed the cells. A chopped amplifier may be provided to perform chopping of the input signals.

Abstract: A relaxation oscillator circuit includes a comparator including a first input, a second input, a bias input, and an output. The first input is coupled to a charging node, and the second input is configured to receive a reference voltage. The relaxation oscillator circuit further includes a first bias circuit configured to provide a bias signal to the bias input of the first comparator when a first node voltage on the charging node exceeds a first reference.

Abstract: An integrated circuit (10) has an internal RC-oscillator (20) for providing an internal clock signal (CLI) having an adjustable oscillator frequency. The integrated circuit (10) further comprises terminals (101, 102) for connecting an external LC tank (30) having a resonance frequency and a calibration circuit (40) which is configured to adjust the oscillator frequency based on the resonance frequency of the LC tank (30) connected during operation of the integrated circuit (10). An internal auxiliary oscillator (46) is connected to the terminals (101, 102) in a switchable fashion and is configured to generate an auxiliary clock signal (CLA) based on the resonance frequency. The calibration circuit (40) comprises a frequency comparator (47) which is configured to determine a trimming word (TRW) based on a frequency comparison of the internal clock signal (CLI) and the auxiliary clock signal (CLA). The LC tank (30) to be connected is an antenna for receiving a radio signal.

Abstract: An oscillator module includes a first MOS transistor and a capacitor. The capacitor is coupled between a gate and source of the first MOS transistor. The drain of the first MOS transistor receives a first bias current and generates an oscillating output signal. A switching circuit operates in response to the oscillating output signal to selective charge and discharge the capacitor. A current sourcing circuit is configured to generate the bias current. The current sourcing circuit includes a second MOS transistor which has an identical layout to the first MOS transistor and receives a second bias current. A resistor is coupled between a gate and source of the second MOS transistor. The current sourcing circuit further includes a current mirror having an input configured to receive a reference current passing through the resistor and generate the first and second bias currents.

Abstract: A relaxation oscillator includes a first amplifier having a first input terminal receiving an output voltage signal, a second input terminal receiving a reference voltage signal, and an output terminal comparing the output voltage signal and the reference voltage signal and in response thereto outputting a control signal; a second amplifier having a first input terminal receiving the output voltage signal, a second input terminal connected to the output terminal of the first amplifier for receiving the control signal, and an output terminal connected to the first input terminal of the first amplifier and the first input terminal of the second amplifier for comparing the control signal and the output voltage signal and in response thereto outputting the output voltage signal; and a sensing capacitor for generating the output voltage signal by charging/discharging operations by the output terminal of the second amplifier.

Abstract: An oscillator that includes a first source current leg and first sink current leg to source current and sink current, respectively, during a startup mode of oscillator operation. The oscillator includes a second source current leg and a second sink current leg to source current and sink current, respectively, during a second mode of oscillator operation.

Abstract: An oscillation circuit includes a condenser, a charging/discharging part configured to switch between charging and discharging of the condenser according to a control signal, a comparator configured to compare a voltage of the condenser with a reference voltage and output a comparison result signal, a flip-flop configured to be set or reset according to the comparison result signal, supply an output signal as the control signal to the charging/discharging part, and output the output signal as an oscillation signal, and a current control part configured to control an operating current of the comparator in correspondence with the voltage of the condenser.

Abstract: A period signal generation circuit including a control voltage generator and a period controller. The control voltage generator selecting one of temperature-dependent voltages to output the selected temperature-dependent voltage as a control voltage. The first and second temperature-dependent voltages varying according to a temperature and the third temperature-dependent voltage is constant regardless of variation of the temperature. The period controller configured to determine an amount of a current discharging from an internal node in response to the control voltage and outputs a periodic signal whose cycle time is determined according to a level of an internal signal induced at the internal node.

Abstract: An oscillation circuit includes an RS flip-flop for generating output signals based on a set signal and a reset signal, an electric-charge charge/discharge unit which has first and second capacitors and charges or discharges the first and second capacitors complementarily based on the output signals, a first comparator which compares a first voltage according to electric charge accumulated in the first capacitor and a first reference voltage and outputs the set signal, a second comparator which compares a second voltage according to electric charge accumulated in the second capacitor and the first reference voltage and outputs the reset signal, and a control unit for controlling a timing at which respective voltage levels of the first reference voltage and the first voltage match and a timing at which respective voltage levels of the first reference voltage and the second voltage match according to a frequency of the output signals.

Abstract: An apparatus includes a selection device to select a spreading profile from a plurality of spreading profiles, and an oscillation device to generate clock signals having different frequencies over time based on the selected spreading profile. A method includes selecting a spreading profile from a plurality of spreading profiles, and generating clock signals having different frequencies over time based on the selected spreading profile.

Abstract: Methods and circuits for CMOS relaxation oscillators are disclosed. A single capacitive element, a single current source and a switching network are utilized. A switching network of the oscillator allows both nodes of the capacitive element to rise and fall between a positive and a negative voltage with respect to ground supply, without causing leakage to substrate or risk of latch-up, i.e. the inadvertent creation of a low-impedance path. The oscillator requires minimum silicon area, has an improved duty cycle, is particular useful for implementing lower frequency clocks and is enabled for smaller technology nodes, lower than 250 nm, due to lower supply voltage.

Abstract: A control circuit for reducing electromagnetic interference is provided. The control circuit includes a periodic signal generator and a modulation controller. The periodic signal generator adjusts a modulation periodic signal generated by the periodic signal generator, according to a feedback modulation signal. The modulation controller is coupled to the periodic signal generator, for receiving the modulation periodic signal, and adjusting a frequency of the received modulation periodic signal according to a plurality of delay periods set according to a plurality of control signals, and generating the feedback modulation signal.

Abstract: A low current single chip oscillator timing circuit which includes a dual mode capacitor circuit having a larger capacitance mode and a smaller capacitance mode having a fixed ratio. The timing circuit also includes an oscillator circuit that uses the dual mode capacitor circuit as a part of its time base wherein the large capacitance mode is operated with low power consumption and as needed includes a circuit that generates a reference pulse, wherein the short pulse and the reference pulse are compared and the result is used for correction to the oscillator frequency to create a feedback loop.

Abstract: An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.

Abstract: An oscillation circuit including a reference voltage generation circuit that adds a proportional-to-absolute-temperature (PTAT) output, which increases in proportion to an absolute temperature, to a complementary-to-absolute-temperature (CTAT) output, which decreases in proportion to an absolute temperature, to generate and output a reference voltage. The oscillation circuit generates an oscillation signal having a desired and fixed frequency.

Abstract: A relaxation oscillator circuit includes a comparator including a first input, a second input, a bias input, and an output. The first input is coupled to a charging node, and the second input is configured to receive a reference voltage. The relaxation oscillator circuit further includes a first bias circuit configured to provide a bias signal to the bias input of the first comparator when a first node voltage on the charging node exceeds a first reference.

Abstract: A relaxation oscillator is provided in the present invention. The relaxation oscillator includes a R-S latch, a first delay circuit and a second delay circuit. The input terminal of the first delay circuit is coupled to the Q output terminal of the R-S latch, and the output terminal of the first delay circuit is coupled to the reset terminal of the R-S latch. The input terminal of the second delay circuit is coupled to the inversion Q output terminal of the R-S latch, and the output terminal of the second delay circuit is coupled to the set terminal of the R-S latch. When the input terminal of the first delay circuit inputs a first logic voltage, after a delay time, the output terminal of the first delay circuit outputs a second logic pulse. When the input terminal of the second delay circuit inputs the first logic voltage, after the delay time, the output terminal of the second delay circuit outputs the second logic pulse.

Abstract: A relaxation oscillator is provided. A first current source provides a first current. A second current source provides a second current. A resistive element is coupled between the first current source and a ground. A capacitive element is coupled between the second current source and the ground. A comparator has a non-inverting input terminal, an inverting input terminal and an output terminal for outputting a compare result. A clock generator provides a clock signal according to the compare result. A switching unit alternately couples the non-inverting input terminal and the inverting input terminal of the comparator to the resistive element and the capacitive element according to the clock signal.

Abstract: There is provided an oscillation frequency regulating circuit including: a measuring section that performs measurement based on an oscillation frequency of an oscillation circuit; a comparator section that compares a measurement value measured by the measuring section against a set comparison value over a set comparison duration; a setting section that sets a comparison value selected from a plurality of comparison values of different magnitudes and that sets in the comparator section the comparison duration according to the magnitude of the selected comparison value; and a regulation section that, based on the comparison result of the comparator section, regulates the oscillation frequency of the oscillation circuit such that the oscillation frequency that is measured by the measuring section becomes a target oscillation frequency.

Abstract: Aspects of the disclosure provide a circuit. The circuit includes a current generator, a capacitor, a comparator, a switch and a clock generator logic. The current generator is configured to generate a current proportional to a comparator threshold voltage by a ratio. The capacitor is configured to be charged by the current to have a capacitor voltage. The comparator is configured to compare the capacitor voltage with the comparator threshold voltage. The switch is configured to discharge the capacitor based on the comparison. The clock generator logic is configured to generate a clock signal based on the comparison, such that a frequency of the clock signal is a function of the ratio and is independent of the current and the comparator threshold voltage.

Abstract: An oscillator circuit with a comparator is provided, wherein the comparator has a supply input. A supply circuit supplies the comparator with a first current during a first section of an oscillator period of the oscillator circuit and with a second current greater than the first current during a second, different section of the oscillator period.

Abstract: An oscillator formed from low cost discrete semiconductors and passive devices creates a linear periodic ramp of constant frequency with ramp slope based on an external voltage signal. Parameters are stable over a wide range of temperatures and variations of transistor parameters that normally degrade in extreme environments. The oscillator period can be phase and frequency synchronized to an external clock source over a wide range of frequencies. The oscillator ramp generator phase can be synchronized on a cycle by cycle basis for incorporation in power converters employing spread spectral EMI reduction techniques, multi-converter systems employing clock interleaving for distribution bus filter optimization, and resonant mode converters employing zero voltage switching techniques. Oscillator ramp rate is independent of frequency and can be synchronized to DC (inhibit) for use in ultra low power burst mode power conversion.

Abstract: An oscillator is disclosed that can generate an oscillation signal using a latch and two delay elements. For some embodiments, the oscillator includes an SR latch, a first delay element, and a second delay element. The SR latch has a first input, a second input, a first output, and a second output. The first delay element is coupled between the first output and the first input of the SR latch. The second delay element is coupled between the second output and the second input of the SR latch. For some embodiments, the first and second delay elements include a programmable pull-up circuit that allows the charging current to be adjusted in discrete amounts, and include a programmable capacitor circuit that allows the capacitance value to be adjusted in discrete amounts.

Abstract: A semiconductor device includes: a resistance R whose resistance value varies in response to a substrate temperature variation; a resistance corrector that is coupled in series with the resistance R and switches its resistance value by a preset resistance step width to suppress a resistance value variation of the resistance R; a first voltage generator for generating a first voltage that varies in response to the substrate temperature; a second voltage generator for generating second voltages Vf1 to Vfn?1 for specifying the first voltage at a point when a switching operation of the resistance value of the resistance corrector is performed; and a resistance switch unit for switching the resistance value of the resistance corrector by comparing the first voltage and the second voltages Vf1 to Vfn?1.