Abstract: A microwave differential amplifier comprises a first and a second matched NMOS device, each connected with the source to a common bias node, the gate to an input port for receiving a differential input signal and with the drains to an output port for providing a differential output signal. The Miller capacitors of each device provide the necessary feedback between the input and output ports for shifting the phase of the differential output signal with respect to the phase of the differential input signal with 45.degree. at a predetermined frequency. The operating point of the NMOS devices is maintained in the linear region of the respective transfer characteristic, using matched loads and a corresponding bias current. The loads may be resistors, in which case AGC is used for maintaining a constant bias current, or active loads. A VCO built with four such differential amplifiers in a gyrator configuration oscillates at the predetermined frequency and has eight output signals.

Abstract: According to the preferred embodiment, a self-biased phase-locked loop is provided that overcomes the limitations of the prior art bias methods and apparatus. In general, a self-biased current controlled semiconductor device, typically a current controlled oscillator, is self biased by the use of a first feedback path, typically provided by a phase-locked loop, where the feedback path provides a control current for controlling the current controlled device. A second feedback path, typically a pair current mirrors, serves as a bias loop having unity gain. The bias loop provides a bias current that is responsive to the control current. This device has the advantage of being self biasing, thus no other biasing circuitry is required.

Abstract: There is disclosed a voltage-controlled oscillator circuit capable of being operated at low power supply voltages and accomplishing low electric power consumption. The circuit permits the duty cycle to be controlled well. The circuit is capable of operating at high speeds. The circuit comprises a first and a second dynamic latch circuits producing oscillation output. Each dynamic latch circuit consists of a series combination of a P-channel MOS transistor and an N-channel MOS transistor. An output terminal is connected to the junction of these two transistors. The output from each latch circuit is inverted according to the voltage at the gate of each MOS transistor and dynamically latches the state of the output. This inversion is performed by turning on the MOS transistors by first and second capacitive elements and by first and second comparator circuits. The capacitive elements are charged and discharged by the outputs from the dynamic latch circuits.

Abstract: A function-differentiated temperature compensated crystal oscillator (10) is disclosed having an integrated circuit (12), at least one capacitor (14) and a piezoelectric element (16) being electrically coupled to a leadframe (18), and being encapsulated in a molded package body (36). The leadframe (18) includes two groups of leads (20, 26), each group accessing different functionalities of the temperature compensated crystal oscillator (10). In one application, the first group of leads (20) may be excised preventing user access to internal functions of the oscillator (10). In another application, the second group of leads (26) may be excised allowing user access to the internal functions of the oscillator (10). This configuration enables a single package to be used for different user applications and functions.

Abstract: A quadrature oscillator is provided constructed of NOR gates in the manner of a non-linear circuit which is inherently unstable and which cycles sequentially through four distinct states at a rate determined by the constitution of the NOR gates. The quadrature oscillator includes first and second stages that each include first and second NOR gates. The output of the first NOR gate of the first stage is connected as an input to the second NOR gate of each of the first and second stages. The output of the second NOR gate of the first stage is connected as an input to the first NOR gate of each of the first and second stages. The output of the first NOR gate of the second stage is connected as an input to the first NOR gate of the first stage and the second NOR gate of the second stage. The output of the second NOR gate of the second stage is connected as and input to the second NOR gate of the first stage and the first NOR gate of the second stage.

Abstract: A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing.

Abstract: The output frequency (14) of an oscillator circuit (10) can be controlled by replacing at least one of the reactive components (40), such as a capacitor or inductor, with a synthesized element (22). The synthesized element creates a signal that corresponds to the response of the reactive component it is replacing. The synthesized element may be a current source (44), such as a field effect transistor, that is capable of operating at low voltages.

Abstract: An RC oscillator includes an RC network for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

Abstract: A voltage-controlled oscillator has ring oscillators R1, R2 and R3 which have three amplifier elements A1-A3, A4-A6 and A7-A9 respectively which are connected in the form of a ring. The way of connecting with the respective amplifier elements A10 to A18 is as follows: First, optionally selecting two output terminals from the 3.times.3 amplifier elements which form three ring oscillators, wherein the two output terminals are not selected from the input and output terminals of one amplifier element, and wherein the two output terminals are not selected from the output terminals belonging to the same ring oscillator. Next, connecting the input and output terminals of one of the amplifier elements A10 to A18 to the optionally selected two output terminals. Then repeating the above procedures one or more times to form a network between the ring oscillators R1 to R3. C1 to C9 are nodes for the connections.

Abstract: A digital trimming circuit is used to produce a stable time reference signal. This type of reference time signal can be used in equipment, such as watches, which have motors and acoustic outputs that interfere with producing the time reference signal. A basic oscillation frequency, which is produced by an oscillator circuit, is frequency divided to form the generic time reference signal. The digital trimming circuit generates a control signal to shorten the period of the time reference signal by predetermined amounts based on correction data. The control signal is in the form of pulses which can be dispersively applied to create substantially equal intervals between pulses during one time period of the time reference time signal. While maintaining the necessary digital trimming amount in one digital trimming time period, an expansion/reduction amount of the time reference signal is suppressed at one digital trimming time instant.

Abstract: A frequency control circuit of an FM modulator with a small number of external parts and a low number of IC pins, including a non-linear D/A converter, a current generator circuit and an emitter-coupled multivibrator. The non-linear D/A converter for giving an analog optimum resistance value depending on digital frequency control signals includes a plurality of resistors weighted by K.sup.n (1<K<2 and n is a sequential natural number). The current generator generates a current .DELTA.I depending on the output resistance value of the non-linear D/A converter. An oscillating frequency of the multivibrator is determined in proportional to I.sub.o /4CF.DELTA.I (I.sub.o represents a current value of an operational current source, C represents a capacitance of a capacitor, R represents a resistance value of a resistor and .DELTA.I represents a current flowing in the resistor). When the oscillating frequency is controlled depending on .DELTA.

Abstract: A voltage controlled oscillator that completely eliminates the need for any externally mounted coil and capacitor includes a first loop and a second loop. The first loop provides band-limiting of an output signal of an amplifier through a bandpass filter to provide oscillation at a frequency of a resonant point of the bandpass filter, and the second loop controls the oscillation amplitude, so that a lowpass filter output with a 90.degree. phase is extracted from the first loop, while a bandpass filter output with a 0.degree. phase is extracted from the second loop. The voltage controlled oscillator may be used in an automatic fine tuning circuit for television.

Abstract: A voltage controlled oscillator circuit includes a predetermined number of interconnected differential comparator cells having source connected p-channel and n-channel transistors, a biasing transistor connected to the sources of the p-channel or n-channel transistors, and clamping circuits connected to said first and second n-channel transistors. The voltage controlled oscillator circuit further includes filter circuitry for filtering the input currents to the biasing transistor.

Abstract: A split dielectric resonator having two preferably half cylindrical dielectric elements is used to stabilize an oscillator operating at microwave frequencies. Fine tuning may be achieved by means of a tuning screw which has a thermal expansion coefficient between those of the dielectric elements and electrically conductive supporting walls. Additionally, fine tuning may be achieved by offsetting the two elements from each other within a horizontal or vertical plane. This oscillator can also be configured as an accelerometer or pressure or displacement sensor by substituting a movable deflecting member for the supporting wall.

Abstract: A current control circuit of a ring oscillator is provided for use in the PLL oscillators.

Abstract: The voltage-controlled oscillator according to the invention has a plurality of first amplifier elements 100 and a plurality of phase correctors 101. Each of the first amplifier element 100 is provided with a pair of input signal lines, a pair of output signal lines and one or more control signal line 104 and can function as a differential amplifier and control the delay time for which a differential signal is transmitted from the pair of input signal lines to the pair of output signal lines by the control signal of the control signal line 104.

Abstract: A method and apparatus for a controlled oscillator which may be incorporated in a phase locked loop is accomplished by including a current controlled reference, a current mirror and a plurality of inverters that form a ring oscillator within the controlled oscillator. The controlled reference provides a current control signal to the current mirror, which, in turn, provides a load control signal to each inverter of the ring oscillator. Each inverter is characterized by a differential load section which includes a pair of load transistors for receiving the load control signal and for providing a current source from the load control signal and a pair of clamping transistors configured to provide a non-linear clamping circuit which limits the voltage range of a differential output. The load transistors are connected in parallel with the clamping transistors to provide a linear differential output.

Abstract: A current controlled variable frequency oscillator (260) operates at a characteristic frequency that is determined primarily by a scaled current. A filter cascade (320) receives the scaled current for setting a filter cascade frequency substantially equal to the characteristic frequency. Additionally, the filter cascade (320) receives a triangular signal at a non-inverting input, the filter cascade (320) converting the triangular signal into a sinewave signal. A lowpass filter (330) receives the scaled current for setting a lowpass filter frequency to a frequency substantially less than the characteristic frequency. The lowpass filter (330) also receives the sinewave signal and provides an average signal therefrom. A comparator (340) receives the scaled current, wherein the comparator (340) compares the sinewave signal and the average signal for providing a substantially squarewave signal therefrom.

Abstract: A VCO includes a ring oscillator formed by connecting a plurality of voltage controlled inverting delay cells together, and a plurality of transistors for providing control voltages to the plurality of voltage controlled inverting delay cells. Preferably, each transistor has a drain connected to a reference voltage, and a source connected to a voltage controlled inverting delay cell paired to that transistor. Consequently, each transistor acts as a source-follower so that it provides a control voltage to its corresponding voltage controlled inverting delay cell which follows a control voltage driving its gate, thereby isolating the control voltage provided to its corresponding voltage controlled inverting delay cell from power supply noise.

Abstract: Five CMOS inverters are connected in a series ring to form an oscillator. Current to the inverters is controlled to establish gate delays of the inverters and thereby determine a frequency of oscillation of the oscillator. The oscillator is included in a phase locked loop where the gate delay of the inverters is selected by selecting the value of a frequency divider of the phase locked loop. The selected delay is used to form a train of pulses with a desired duty cycle.

Abstract: A digitally-tuned oscillator (DTO) includes a digital-to-analog converter (DAC) and an RC oscillator. The RC oscillator includes an RC circuit for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.

Abstract: A low noise high-frequency clock generator using a low speed voltage controlled oscillator which includes 2m differential delay elements connected in series in an inverting configuration, where m is an integer greater than 0. The output of the 2mth delay element is coupled to the input of the first delay element in a non-inverting configuration. M 2-input exclusive NOR gates are provided wherein respective input pairs are taken from positive terminal inputs of adjacent delay elements. The clock generator also includes an m-input OR gate coupled to the m-outputs from the respective m exclusive NOR gates for generating the clock generator output signal. The delay elements have a variable delay associated therewith controlled by a control delay signal DCS. Changes in the delay associated with each delay element changes the frequency of the clock generator output signal wherein the output frequency is equal to 1/(2d), where d is the time delay associated with each delay element.

Abstract: A current source including a current mirror circuit and an active load circuit which form a reference branch, for setting a reference current value, and a mirroring branch, defining an output current value, connected between supply and ground. A voltage stabilizing transistor is interposed between the current mirror circuit and the load circuit in the reference branch only, and is so biased as to maintain its gate terminal at a predetermined voltage. As such, the potential with respect to ground of the drain terminal of the reference branch load transistor is fixed, so that its drain-source voltage drop (and the current through it) is substantially independent of supply voltage. The current source may be used to advantage in an oscillator for generating the: clock signal of a nonvolatile memory.

Abstract: Synchronization apparatus comprising a phase-locked loop for generating an output signal and for synchronizing the output signal to an input signal, characterized in that the apparatus comprises a controller for iteratively determining whether the output signal is synchronized to the input signal by the phase-locked loop and adjusting the frequency of the output signal to bring the output signal within the capture range of the phase-locked loop if the output signal is not synchronized to the input signal.

Abstract: A digital trimming circuit is used to produce a stable time reference signal. This type of reference time signal can be used in equipment, such as watches, which have motors and acoustic outputs that interfere with producing the time reference signal. A basic oscillation frequency, which is produced by an oscillator circuit, is frequency divided to form the generic time reference signal. The digital trimming circuit generates a control signal to shorten the period of the time reference signal by predetermined amounts based on correction data. The control signal is in the form of pulses which can be dispersively applied to create substantially equal intervals between pulses during one time period of the time reference time signal. While maintaining the necessary digital trimming amount in one digital trimming time period, an expansion/reduction amount of the time reference signal is suppressed at one digital trimming time instant.

Abstract: A ring oscillator having an odd number of single ended stages, each stage including two transistors connected as a current mirror. The stage provides for low-voltage performance and improved process tolerance characteristics.

Abstract: A ring oscillator buffer stage, supplied by an adjustable current source of an asymmetrical current controlled ring oscillator, is provided for amplifying the output of the ring oscillator. The frequency of the ring oscillator varies as a function of a control signal. The buffer stage includes; a plurality of current controlled buffers, supplied by currents which are controlled in correspondence with the control signal, for amplifying the output of the oscillator; and a buffer for amplifying the output of the current controlled buffers for providing a full-swing output signal with a duty cycle of approximately 50%.

Abstract: A voltage-controlled capacitor includes a multiplier, having an output which serves as terminals of the controlled capacitor. The output voltage of the multiplier is applied to a reference capacitor. A signal in phase with the current in the reference capacitor is applied at one input of the multiplier, the other input of the multiplier receiving a signal determining the value of the controlled capacitor.

Abstract: A frequency modulating system for frequency-modulating an input signal with a predetermined carrier frequency comprising a controller circuit and a frequency modulator is provided. The controller circuit includes an automatic frequency detecting circuit, a voltage controlled oscillator, an error current generator, a feedback clamping circuit, a deviation current generator, and an adder circuit generating a frequency deviation/carrier frequency correction signal provided to the frequency modulator. The frequency modulator modulates the frequency in response to an output of the controller circuit and includes an oscillator having the same structure as that of the voltage controlled oscillator.

Abstract: A filter network is presented for a phase-locked loop (PLL) circuit having a voltage controlled oscillator (VCO) with a control input and a bias input. The filter network includes a conventional filter circuit that provides a "pole" and a "zero" to the transfer function of the PLL circuit. The conventional filter circuit is coupled between the control input of the VCO and ground. An additional filter circuit is also coupled to the control input of the VCO, and to a bias input of the VCO. This additional filter circuit provides at least one additional "zero" to the PLL transfer function to extend the frequency range of the PLL circuit without impairing circuit stability. A transconductance amplifier is preferably employed within the additional filter circuit to facilitate tailoring of the open loop gain of the filter/oscillator circuitry.

Abstract: The present invention provides a voltage controlled oscillating circuit comprising a multi-staged phase inversion circuit composed of 4 or more even-number stages of phase inversion devices connected in series; and a switch circuit having a delay time characteristic similar to that of said phase inversion circuit, wherein the switch circuit satisfies oscillation conditions by converting an output phase of the even-numbered inverters connected in series into a phase that is the same as those of the outputs of odd-numbered inverters connected in series; thereby obtaining timing signals having a period equal to 1/N of the oscillation period.

Abstract: A voltage controlled oscillator apparatus for generating a desired frequency, set by a tuning voltage, toward modulating a transmission signal on the desired frequency. The voltage controlled oscillator apparatus includes an oscillator transistor the base of which is RF live so as to destabilize the transistor such that it oscillates. The oscillator transistor emitter is operably connected through a capacitor to a tank circuit, which stores RF energy at the desired frequency, based on the tuning voltage, to set the oscillator transistor frequency. The inherent collector-base junction capacitance serves to provide voltage variable capacitance resulting in the generation of a carrier signal. The oscillator transistor collector is electrically connected to an amplifier transistor's emitter, such that the amplified transistor and oscillator transistor are in cascode configuration. The amplifier transistor amplifies the transmission signal input at its base and presents a signal output on its collector.

Abstract: A voltage controlled oscillator (VCO) which may be adjusted to provide oscillatory signals for a wide range of frequencies includes a relaxation oscillator in which a ramp signal is compared to a reference threshold which exhibits hysteresis. The frequency of the oscillator is changed by varying the hysteresis range of the threshold level and by changing the rate at which the ramp is generated. At higher frequencies, the signal processing delay through the comparator is a factor in determining the frequency of the signal produced by the oscillator. Current sources internal to the oscillator are controlled by a reference potential that is generated from an externally supplied band-gap reference potential. The VCO is used in a phase-locked loop which includes a charge pump circuit that accumulates charge on a capacitor responsive to limited-width pulses applied to a current source which is controlled by the reference potential generated in the VCO.

Abstract: A phase locked loop circuit includes a phase/frequency detector which uses a divider circuit and feedback from a clock distribution tree to generate INC and DEC pulses which have no "dead zone". A pair of charge pumps receives the INC and DEC pulses. One charge pump is a differential pump and has voltage controlled common mode feedback circuit to maintain a common mode controlled voltage. A differential current is outputted to a loop filter capacitor by this charge pump. The other charge pump is a single-ended output pump which supplies current to a current controlled oscillator which also receives input from a voltage to current converter. The current controlled oscillator includes a variable resistance load which varies inversely with the magnitude of the input current. A jitter control circuit is provided which reduces jitter in the current controlled oscillator output in the locked phase.

Abstract: An oscillator including two gm/C stages is disclosed. Each gm/C stage includes a differential pair of transistors, a capacitor, and a tunable current source. Alternatively, multi-tanh n-tuplets can be used in place of the differential pairs in the gm/C stages to increase the linearity of the gm/C stage. The gm/C stages include a pair of input terminals, a pair of output terminals, and a pair of common-mode terminals. The two gm/C stages are interconnected in a feedback loop to form a quadrature oscillator. A common-mode biasing circuit is coupled a supply voltage and each pair of common-mode terminals for biasing the respective gm/C stage. The common-mode biasing circuits can include: current mirrors, diode pairs, and even resistors. An optional start-up circuit can be coupled to each gm/C stage to ensure start-up of the associated gm/C stage.

Abstract: A variable frequency oscillator which can be implemented entirely in a semiconductor chip, which is variable over a broad frequency range and which has relatively low phase noise, includes a variable impedance circuit, a reactive load connected to an output terminal pair of the variable impedance circuit, and a negative impedance circuit having an output terminal pair connected to the output terminal pair of the variable impedance circuit. In one embodiment, the negative impedance circuit has an input terminal pair connected to an input terminal pair of the variable impedance circuit to serve as a positive feedback path for the variable impedance circuit. In another embodiment, the negative impedance circuit includes a pair of level shifters which ensure that the variable impedance circuit is properly biased and works in a forward active region.

Abstract: An oscillator circuit including a current-controlled phase shift circuit and a feedback circuit including a quartz resonator is capable of varying the oscillation frequency in accordance with control current signals. A phase shift circuit included in the current-controlled phase shift circuit includes a first low-pass filter including a resistor and a capacitor, a first buffer amplifier, a second low-pass filter including a resistor and a capacitor, and a second buffer amplifier. The phase shift circuit has a significant gain at any frequency for oscillation. Especially an oscillation circuit implemented by an integrated circuit satisfies the suitable condition in which relative value of resistances and capacitances do not vary.

Abstract: A fixed duty ratio, variable frequency, square wave generator includes an astable multivibrator having a pair of resistors coupled in series between a supply voltage terminal and a capacitor, such as of a type implemented with a 555 timer, and further includes a JFET connected between the capacitor and ground. In a current-controlled version, the anode of a diode is connected to the gate of the JFET, and the cathode of the diode is connected to a sensing resistor for sensing current in a load. The multivibrator generates a ramp voltage across the capacitor which varies between predetermined fractions of the supply voltage with a fixed duty ratio. The capacitor of the multivibrator charges and discharges through the series connection of the resistors and the JFET channel resistance with charging and discharging times that vary with the input voltage to the JFET, thereby varying the generator frequency.

Abstract: A circuit design extending the range and linearizing the transfer characteristic of a fast voltage controlled oscillator (VCO). In addition, a multi-range VCO is described. Range extension is achieved by modifying the delay cell of a current controlled ring oscillator. The VCO transfer characteristic is linearized by piece-wise linear current control added to the delay cell. Additionally, a VCO capable of multi-range operation is provided. With the addition of multiple current sources which control booster inverter current, and by selectively enabling the additional current sources, a VCO with multiple frequency ranges can be achieved.

Abstract: A bias voltage generator for a voltage controlled oscillator is described. In one aspect of the invention, the bias voltage generator includes a biasing circuit to generate a minimum clock output at zero operating voltage, and includes a common mode rejection circuit for the BIASN and BIASP control voltages for the differential delay stages and a IDD test current shut-down circuit. A differential delay stage is described that includes a current source controlled by the BIASN and BIASP control voltages from the bias voltage generator, a resistance linearization circuit for current controlling transistors of a BIASN circuit, and a process variation circuit for compensating for temperature and process variations. The improved characteristics of the resulting VCO permits high frequency operation with a relatively low gain, relatively constant gain throughout operating voltage range, improved noise rejection capabilities, increased speed of delay stage, and reduced output signal swing.

Abstract: An oscillator comprising an amplifier device, a capacitive divider bridge whose terminals are connected between a control electrode of the device and a reference voltage, the intermediate junction point of this bridge being connected to a principal electrode of the device, and also comprising, in parallel between the control electrode and the reference voltage, a tuning circuit having parallel branches: a first branch with an inductance in series with a variable capacitance, and, a second branch equivalent to a variable capacitance. The tuning circuit has a third branch constituted by a capacitance in parallel with the first branch, while a series inductance whose value is smaller than that of the tuning inductance is arranged between the junction point connecting the two latter branches and the junction point connecting the control electrode of the device to the second branch and to the divider bridge.

Abstract: A stable sine wave oscillator circuit comprising two pairs of cross-coupled bipolar transistors in cascode, the collector electrodes of the transistors of each pair being interconnected by way of respective capacitors. Output signals in phase quadrature may be obtained from across these two capacitors.

Abstract: The frequency of a resonant circuit in the emitter path of an output transistor is caused to vary linearly with control voltage. The control voltage is applied to a circuit that constrains the ac current through the resonant circuit to be supplied through the emitters of a two-transistor current steering circuit. The sum of the two transistor's dc emitter currents is constant while the dc current through one of the two transistors' emitters varies as the square root of the control voltage.

Abstract: A voltage controlled oscillator circuit is provided with a voltage controlled current source supplying a first current which is controlled responsive to a control voltage; and a current mirror circuit including input side circuit means and output side circuit means. The input side circuit means receives the first current from the voltage controlled current source. The claimed voltage controlled oscillator circuit further includes an oscillator circuit using the output side circuit means of the current mirror circuit as current source means and having an oscillation frequency which is controlled responsive to a second current of the output side circuit means; and an output circuit obtaining an oscillation output of the oscillator circuit.

Abstract: A voltage controlled oscillator (VCO) 16 generates a periodic clock signal without the use any resistors. Therefore, the described VCO may be advantageously incorporated into devices fabricated with semiconductor processes without special resistor-base design constraints.

Abstract: A hysteresis circuit comprises a first logic section, a second logic section cascaded with the first logic section, and circuitry for controlling hysteresis threshold voltages of the hysteresis circuit. The hysteresis controlling circuitry conducts current from a source of a first supply voltage to the output lead of the first logic section during a low-to-high transition of an input voltage on an input terminal of the hysteresis circuit. The hysteresis controlling circuitry conducts current from the output lead of the first logic section to a source of a second supply voltage during a high-to-low transition of the input voltage on the input terminal of the hysteresis circuit. A clock generator integrated circuit chip employing the hysteresis circuit in a voltage controlled oscillator can generate squarewave signals of 150 MHz onto a plurality of output terminals when powered from approximately 3.3 volts throughout a 0 to 70 degree Celsius temperature range, a clock skew of less than 0.

Abstract: In a ring oscillator type VCO in which plural stages of inverter circuits are cascade-connected to each other so as to constitute a positive feedback loop, delay amounts for both a rising edge and a falling edge of an output signal from the inverter circuit are controlled to have the same delay amount by way of a control signal. These delay amounts of the rising edge and the falling edge are controllable in such a manner that the duty ratio of an oscillator output signal is not varied. Each stage of the inverter circuit is arranged by three-stage inverters made of load transistors and driver transistors, and the control voltage is applied to the load transistors of the two adjoining inverters among the three-stage inverters.

Abstract: A current controlled oscillator includes an optocoupler driven by a control current; a diode bridge comprising four high speed diodes where the polarized input receives signals from an output transistor of the optocoupler; a resistor connected between the transistor output of the optocoupler and the polarized input of the diode bridge; an inverting Schmitt trigger having well defined low and high thresholds where the inverting input and an output are connected to a non-polarized input of the diode bridge; a timing resistor connected between the input and output of the Schmitt trigger; a timing capacitor connected between the negative input and ground of the Schmitt trigger; a pair of voltage references establishing the low and high thresholds of the inverting Schmitt trigger.

Abstract: A programmable crystal oscillator that generates a wide range of possible frequencies with high stability is disclosed. The programmable crystal clock oscillator includes an industry standard oscillator package, a programmable storage, a crystal and a phase lock loop (PLL) circuit coupled to the crystal and the programmable storage. The industry standard package does not contain any dedicated programming connections. A programmable storage, contained within the package, stores parameters representing a desired output frequency for the crystal oscillator. The crystal is enclosed within the package and provides a source frequency. The PLL circuit, also enclosed in the package, receives the source frequency, and produces the desired output frequency, within the wide range of possible frequencies, based on the parameters.

Abstract: An integrated circuit has a self-contained voltage control oscillation circuit wherein the oscillating frequency is controlled according to a control voltage; The circuit includes a first oscillation circuit which forms a first oscillation loop including a first amplifier for generating a first output signal with an oscillating frequency which is controlled according to an operating current of the first amplifier and a second oscillation circuit which forms a second oscillation loop including a second amplifer for generating a second output signal with an oscillating frequency which is controlled according to an operating current of the second amplifer; A circuit for generating a control voltage controls the operating currents of the first and second amplifers and a current regulating circuit for generating an operating current regulating signal regulates the operating currents of the first and second amplifers.