Step-frequency Change (e.g., Band Selection, Frequency-shift Keying) Patents (Class 331/179)
  • Patent number: 9722536
    Abstract: Low noise switchable varactors and digital controlled oscillator (DCO) circuitry are presented for creating alternating signals at controlled frequencies, including a first transistor for selectively coupling two capacitors between varactor output nodes when a control signal is in a first state, second and third transistors for selectively coupling first and second internal nodes between the respective capacitors and the first transistor with a third internal node when the control signal is in the first state, and an inverter disconnected from the first and second internal nodes to mitigate phase noise and operable to control the voltage of the third internal node according to the control signal.
    Type: Grant
    Filed: October 20, 2014
    Date of Patent: August 1, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Gireesh Rajendran, Rakesh Kumar, Subhashish Mukherjee, Ashish Lachhwani
  • Patent number: 9619848
    Abstract: Techniques to determine settings for an electrical distribution network are described. Some embodiments are particularly directed to techniques to determine settings for an electrical distribution network using power flow heuristics. In one embodiment, for example, an apparatus may comprise a model reception component, a forecast component, and an optimization component. The model reception component may be operative to receive a model of an electrical distribution network having multiple capacitor banks and multiple voltage regulators, each of the multiple capacitor banks represented in the model by a model capacitor bank, each of the multiple voltage regulators represented in the model by a model voltage regulator, the electrical distribution network having a radial layout in which power flows from a source to multiple nodes in which each node is associated with one voltage regulator. The forecast reception component may be operative to receive a forecast for demand on the electrical distribution network.
    Type: Grant
    Filed: May 6, 2014
    Date of Patent: April 11, 2017
    Assignee: SAS Institute Inc.
    Inventors: Arnulfo D. de Castro, Glenn Lampley, Xinmin Wu, Greg Link
  • Patent number: 9467092
    Abstract: A phased locked loop (PLL) incorporates multiple voltage controlled oscillators including one that operates in a lower frequency range than an operational VCO used by the PLL. A VCO selection circuit allows the system to select from one or more alternate VCOs. A ring oscillator VCO may be used as the alternate VCO for a PLL that uses a LC VCO for the operational VCO. While the ring oscillator VCO provides lower performance, the ring oscillator VCO allows the system with the PLL to be run at a lower speed for testing, debugging or characterization.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: October 11, 2016
    Assignee: International Business Machines Corporation
    Inventors: Daniel M. Dreps, David M. Friend, Grant P. Kesselring, James D. Strom
  • Patent number: 9466263
    Abstract: Methods of operating a display driver integrated circuit (IC) are provided. A method of operating a display driver IC may include generating a first clock signal, and calculating a frequency of the first clock signal using a second clock signal. Moreover, the method may include generating an adjustment signal using the frequency of the first clock signal and a target frequency, and adjusting the frequency of the first clock signal using the adjustment signal. Related display driver ICs and portable electronic devices are also provided.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: October 11, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong Kon Bae, Won Sik Kang, Yang Hyo Kim, Jae Hyuck Woo
  • Patent number: 9024692
    Abstract: A method, an apparatus, and a computer program product are provided. The apparatus tunes a frequency provided by a VCO. The apparatus determines a relative capacitance change associated with a first frequency and a desired frequency from a look-up table. The apparatus adjusts a capacitor circuit in the VCO based on the determined relative capacitance change determined from the look-up table in order to tune from the first frequency to the desired frequency. The apparatus determines that the frequency provided by the VCO is a second frequency different than the desired frequency after adjusting the capacitor circuit. The apparatus performs an iterative search to further adjust the capacitor circuit when a difference between the second frequency and the desired frequency is greater than a threshold.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: May 5, 2015
    Assignee: Qualcomm Incorporated
    Inventors: Ngar Loong Alan Chan, Jeongsik Yang, Sang-Oh Lee
  • Patent number: 9019020
    Abstract: A digitally-controlled oscillator includes a base frequency generator having an odd number of base inverters connected end-to-end to generate an output signal that oscillates at a predetermined frequency and a frequency-adjusting unit connected to the base frequency generator. The frequency-adjusting unit includes a first string of switchable inverters connected in series with each other, the switchable inverters having sizes that decrease from an input end of the first string to the output end of the first string.
    Type: Grant
    Filed: April 30, 2013
    Date of Patent: April 28, 2015
    Assignee: International Business Machines Corporation
    Inventors: David T. Hui, Xiaobin Yuan
  • Patent number: 8981854
    Abstract: A clock distributor includes a first oscillator and a second oscillator, to each of which a signal controlling an oscillation frequency is input and to one of which a clock is input; a wiring portion that connects the first oscillator and the second oscillator; a first conversion element that converts an output from the first oscillator into electric current, and outputs a result to a first connection portion connecting to the wiring portion; a second conversion element that converts voltage of the first connection portion into electric current, and outputs a result to the first oscillator; a third conversion element that converts an output from the second oscillator into electric current, and outputs a result to a second connection portion connecting to the wiring portion; and a fourth conversion element that converts voltage of the second connection portion into electric current, and outputs a result to the second oscillator.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventors: Yasumoto Tomita, Hirotaka Tamura
  • Patent number: 8963750
    Abstract: There is described a time-to-digital conversion scheme using an arrangement of delay elements based Time-to-Digital Converter, TDC (20), wherein dithering is built in the digital domain and introduced in the analog domain as a modulation of a supply voltage (TDC-supply) supplying delay elements of the TDC, each having a propagation delay which exhibits a dependency to their supply voltage.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: February 24, 2015
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: David Canard, Julien Delorme
  • Patent number: 8963648
    Abstract: Apparatus and methods are also disclosed related to an oscillator that includes a switching network configured to tune a resonant frequency of a resonant circuit. One such apparatus includes a switching network having a circuit element, such as a capacitor, that can be selectively coupled to the resonant circuit by a switch, such as a field effect transistor. For instance, the switch can electrically couple to circuit element to the resonant circuit when on and not electrically couple the circuit element to the resonant circuit when off. An active circuit can assert a high impedance on an intermediate node between the switch and the circuit element when the switch is off.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: February 24, 2015
    Assignee: Analog Devices, Inc.
    Inventor: Hyman Shanan
  • Patent number: 8952759
    Abstract: A circuit for controlling a mixed mode controlled oscillator. The circuit comprises a charge pump, and a digital loop filter. The charge pump is coupled to the mixed mode controlled oscillator. The charge pump receives an up/down signal and sends a current signal to the mixed mode controlled oscillator. The digital loop filter receives the up/down signal and generates a digital code signal to the mixed mode controlled oscillator. An output frequency of the mixed mode controlled oscillator is controlled by the current signal and the digital code signal.
    Type: Grant
    Filed: November 15, 2012
    Date of Patent: February 10, 2015
    Assignee: MediaTek Inc.
    Inventors: Ping-Ying Wang, Kuan-Hua Chao, Jeng-Horng Tsai
  • Patent number: 8912857
    Abstract: A phase locked loop system, comprises: a voltage controlled oscillator circuit, comprising a first plurality of switchable varactors for selecting a frequency band of the VCO, that has a gain that changes with frequency band, and a second plurality of switchable varactors for varying the gain in the selected band. The PLL system has a PLL feedback circuit comprising a switching device for switching the feedback circuit to an open loop state wherein a plurality of predefined tuning voltages can be applied to the VCO; a frequency measurement device for measuring the synthesized VCO frequency; and a control unit operable to determine the gain with respect to the synthesized frequency and the tuning voltages.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: December 16, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Hugues Beaulaton, Thierry Cassagnes, St├ęphane Colomines, Didier Salle
  • Patent number: 8902007
    Abstract: A clock distributor includes unit circuit parts each including an oscillator, a first element configured to convert output voltage of the oscillator into a current, a second element having a voltage current conversion characteristic of an opposite phase to that of the first element, the second element being feedback connected to the first element and the oscillator, a third element configured to convert output voltage of the oscillator into a current, a fourth element having a voltage current conversion characteristic of an opposite phase to that of the third element, the fourth element being feedback connected to the third element and the oscillator; a wiring part to connect a connection part of the first and second elements of a unit circuit part to a connection part of the third and fourth elements of another unit circuit part; and a synchronization circuit connected to the oscillator of a unit circuit part.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: December 2, 2014
    Assignee: Fujitsu Limited
    Inventors: Yasumoto Tomita, Hirotaka Tamura
  • Patent number: 8902009
    Abstract: In one embodiment, an apparatus includes a first circuit of a digitally controlled oscillator (DCO). The first circuit has a loss component. A second circuit is coupled to the first circuit and configured to transform a positive impedance into a negative impedance in series with a negative resistance. The negative impedance includes an adjustable reactive component used to adjust a frequency of an output signal of the DCO. An equivalent reactance seen by the first circuit is less than a reactance of the adjustable reactive component.
    Type: Grant
    Filed: October 26, 2012
    Date of Patent: December 2, 2014
    Assignee: Marvell International Ltd.
    Inventors: Fernando De Bernardinis, Luca Fanori, Antonio Liscidini
  • Patent number: 8890625
    Abstract: A frequency synthesizer for a WLAN transceiver is disclosed that may be used to generate 5.4 GHz and 2.4 GHz signals. The frequency synthesizer may be configured to minimize VCO pulling by using VCO operating frequencies that are not integer multiples of the RF bands. Further, the frequency synthesizer may be configured to minimize interference with other frequency bands used by existing wireless systems.
    Type: Grant
    Filed: January 3, 2013
    Date of Patent: November 18, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Richard Chang, Tomas O'Sullivan, Cristian Marcu, Brian Kaczynski
  • Patent number: 8831144
    Abstract: In an FSK receiver according to the present invention, a correction operation for a DC offset component is performed based on a maximum value and a minimum value of a demodulation signal. If a difference between the maximum and minimum values is less than a predetermined threshold value TH1, the correction operation is halted. Thus, the FSK receiver can rapidly perform an appropriate offset removal from a multi-level FSK signal.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: September 9, 2014
    Assignee: Icom Incorporated
    Inventor: Kazunori Shibata
  • Patent number: 8810322
    Abstract: A wideband frequency generator has two or more oscillators for different frequency bands, disposed on the same die within a flip chip package. Coupling between inductors of the two oscillators is reduced by placing one inductor on the die and the other inductor on the package, separating the inductors by a solder bump diameter. The loosely coupled inductors allow manipulation of the LC tank circuit of one of the oscillators to increase the bandwidth of the other oscillator, and vice versa. Preventing undesirable mode of oscillation in one of the oscillators may be achieved by loading the LC tank circuit of the other oscillator with a large capacitance, such as the entire capacitance of the coarse tuning bank of the other oscillator. Preventing the undesirable mode may also be achieved by decreasing the quality factor of the other oscillator's LC tank and thereby increasing the losses in the tank circuit.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: August 19, 2014
    Assignee: Qualcomm Incorporated
    Inventors: Rajagopalan Rangarajan, Chinmaya Mishra, Maulin Bhagat, Zhang Jin
  • Patent number: 8797107
    Abstract: A voltage controlled oscillator includes a split ring resonator (SRR) configured to have meta-material characteristics fabricated on a board, and an energy compensation circuit configured to cause resonant oscillation of the SRR. The energy compensation circuit is fabricated in the form of an integrated circuit.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: August 5, 2014
    Assignees: Electronics and Telecommunications Research Institute, Soongsil University-Industry Cooperation Foundation
    Inventors: Dong-Uk Sim, Young Jun Chong, Yong Moon, Hyeon Seok Jang
  • Patent number: 8787423
    Abstract: A system and method for frequency hopping precalibrates a subset of a plurality of channels, storing the channels' associated curves in a computer readable medium. Before hopping to a new channel, decision making circuitry can access the precalibrated curves. If the destination channel has an associated curve, then the system can use the values from that curve when hopping to a new channel. If the destination channel does not have an associated precalibrated curve, then the system can identify a closely situated channel with a precalibrated curve and use an offset value to settle at the destination channel. According to another aspect of the present invention, the offsets can be updated. According to a further aspect of the invention, the updated can be done dynamically.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: July 22, 2014
    Assignee: Marvell International Ltd.
    Inventors: Randy Tsang, Chun Geik Tan, Yui Lin, Meng Long
  • Patent number: 8736393
    Abstract: A digitally controlled variable capacitance integrated electronic circuit module (100) comprises a set of basic cells in a matrix arrangement. Each basic cell itself comprises a functional block (11) which can be switched between two individual capacitance values, a control block (12), and a control junction connecting the control block and the functional block of said basic cell. The functional blocks and the control blocks are grouped into separate regions (110, 120) of the matrix arrangement, to reduce capacitive interaction between output paths and power supply paths of the module. The functional blocks can still be switched in a winding path order within the matrix arrangement. A module of the invention can be used in an oscillator capable of producing a signal at 4 GHz.
    Type: Grant
    Filed: May 3, 2010
    Date of Patent: May 27, 2014
    Assignee: ST-Ericsson SA
    Inventors: Guillaume Herault, Herve Marie
  • Patent number: 8736385
    Abstract: The embodiments described herein provide a voltage controlled oscillator (VCO). The VCO may include, but is not limited to a voltage-to-current converter configured to receive a control voltage and to convert the control voltage to a current, a current bias circuit coupled to the voltage-to-current converter and configured to receive frequency band select digital inputs and to bias the current generated by the voltage-to-current converter based upon the band select inputs, and a ring oscillator coupled to receive the biased current and to output an oscillating signal based upon the biased current.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: May 27, 2014
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Sreenivasa Chalamala, Dieter Hartung
  • Patent number: 8723612
    Abstract: A semiconductor trimming circuit includes parallel coupled PMOS devices coupled in parallel with parallel coupled NMOS devices and an additional pair of dummy NMOS devices. The dummy NMOS devices are coupled in parallel with the NMOS devices. A trimming circuit for an internal clock source may be formed with an array of such switches for selecting one or more trimming capacitors of the trimming circuit. Such an array has a low leakage current and permits good trimming linearity.
    Type: Grant
    Filed: September 9, 2012
    Date of Patent: May 13, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Xiuqiang Xu, Jie Jin, Yizhong Zhang
  • Patent number: 8698565
    Abstract: A method and apparatus is disclosed for voltage-controlled oscillator selection in a multi-mode system having multiple voltage-controlled oscillators. Part of oscillator selection is a calibration operation that utilizes maximum and minimum capacitance limits for a voltage-controlled oscillator, which translates to a frequency range, to calculate overlap regions. Overlap regions comprise frequency ranges that overlap such that the overlap region may be generated by two voltage-controlled oscillators with adjacent frequency ranges. One voltage-controlled oscillator selection routine comprises a real time voltage-controlled oscillator calibration and selection routine that executes every time the system requests a new frequency. Another selection routine comprises a start-up routine that executes only at power up or periodically.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: April 15, 2014
    Assignee: Skyworks Solutions, Inc.
    Inventors: Thomas Obkircher, Bipul Agarwal, Georgi Taskov
  • Patent number: 8674771
    Abstract: A local oscillation generator (LO-GEN) maintains a fixed bandwidth using a voltage controlled oscillator (VCO) calibration module and gain calibration module that together compensate for variations in the VCO gain based on the oscillation frequency. During an open loop calibration of the LO-GEN, the VCO calibration module programs the VCO gain to an initial coarse value based on the oscillation frequency and then the gain calibration module adjusts the charge pump current to compensate for VCO gain changes.
    Type: Grant
    Filed: April 22, 2010
    Date of Patent: March 18, 2014
    Assignee: Broadcom Corporation
    Inventor: Hooman Darabi
  • Patent number: 8674777
    Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: March 18, 2014
    Assignee: Marvell International Ltd.
    Inventors: Robert Mack, Timothy Chen
  • Patent number: 8669820
    Abstract: An oscillator circuit includes a clock oscillator which outputs a main clock signal having an oscillating frequency switched between a high frequency and a low frequency in response to a frequency selection signal, and a frequency divider circuit which outputs a sub-clock signal having a divided frequency equivalent to a frequency division ratio of the oscillating frequency of the main clock signal, the frequency division ratio being switched in response to the frequency selection signal. The divided frequency of the sub-clock signal is predetermined for each of the high frequency and the low frequency to which the oscillating frequency is switched in response to the frequency selection signal.
    Type: Grant
    Filed: January 5, 2012
    Date of Patent: March 11, 2014
    Assignee: Mitsumi Electric Co., Ltd.
    Inventors: Makio Abe, Fumihiro Inoue, Junichi Kimura
  • Patent number: 8669824
    Abstract: An oscillation circuit includes a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other, an amplifier circuit (an inverting amplifier circuit) having an input terminal and an output terminal, and a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the MEMS vibrator and the output terminal to each other to thereby connect the one of the MEMS vibrators and the amplifier circuit (the inverting amplifier circuit) to each other.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Patent number: 8648663
    Abstract: An oscillator includes: a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other; an amplifier circuit having an input terminal and an output terminal; a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the one of the MEMS vibrators and the output terminal to each other; a signal reception terminal adapted to receive a switching signal used to switch a state of the connection circuit; and a switching circuit adapted to make the connection circuit switch the MEMS vibrator to be connected to the amplifier circuit based on the switching signal, wherein the MEMS vibrators are housed in an inside of a cavity, and the signal reception terminal is disposed outside the cavity.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: February 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Patent number: 8629728
    Abstract: A voltage-controlled oscillator (VCO) control circuit, used for controlling a VCO to process phase locking procedure after receiving a frequency locking signal, comprises an operating frequency controller and a judgment unit. The operating frequency controller, coupled to the VCO and the judgment unit, generates one of a first control code and a second control code to the VCO. The judgment unit, coupled to an input end of the VCO, generates a phase locking signal according to a voltage control signal inputted to the VCO. When the operating frequency controller receives the frequency locking signal, the operating frequency controller generates a first control code to control the VCO to switch from a first candidate VCO curve to a second candidate VCO curve. When the operating frequency controller receives the phase locking signal, the operating frequency controller generates a second control code to control the VCO to switch from the second candidate VCO curve to the first candidate VCO curve.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: January 14, 2014
    Assignee: MStar Semiconductor, Inc.
    Inventors: Yao-Chi Wang, Ming-Yu Hsieh, Shih-Chieh Yen
  • Patent number: 8598958
    Abstract: An apparatus comprising a transconductance control circuit, a boost control circuit, a current computation circuit and an oscillator circuit. The transconductance control circuit may be configured to generate a current control signal in response to (i) a voltage control signal and (ii) a plurality of range control signals. The boost control circuit may be configured to generate a current boost signal in response to a reference current signal and an enable signal. The current computation circuit may be configured to generate a first control signal and a second control signal in response to the current boost signal and the current control signal. The oscillator circuit may be configured to generate an output signal oscillating at a particular frequency in response to the first control signal and the second control signal.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: December 3, 2013
    Assignee: Ambarella, Inc.
    Inventor: Reading Maley
  • Patent number: 8593227
    Abstract: A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: November 26, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Zhi Zhu, Xiaohua Kong, Nam Van Dang, Cheng Zhong
  • Patent number: 8593232
    Abstract: An oscillating device is provided that has several oscillators. Each oscillator has a capacitive inductive resonant circuit and a flow-through conduction circuit having a negative flow-through conduction. The inductive elements of the oscillators are mutually coupled. Each oscillator also has short-circuit or not short-circuit the capacitive element of the oscillator. The oscillating device also has a controllable commutating means arranged to activate one oscillator at a time.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: November 26, 2013
    Assignee: ST-Ericsson SA
    Inventor: Emmanuel Chataigner
  • Patent number: 8531245
    Abstract: A method and apparatus for compensating for temperature variation in a phase locked loop (PLL) includes receiving an error signal by a controller in which the error signal representative of an instantaneous frequency difference between a reference frequency signal and an output frequency signal of a voltage controlled oscillator of the PLL, and determining when a voltage of the error signal is outside of a predetermined voltage range. When the voltage is outside the predetermined voltage range, the method includes generating a new digital compensation signal based upon a previous digital compensation signal, and converting the new digital compensation signal to be an analog compensation signal. The method further includes filtering the analog compensation signal by a filter to produce a filtered analog compensation signal, and adjusting the output frequency of the voltage controlled oscillator in accordance with the filtered analog compensation signal.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: September 10, 2013
    Assignee: ST-Ericsson SA
    Inventors: Cyril Joubert, Sebastien Rieubon
  • Patent number: 8531249
    Abstract: An oscillator is provided and includes a resistance unit, a capacitance unit, a first inverter and a second inverter. The resistance unit is serially connected between a first reference point and a second reference point. The capacitance unit is coupled between the first reference point and an output point, and includes capacitors. One terminal of each of the capacitors is coupled to the output point, and the other terminal of each of the capacitors is coupled to the first reference point or a reference ground according to a control signal. The input terminal of the first inverter is coupled to the first reference point, and the output terminal of the first inverter is coupled to the second reference point. The input terminal of the second inverter is coupled to the output terminal of the first inverter, and the output terminal of the second inverter is coupled to the output point.
    Type: Grant
    Filed: December 16, 2011
    Date of Patent: September 10, 2013
    Assignee: ISSC Technologies Corp.
    Inventor: Yi-Lung Chen
  • Patent number: 8519801
    Abstract: A digitally controlled oscillator is provided. The digitally controlled oscillator includes a pair of transistors cross-coupled to each other, a switched capacitor array coupled to the pair of transistors and a plurality of frequency tracking units coupled to the pair of transistors. The pair of transistors provides an output signal. The switched capacitor array tunes a frequency of the output signal. The frequency tracking units tune the frequency of the output signal to a target frequency. At least one of the frequency tracking units is capable of selectively providing a first capacitance and a second capacitance. A tuning resolution of the frequency tracking unit is determined by a difference between the first and second capacitances.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: August 27, 2013
    Assignee: Mediatek Singapore Pte. Ltd.
    Inventors: Yen-Horng Chen, Wen-Chang Lee, Augusto Marques, Xiaochuan Guo
  • Patent number: 8508308
    Abstract: Described embodiments provide a method of calibrating, by a calibration engine, a phase-locked loop (PLL) having one or more adjustable oscillators. The method includes entering a calibration mode of the PLL. The PLL is set to an initial state, thereby selecting one of the adjustable oscillators for calibration, an initial threshold window, and an initial tuning band of the selected adjustable oscillator. If the control signal of the selected adjustable oscillator is not within the initial threshold window, the calibration engine iteratively adjusts at least one of: (i) the selected tuning band of the selected adjustable oscillator, (ii) the selected adjustable oscillator, and (iii) the selected threshold window until the control signal of the selected adjustable oscillator is within the adjusted threshold window. If the control signal is within the threshold window, the one or more calibration settings of the PLL are stored and used to set the PLL operation.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: August 13, 2013
    Assignee: LSI Corporation
    Inventors: Yikui Jen Dong, Freeman Y. Zhong, Tai Jing, Chaitanya Palusa
  • Patent number: 8503503
    Abstract: A system and method for frequency hopping precalibrates a subset of a plurality of channels, storing the channels' associated curves in a computer readable medium. Before hopping to a new channel, decision making circuitry can access the precalibrated curves. If the destination channel has an associated curve, then the system can use the values from that curve when hopping to a new channel. If the destination channel does not have an associated precalibrated curve, then the system can identify a closely situated channel with a precalibrated curve and use an offset value to settle at the destination channel. According to another aspect of the present invention, the offsets can be updated. According to a further aspect of the invention, the updated can be done dynamically.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: August 6, 2013
    Assignee: Marvell International Ltd.
    Inventors: Randy Tsang, Chun Geik Tan, Yui Lin, Meng Long
  • Patent number: 8462885
    Abstract: A voltage-controlled oscillator generates a first signal and a second signal having a phase reverse to that of the first signal. A switch supplies a current signal generated by a first charge pump to a loop filter. A counter counts a cycle number of the second signal included in one cycle period of a reference signal. A second charge pump supplies, to the loop filter, a first current signal having a constant value and a second current signal having a constant value whose polarity is reverse to that of the first current signal. The control circuit controls the switch and the second charge pump based on a comparison between the cycle number of the second signal counted by the counter and a value X.
    Type: Grant
    Filed: February 28, 2011
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yuka Kobayashi
  • Patent number: 8436686
    Abstract: Apparatus for efficient time slicing including a phase lock loop circuit having a voltage controlled oscillator, an auto-frequency calibration circuit coupled with the phase lock loop circuit configured to output a value to select a range of the voltage controlled oscillator, and a burst mode detector connected with the auto-frequency calibration circuit. The burst mode detector having a register adapted to store the output of the auto-frequency calibration circuit.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: May 7, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Feng Wei Kuo, Ying-Ta Lu, Chewn-Pu Jou
  • Patent number: 8432232
    Abstract: A MEMS device includes a substrate, a cavity formed above the substrate, a first vibrator contained in the cavity, and a second vibrator contained in the cavity and having a natural frequency different from that of the first vibrator. The first vibrator and the second vibrator are preferably arranged along a long side of the cavity having a rectangular shape in plan view.
    Type: Grant
    Filed: March 11, 2011
    Date of Patent: April 30, 2013
    Assignee: Seiko Epson Corporation
    Inventor: Shogo Inaba
  • Patent number: 8421542
    Abstract: Aspects of the disclosure provide a phase-locked loop (PLL). The PLL includes a voltage-controlled oscillator (VCO), a detector module, and a ramp module. The VCO has a first capacitor unit and a second capacitor unit. The VCO is configured to generate an oscillating signal having a frequency based on a first capacitance of the first capacitor unit and a second capacitance of the second capacitor unit. The detector module is configured to generate a voltage signal as a function of the oscillating signal and a reference signal. The voltage signal is used to control the first capacitor unit to stabilize the frequency of the oscillating signal. The ramp module is configured to generate a ramp signal based on the voltage signal. The ramp signal is used to control the second capacitor unit to ramp the second capacitance from a first value to a second value.
    Type: Grant
    Filed: May 10, 2011
    Date of Patent: April 16, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Luca Romano, Randy Tsang
  • Publication number: 20130088303
    Abstract: An apparatus, and an associated method, for synthesizing a discrete-valued oscillating signal. Input parameters are provided that are determinative of the frequency, gain, and phase characteristics of the resultant, oscillating signal. The discrete-valued, oscillating signal is combinable with another signal to form a mixed signal of a desired frequency, gain, and phase characteristic using a single complex multiplication operation.
    Type: Application
    Filed: October 5, 2011
    Publication date: April 11, 2013
    Applicant: RESEARCH IN MOTION LIMITED
    Inventors: Nebu John Mathai, Stephen Arnold Devison, Oleksiy Kravets
  • Patent number: 8384488
    Abstract: This disclosure relates to an all digital phase-lock loop (ADPLL). The ADPLL determines an error generated by a digitally controlled oscillator (DCO) which is operated using a tuning word, stores information related to the error, and compensates for the error based on the stored information.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: February 26, 2013
    Assignee: Intel Mobile Communications GmbH
    Inventor: Stefan Mendel
  • Patent number: 8368479
    Abstract: A VCO device is described that has pre-compensation. Digitally switchable compensation capacitors are selectively activated to adjust operation of the VCO to mitigate undesirable operational effects. In some example embodiments, the digitally switchable compensation capacitors of the VCO are adjusted to compensate for the effects of activating (from a quiescent state) an output buffer driven by the VCO.
    Type: Grant
    Filed: April 30, 2009
    Date of Patent: February 5, 2013
    Assignee: Infineon Technologies AG
    Inventors: Christian Grewing, Stefan van Waasen, Anders Emericks
  • Patent number: 8368477
    Abstract: A receiver is provided. The receiver includes a differential amplifier amplifying differential input signals input to input terminals and outputting differential output signals through output terminals and an oscillator connected to the output terminals of the differential amplifier. The differential amplifier and the oscillator operate alternatively in response to an enable signal.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Hyun Won Moon, Hwa Yeal Yu
  • Patent number: 8362843
    Abstract: A fast settling frequency synthesizer is disclosed. The particular capacitor to frequency relationship in the band of operation is first determined. The calculation can be performed by determining the capacitor to frequency relationship at two points and calculating the slope. Once these parameters are known, then, for any change in frequency due to a channel hop, the appropriate capacitor value can be determined.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: January 29, 2013
    Assignee: QUALCOMM Incorporated
    Inventor: Brian Kaczynski
  • Patent number: 8362809
    Abstract: The invention provides a dual-mode voltage-controlled oscillator (DMVCO), a frequency synthesizer and a wireless receiving device, and pertains to the technical field of integrated circuit of radio frequency wireless receiver. The DMVCO and the frequency synthesizer can operate in a wideband mode and a quadrature mode. When operating in the quadrature mode, a quadrature signal is provided for a Single Sideband Mixer of the frequency synthesizer by a quadrature coupling of a first voltage-controlled oscillator unit and a second voltage-controlled oscillator unit in the DMVCO in the overlapped frequency band so that the frequency synthesizer can cover a higher output frequency band. Therefore, the tuning range of the DMVCO of the invention is wide, and the frequency synthesizer using the DMVCO is low in power consumption, simple in structure and has good frequency spur performance.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: January 29, 2013
    Assignee: Fudan University
    Inventors: Wei Li, Jin Zhou
  • Patent number: 8344811
    Abstract: In a dual-hand capable voltage-controlled oscillator (VCO) device at least two voltage-controlled oscillator units (VCO1, VCO2) are coupled via a reactive component (A) and each said at least one voltage-controlled oscillator unit (VCO1, VCO2) further being connected to at least a respective external switching device (B1, B2) adapted to control an operating frequency of the (VCO) device.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: January 1, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Mingquan Bao
  • Patent number: 8319564
    Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Altera Corporation
    Inventors: Weiqi Ding, Sergey Shumarayev, Wilson Wong, Ali Atesoglu, Sharat Babu Ippili
  • Patent number: 8305152
    Abstract: An oscillator includes: a plurality of MEMS vibrators formed on a substrate; and an oscillator configuration circuit connected to the plurality of MEMS vibrators, wherein the plurality of MEMS vibrators each have a beam structure, and the respective beam structures are different, whereby their resonant frequencies are different.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: November 6, 2012
    Assignee: Seiko Epson Corporation
    Inventors: Toru Watanabe, Shogo Inaba, Ryuji Kihara
  • Patent number: 8299862
    Abstract: In one embodiment, an apparatus includes a first circuit of a digitally controlled oscillator (DCO). The first circuit has a loss component. A second circuit is coupled to the first circuit and configured to transform a positive impedance into a negative impedance in series with a negative resistance. The negative impedance includes an adjustable reactive component used to adjust a frequency of an output signal of the DCO. An equivalent reactance seen by the first circuit is less than a reactance of the adjustable reactive component.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: October 30, 2012
    Assignee: Marvell International Ltd.
    Inventors: Fernando De Bernardinis, Luca Fanori, Antonio Liscidini