Abstract: A method for self testing a multiband voltage controlled oscillator (VCO) is described. A first frequency band in a VCO is selected. An N value is selected for a frequency divider that produces a tuning voltage for the VCO that is between a low tuning voltage limit and a high tuning voltage limit for the VCO. The N value is adjusted in one direction until the tuning voltage reaches one of the tuning voltage limits. This N value at the tuning voltage is a first limit value. The frequency bands are switched from the first frequency band to a second frequency band that is adjacent to the first frequency band.

Abstract: There is provided a voltage controlled ring oscillator having a plurality of ring-connected amplifiers (401), and a plurality of variable capacitance elements (502a, 502b) being respectively connected to the plurality of amplifiers and having capacitances varied by a voltage control. A plurality of load resistors (402) and a plurality of tail current sources (403) are respectively connected to the plurality of amplifiers.

Abstract: An oscillator including a resonator with at least one first tuneable element, with which a resonant frequency of the resonator can be varied. The oscillator further includes an amplifier, which provides an amplification element, connected to the resonator at a coupling position. The amplifier provides a second tuneable element, by which a complex resistance, which the amplifier provides at the coupling position, is variable in a frequency-dependent manner.

Abstract: Various apparatuses and methods for a low phase noise frequency synthesizer are disclosed herein. For example, some embodiments provide an oscillator that may be used in a low phase noise frequency synthesizer. The oscillator includes a tank circuit, a plurality of cross-coupled transistor pairs connected to the tank circuit, a current source connected to the plurality of cross-coupled transistor pairs, and at least one switch connected to the plurality of cross-coupled transistor pairs. The switch is adapted to activate a subset of the plurality of cross-coupled transistor pairs and to deactivate another subset of the plurality of cross-coupled transistor pairs to operate the tank circuit in the oscillator using the activated subset of the plurality of cross-coupled transistor pairs.

Abstract: A PLL receives an indicator indicating that it is to operate at a different operating frequency than a current operating frequency. A control word is selected from a set of linear control words based upon the different operating frequency. A capacitance of a variable capacitor of a voltage-controlled oscillator is adjusted based upon the control word. The variable capacitor is monotonic and non-linear relative to the set of linear control words.

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference, with multiple operating modes, such power conservation, clock, reference, and pulsed modes. The various apparatus embodiments include a resonator adapted to provide a first signal having a resonant frequency; an amplifier; a temperature compensator adapted to modify the resonant frequency in response to temperature; and a process variation compensator adapted to modify the resonant frequency in response to fabrication process variation. In addition, the various embodiments may also include a frequency divider adapted to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies substantially equal to or lower than the resonant frequency; and a frequency selector adapted to provide an output signal from the plurality of second signals.

Abstract: In one example, a method of tuning an oscillator of a phase-locked loop (PLL) circuit includes adjusting a coarse control signal to select one of a plurality of frequency tuning curves of the oscillator. The method includes adjusting a fine control signal to select a position on the selected frequency tuning curve. A frequency of the oscillator is determined by the coarse control signal and the fine control signal. The method includes attempting to detect a lock between a feedback signal and a reference signal. A frequency of the feedback signal is determined by the frequency of the oscillator. The method includes comparing the fine control signal to a reference value if the lock is detected. The method includes adjusting the coarse control signal to select a different one of the frequency tuning curves if the selected position on the selected frequency tuning curve is outside a desired tuning range.

Abstract: A voltage-controlled oscillator operates at high frequency without high gain by dividing the frequency range into a plurality of subranges, which preferably are substantially equal in size. Within any subrange, the full extent of variation in the control signal changes the frequency only by the extent of the subrange. The gain is thus substantially equal to the gain one would expect for the full frequency range, divided by the number of subranges. The subrange may be selected manually, or by an initial calibration process. In one embodiment, the oscillator includes a voltage-to-current converter and a current-controlled oscillator, with a current mirror arrangement. In that embodiment, selection of the subrange may be controlled by turning on the correct number of current legs.

Abstract: Embodiments of a phase lock loop and a method for compensating a temperature thereof can output an initial tuning digital value for a voltage controlled oscillator configured to output a desired phase lock loop frequency compensated according to a temperature change. Embodiments of a phase lock loop and a method for compensating a temperature thereof can simultaneously perform a digital coarse tuning and an analog fine tuning to compensate for a temperature in a limited time.

Abstract: A phase lock loop (PLL) circuit is provided. A voltage controlled oscillator (VCO) generates an output clock signal based on a control voltage. A controller provides a first digital control word, a second digital control word and a loop factor. A frequency modifier is coupled to the output clock signal, controlled by the controller to divide the output clock signal by the loop factor to generate a feedback frequency. A charge pump is controlled by the up signal and down signal to generate a charge pump current, comprising a first digital to analog converter (DAC) to generate a first current based on the first digital control word when the up signal is asserted. A second DAC generates a second current based on a second digital control word when the down signal is asserted. The controller defines a first relationship between the first digital control word and the loop factor, and the controller defines a second relationship between the second digital control word and the loop factor.

Abstract: The invention discloses a programmable voltage-controlled oscillator. The programmable voltage-controlled oscillator has an output frequency. The programmable voltage-controlled oscillator includes a control unit, a current selector, a current mirror unit, an oscillator module, and a one-time-programming component. The one-time-programming component is used for providing a programmable code. The current selector is used for generating a selected current according to the programmable code. The current mirror unit is used for generating a first mirroring current and a second mirroring current according to the selected current. The oscillator module is used for oscillating according to the first mirroring current and the second mirroring current. After the programmable code is tuned to drive the output frequency to approach a predetermined frequency, the control unit will burn the tuned programmable code into one-time-programming component.

Abstract: A phase-locked loop that supports a large frequency drift capability, yet maintains a low Kvco, and does not introduce noise or discontinuities in the frequency of the generated phase-locked loop output signal. The phase-locked loop may include a VCO with an LC tank circuit, the capacitance of which may be adjusted in incremental units. By gradually adjusting a control signal applied to a selected VCO LC tank circuit frequency adjustment control line, e.g., in a continuous ramped function, or time-averaged ramped function, from LOW-to-HIGH or from HIGH-to-LOW, over a period of time that is greater than the response time of the phase-locked loop, a frequency range supported by the VCO may be shifted to either a higher frequency range or a lower frequency range, as needed, to accommodate environmentally induced frequency drift in the VCO, without introducing noise or discontinuities in the frequency of the generated phase-locked loop output signal.

Abstract: The present invention is a self-calibrating, dual-band, wide range LC tank Voltage Controlled Oscillator (VCO) system. The system may include a first Voltage-Controlled Oscillator (VCO) and a second Voltage-Controlled Oscillator (VCO). The system may further include a calibration engine. The calibration engine may be configured for being connectable to at least one of the first VCO or the second VCO. The calibration engine may further be configured for automatically establishing/providing a VCO fix capacitor band code setting and a gear control setting for selectively activating or inactivating the first VCO and/or the second VCO. The calibration engine may be further configured for automatically comparing a VCO control voltage of the system to an allowable control voltage range for the system and may be further configured for automatically adjusting the VCO fix capacitor band code setting and/or the gear control setting when the VCO control voltage falls outside of the allowable control voltage range.

Abstract: In a voltage-controlled oscillator capable of broadening a variable frequency range while suppressing increase of conversion gain, a converter (12) converts an input voltage to a first physical quantity, a variable converter (13) supplies a second physical quantity that accords with the status of each switch of a switch group (13a). another variable converter (14), when the input voltage is contained within a prescribed voltage range, supplies a third physical quantity that accords with the input voltage and the status of each switch of another switch group (14a), and a variable-frequency oscillator (15) supplies a signal of a frequency that accords with the first physical quantity, the second physical quantity, and the third physical quantity.

Abstract: A Gaussian Frequency Shift Keying/Frequency Shift Keying (GFSK/FSK) modulation circuit implemented in a digital manner comprises a frequency divider for dividing frequency of an inputted clock signal to get a sampling signal, a buffer coupled to the frequency divider for storing inputted data, an integrator coupled to the buffer for processing integration according to the data outputted from the buffer, a first read only memory coupled to the integrator for transferring the data outputted from the integrator according to a cosine function, and a second read only memory coupled to the integrator for transferring the data outputted from the integrator according to a sine function.

Abstract: A broadband frequency synthesizer including a VCO for supplying a high frequency output signal, a dual mode divider circuit, a means for selecting a division mode of the divider circuit, a phase detector and a low pass filter. The divider circuit divides the frequency of the output signal by a first division facto N1 in a first mode M1or by a second factor N2 different from the first factor N1 in a second mode M2 to provide the divided frequency signal (Fdiv). The selection means selects by determined time period the first or second division mode of the divider circuit as a function of the programmed frequency of the output signal in the frequency band defined by the first and second division factors N1 and N2. If this frequency is dose to the center of the frequency band, the dual mode divider divides the output signal frequency by a third factor N3 in a first mode M1 or by a fourth division factor N4. different from N3, in a second mode M2 according to the programming of the selection means.

Abstract: Provided is a low voltage frequency synthesizer using a boosting method for a power supply voltage of a charge pump. The low voltage frequency synthesizer includes a phase/frequency detector (PFD) that receives and compares a reference frequency and a feedback frequency to output a comparison signal, a charge pump that receives the comparison signal to output a current corresponding to the comparison signal, a low-pass filter (LPF) that generates a voltage corresponding to the output current of the charge pump, a voltage controlled oscillator (VCO) that receives the voltage of the LPF, amplifies the voltage to generate a boosting voltage, and outputs a frequency corresponding to the received voltage, and a DC converter that receives the boosting voltage of the VCO, converts the boosting voltage into a DC voltage, and applies the DC voltage as a power supply voltage of the charge pump.

Abstract: A selectable local oscillator provides an output frequency signal having a selectable frequency within a desired output frequency range. The selectable local oscillator comprises first, second and third signal generators configured to provide first, second and third frequency signals having frequencies in first, second and third input frequency ranges. A first mixer provides a first mixed product signal having an upper sideband and a lower sideband. A frequency selector selects one of the upper and lower sidebands of the first mixed product signal. A second mixer provides a second mixed product signal having an upper sideband and a lower sideband. An output stage selects at least one of the upper and lower sidebands of the second mixed product signal as the output frequency signal.

Abstract: Systems and methods are disclosed herein for using a switched mode TCXO or VC-TCXO in a satellite navigation receiver where the switched mode TCXO or VC-TCXO may operate either in an active compensation mode to compensate for temperature induced frequency error or in a second fixed compensation mode where the TCXO or VC-TCXO is not compensated for temperature. The switched mode TCXO or VC-TCXO is operated in the active compensation mode when satellite acquisition performance may be improved from a reduction in the range of oscillator frequency error. The switched mode TCXO or VC-TCXO may be switched to operate in the fixed compensation mode when satellite tracking performance is sensitive to discontinuities in the phase, frequency, and/or frequency rate of the oscillator clock when temperature compensation is applied.

Abstract: Circuits and methods for automated real-time tuning of wide range frequency/delay voltage controlled oscillators (VCO) using a reset mechanism, to account for run-time variations such as power supply, temperature, reference clock frequency and input slew drift etc is described. It finds extensive applications in wide range, multi frequency band phase and delay locked loops. In one embodiment, an automated Jump-Down band switching structure and method for use in VCOs with a plurality of frequency bands is described. This involves monitoring the VCO's analog control voltage signal until it reaches a predetermined lower limit, at which time band switching to an overlapping lower frequency band is triggered by an internally generated reset signal, while simultaneously charging the analog control voltage to a limit in a pre-determined range of the lower band, to avoid phase detector malfunctions in the PLL/DLL system at lower control voltages during band switch.

Abstract: In various embodiments, the invention provides a clock generator and/or a timing and frequency reference, with multiple operating modes, such power conservation, clock, reference, and pulsed modes. The various apparatus embodiments include a resonator adapted to provide a first signal having a resonant frequency; an amplifier; a temperature compensator adapted to modify the resonant frequency in response to temperature; and a process variation compensator adapted to modify the resonant frequency in response to fabrication process variation. In addition, the various embodiments may also include a frequency divider adapted to divide the first signal having the resonant frequency into a plurality of second signals having a corresponding plurality of frequencies substantially equal to or lower than the resonant frequency; and a frequency selector adapted to provide an output signal from the plurality of second signals.

Abstract: The present invention relates to a broadband voltage controlled oscillator and a method for generating a broadband oscillation frequency; and, more particularly, to a broadband voltage controlled oscillator and a method for generating a broadband oscillation frequency capable of operating over a wide frequency band by including a weighted current cell to select two frequency band modes, generating various levels of total 64 oscillation frequencies by including a variable frequency tank and a capacitor bank, and further facilitating adjustment of the total 64 oscillation frequencies distributed over the wide frequency band by including a control signal generator for generating control signals each of which is applied to the weighted current cell, the variable frequency tank and the capacitor bank by a BDD (Binary Decision Diagram) technique.

Abstract: An oscillation device has a resonant tunneling diode formed by interposing a gain medium including a first barrier layer, a quantum well layer and a second barrier layer between a first thickness adjusting layer and a second thickness adjusting layer. The oscillation device also has a switch for switching the polarity of a bias voltage being applied to the resonant tunneling diode. The first thickness adjusting layer and the second thickness adjusting layer have different thicknesses. Thus, a single oscillation device is driven to oscillate with different oscillation frequencies.

Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.

Abstract: Described is a circuit comprising an oscillator, an amplifier unit and a control unit. The amplifier unit is coupled to the oscillator and to the control unit; and the control unit is arranged to regulate a load capacitance to the oscillator at startup.

Abstract: A voltage-controlled oscillator comprises an inductor and a group of variable capacitance elements forming a resonance circuit. The group of variable capacitance elements includes first and second variable capacitance elements connectable in parallel and having mutually different absolute values of a ratio of control-voltage sensitivity to capacitance. The first and second variable capacitance elements both have a first end supplied with a control voltage for controlling resonance frequency of the resonance circuit and have a second end selectively connected to the inductor by a band selection signal for deciding a band in which the resonance frequency exists.

Abstract: Systems and methods for distributing a clock signal are disclosed. In some embodiments, systems for distributing a clock signal include a plurality of resonant oscillators, each comprising an inductor; and a differential clock grid that distributes the clock signal. The differential clock grid is coupled to the plurality of resonant oscillators and the clock signal, and the inductances of the inductors are configured such that a resonant frequency of the plurality of resonant oscillators is substantially equal to the frequency of the clock signal.

Abstract: The present invention relates to a digitally-controlled crystal oscillator (DCXO) circuit having control circuitry, an active core, and a pair of thermometer-coded switched-capacitor circuits (TCSCCs), each of which is coupled to the active core and to a crystal. The active core, the crystal, and the pair of TCSCCs form a DCXO, which provides an output signal having an output frequency. Each TCSCC includes multiple capacitive elements, which are selected by a respective control signal from the control circuitry to control the output frequency. The DCXO circuit may be integrated into a digital integrated circuit (IC) without need for a digital-to-analog converter (DAC), and may be used with a wide range of crystal types. By using thermometer-coding, the pair of TCSCCs provides monotonic frequency tuning behavior. Further, by utilizing different types of tuning steps, the DCXO may have a wide tuning range with high resolution.

Abstract: In a high-frequency oscillator, a first resonance circuit and a second resonance circuit are respectively connected to a first amplifier circuit and a second amplifier circuit. A selection circuit includes a first switch circuit and a second switch circuit which selectively operate one of the first amplifier circuit and the second amplifier circuit. A grounded capacitor is connected to output sides of the first amplifier circuit and the second amplifier circuit. The grounded capacitor is commonly used by both the first amplifier circuit and the second amplifier circuit. An auxiliary grounded capacitor is connected between the first switch circuit and the first amplifier circuit. Accordingly, the grounded capacitor and the auxiliary grounded capacitor are connected to each other in parallel only when the first amplifier circuit is activated.

Abstract: System and method for increasing the frequency tuning range of a RF/microwave LC oscillator. A preferred embodiment comprises a voltage controlled oscillator (VCO) configured to generate an output signal at a frequency that is dependent upon a magnitude of an input voltage level and an effective inductance of an inductive load and a variable inductor coupled to the VCO. The variable inductor comprises a primary inductor coupled to the VCO to produce a magnetic field based upon a current flowing through the primary inductor and a secondary inductor magnetically coupled to the primary inductor, the secondary inductor to affect the magnitude of the effective inductance of the primary inductor.

Abstract: A frequency shift keying (FSK) demodulator includes a band-pass filter, an auto-calibration loop, a phase comparator, and an analog-to-digital converter. The band-pass filter is used for shifting phase of an FSK signal to generate a revised FSK signal. The auto-calibration loop is coupled to the band-pass filter for adjusting a center frequency of the band-pass filter. The first input end of the phase comparator is coupled to an output end of the band-pass filter, and the second input end of the phase comparator is used for receiving the FSK signal. The phase comparator is used for comparing the FSK signal with the revised FSK signal and outputting a comparison result. The analog-to-digital converter is coupled to the phase comparator for converting the results of the phase comparator into digital data. Similarly, a frequency modulation (FM) demodulator includes a band-pass filter, an auto-calibration loop, and a phase comparator.

Abstract: Tuning devices and methods are disclosed. One of the devices comprises a metal structure connected with artificial dielectric elements, and variable capacitance devices. Each variable capacitance device is connected with a respective artificial dielectric element and with a control signal. Control of the variation of the capacitance allows the desired tuning. Another device comprises metallic structures connected with artificial dielectric elements and switches connected between the artificial dielectric elements. Turning ON and OFF the switches allows the capacitance between artificial dielectric elements to be varied and a signal guided by the metallic structures to be tuned.

Abstract: A frequency tuning circuit includes a connection for coupling to a signal tap of an element which has a resonant frequency. The tuning circuit contains a controllable-capacitance capacitance array for tuning of a signal frequency of the element. The capacitance array has a multiplicity of capacitances which can be connected to a control connection via a signal. In this case, the capacitance array is coupled to the connection. A control input is used to supply a digital control word. Furthermore, the tuning circuit contains a sigma-delta modulator whose input side is coupled to the control input and whose output side is coupled to the control connection of the capacitance array. This makes it possible to produce a tuning word by means of which the effective resolution of the capacitance array can be increased.

Abstract: A method for controlling a synthesized local oscillator (SLO) includes: receiving a control input specifying a desired SLO output; receiving reference clock signal; generating a predefined set of dynamic clock signals from the reference clock signal; selecting a dynamic clock signal from the predefined set of dynamic clock signals in response to the control input; using the dynamic clock signal as an input to a direct digital synthesizer (DDS) module to generate a DDS output signal; selecting a DDS output band in response to the control input, the DDS output band including one of a baseband and an alias band; and processing the DDS output band to generate the SLO output.

Abstract: There is provided a frequency synthesizer including a multi-band voltage controlled oscillator having a plurality of voltage controlled oscillating cores outputting oscillation frequencies having different bands according to an input control voltage. Each of the voltage controlled oscillating cores outputs a frequency band divided into a plurality of bands, and the voltage controlled oscillating core operates by each of the divided bands, and one of the voltage controlled oscillating cores operates in one of the bands according to the control voltage. The frequency synthesizer further includes a comparator unit and an oscillation band-determining unit. The comparator unit compares the control voltage with a pre-set reference voltage range. The oscillation band-determining unit changes the band where the voltage controlled oscillating core operates into another one of the bands when the control voltage is out of the pre-set reference voltage range.

Abstract: In at least some embodiments, a communication system includes a receiver having a local oscillator (LO) for each of a plurality of frequency bands. Each LO is controlled by a separate phase-locked loop (PLL) that tracks carrier frequency offset (CFO) using a common phase error (CPE). The CPE is selectively weighted based on at least one inter-band frequency correlation (IFC) coefficient.

Abstract: A phase-locked loop employing a plurality of oscillator complexes is disclosed. The phase-locked loop includes a clock output and a plurality of oscillator complexes operable to generate output signals. The phase-locked loop further includes control logic which is configured to selectively couple an output signal of one of the plurality of oscillator complexes to the clock output.

Abstract: A frequency generation unit (FGU) 100 includes a plurality of selectable voltage controlled oscillators (110) whose output frequencies are chosen in relationship with a predetermined intermediate frequency (IF) and frequency divider value (M) to provide multi-band frequency generation capability in a single communication device. A programmable reference divider (104), phase detector (174) and programmable charge pump (106) take an incoming reference frequency (120) and generate a charge pump output (124) to optimize the in-band phase noise in the FGU 100. A fixed loop filter (108) filters the charge pump output (124) to generate a control voltage (126) for the selectable VCOs (110). The desired frequency band is selected and enabled using control logic (128).

Abstract: An apparatus includes phase detection circuitry that generates control signals in response to an input clock signal and a feedback clock signal. The apparatus also includes a clock signal generation circuit that includes fine and coarse capacitors. The clock signal generation circuit changes a capacitance of the capacitors that are affecting the output clock signal in response to a change in the control signals. The apparatus also includes measurement circuitry that determines a calibration number of the fine capacitors having a combined capacitance that most closely matches a capacitance of one of the coarse capacitors.

Abstract: This disclosure relates to delay cells in a ring oscillator that include sub-cells having a gain that is a function of a variable control signal and sub-cells with a gain that is set by a fixed control signal.

Abstract: A frequency synthesizer capable of using a voltage controlled oscillator (VCO) with a low value of gain Kvco, having a short automatic frequency calibration time and automatically coping with environments and a frequency calibration method are provided. The frequency synthesizer includes a reference divider, a phase detector, a main divider, a charge pump, a loop filter, a first switch, a second switch, a VCO, and an automatic frequency calibration block. The frequency calibration method includes an initialization step, an N-target algorithm step, an auxiliary search algorithm step, and a post search algorithm step.

Abstract: A phase locked loop with a current leakage adjustment function is provided. The phase locked loop includes a phase locked loop unit having a compensation voltage node, a digitalized leakage-detection circuit generating a plurality of digital control signals based upon the phase error between a reference clock signal and a feedback signal, and a compensation circuit generating a compensation current based upon the plurality of digital control signals. When there exist current leakages of the MOS capacitors, the current leakage adjustment circuits provided by the present invention may prevent the conventional phase locked loop from un-locking due to jittering.

Abstract: A multi-band electronic apparatus and method thereof is provided. The method comprises outputting a first output signal in the first band by a first voltage controlled oscillator according to a switch control signal and a control voltage, outputting a second output signal in the second band by a second voltage controlled oscillator according to the switch control signal and the control voltage, the second band being not completely overlapped by the first band, performing frequency division selectively on the first output signal or the second frequency divided signal according to the switch control signal, and outputting a first frequency divided signal, determining a phase difference between the first frequency divided signal and a reference signal to output a phase difference signal, outputting the control voltage according to the phase difference signal, and selectively driving the first or the second voltage controlled oscillators by the control voltage according to the switch control signal.

Abstract: A technique includes selecting one out of a plurality of frequency bands and providing a voltage controlled oscillator to generate a mixing signal for the selected frequency band. The technique includes adjusting a frequency gain of the voltage controlled oscillator based on the selected frequency band.

Abstract: Provided is a wireless transceiving apparatus for variability of signal processing band, in which at least one resonator of an analog processor and a VCO are simultaneously controlled using a frequency synthesizer, and a frequency of the VCO and a resonance frequency of the analog processor are controlled to have a rational number ratio, thereby capable of varying the signal processing band. The wireless transceiving apparatus includes: an analog processor having a plurality of resonators on a path of transmission/reception signals, for performing analog signal processing; a digital processor for performing digital signal processing on an output signal of the analog processor or data to be transmitted to the analog processor; and a frequency synthesizer for providing a local oscillation (LO) frequency and a controlling signal to the resonators of the analog processor so as to vary a signal processing band of the analog processor.

Abstract: Various embodiments are disclosed relating to calibration techniques for a phase-locked loop (PLL) bandwidth. According to an example embodiment, a calibration technique may include calibrating a voltage-controlled oscillator (VCO) of a phase-locked loop (PLL) circuit, and calibrating a bandwidth of the PLL circuit based on the calibrating the VCO.

Abstract: A method and a device are proposed for frequency synthesis by means of oscillator means, particularly a digitally controlled oscillator, which are capable of generating output frequencies out of a set of possible output frequencies. For the purpose of generating a desired frequency that is not included in the set of possible output frequencies, the oscillator means are driven by a control device in such a way that said oscillator means alternately generate at least two different output frequencies, out of the set of possible output frequencies, in such a way that the average value of the generated output frequencies over a time period is substantially the desired frequency.

Abstract: This disclosure describes designs for a digitally controlled oscillator (DCO). The DCO can overcome many of the shortcomings associated with conventional voltage controlled oscillators (VCOs), and may improve wireless communication devices. The described DCO may improve the frequency synthesis process, reduce noise in a wireless communication device, and allow for simplification of various components of the device.

Abstract: A method and a voltage-controlled oscillator provide an output signal with a frequency within one of a plurality of frequency bands, while reducing or eliminating temperature-induced band-switching or other drifts in operating frequency. The band-switching is reduced or eliminated by providing a circuit that adjusts a tuning sensitivity according to a calibration performed under test conditions. For example, such a voltage-controlled oscillator may include (a) a digitally controlled variable current source for providing a first control current to select one of the frequency bands for the voltage-controlled oscillator; (b) a variable transconductance circuit providing a second control current to compensate a variation in operating frequency; and (c) a control circuit for varying the frequency of the output signal in accordance with the first and second control signals.

Abstract: A clock selection circuit and synthesizer that is capable of selecting an optimum clock signal from among a plurality of clock signals in a short time. A reference-clock counter counts clock pulses in an inputted reference clock signal (REF). A clock counter counts clock pulses in one of the plurality of clock signals which is selected by a selection unit and frequency-divided by a frequency divider. An instruction-signal output unit outputs a plurality of comparison-instruction signals during an interval in which a difference occurs between the counts of two of the plurality of clock signals having the closest frequencies. A comparison unit compares the count of the reference-clock counter and the count of the clock counter. The selection unit selects a clock signal by a binary search according to the result of the comparison.