Abstract: A phase locked oscillator comprising a phase comparator, filter and voltage controlled oscillator coupled in conventional manner to form the forward path of the phase locked loop and a counter and logic circuit coupled to form the feedback path. An input pulse stream is applied to a monostable flip flop which responds to each input pulse to produce a pulse of predetermined length that is applied to one input of the phase comparator. The counter is coupled to receive the oscillator output pulses for counting repetitively to a predetermined count. The logic circuit responds to first and second counts in the predetermined count for respectively generating and terminating a reference pulse in response to each input pulse. The reference pulse is applied to the other input of the phase comparator which in turn provides an output signal indicative of the time displacement between each input pulse and its associated reference pulse to control the oscillator to run at a harmonic frequency of the input pulse stream.

Abstract: An angle modulation system comprises a voltage controlled oscillator, and at least one frequency divider for dividing the frequency of the output of the voltage controlled oscillator. A phase comparator responds to the output of the frequency divider and to a reference signal supplied from a reference signal oscillator, through another frequency divider. A frequency selection circuit is provided in the path extending from the output side of the voltage controlled oscillator, through the frequency divider, to the phase comparator. This selection circuit eliminates an undesired side band component in the output of the voltage controlled oscillator and derives a required carrier component. An adder adds an input modulation signal and the output of the phase comparator, and applies the resulting signal to the voltage controlled oscillator. From the output of the voltage controlled oscillator, an angle-modulated wave signal is derived with a large signal to noise ratio and large modulation index.

Abstract: Homodyne automatic frequency control circuitry maintains the mean or center output frequency of a controlled oscillator, e.g., the output of a voltage controlled oscillator effecting frequency modulation, equal to the output frequency of a reference oscillator. The composite AFC circuitry employs ganged sampling switches and a common mode error obviating common frequency detector (e.g., a discriminator) to alternately store voltages representative of the reference and controlled oscillator frequencies in capacitors connected to the inputs of a difference amplifier. The difference amplifier acts through an integrator to supply any necessary correction potential to the control port of the controlled oscillator when the signals stored in the two capacitors differ, signalling that the mean output frequency of the controlled oscillator has departed from that of the reference oscillator.

Abstract: A side lock detector to prevent side lock in coherent PSK demodulation. For demodulation purposes it is necessary to recreate the carrier at the receiver. This may be accomplished with a phase-locked loop. However, with plural phase PSK modulation the input signal to the phase-locked loop has energy at side bands spaced at modulation rate intervals from the desired lock frequency as well as at the desired lock frequency. To detect side band lock, a band pass filter monitors the phase detector output of the phase-locked loop. The center frequency of the filter is equal to the modulation rate and the filter band width is very narrow. Only during side lock will significant amounts of energy pass the filter. This energy may be detected by a simple diode detector or the like. A lock inhibit means is provided, responsive to the output of the detector, to drive the voltage controlled oscillator out of a side lock condition.

Abstract: A phase modulated wave that may have no carrier power is demodulated by a phase locked loop including a phase detector for deriving an A.C. data output signal having a magnitude and a phase indicative of the phase of the modulated wave. A feedback loop responsive to the data output signal restores power to the carrier frequency component to the loop. In one embodiment, the feedback loop includes a phase modulator responsive to the phase modulated wave and the data output signal. In a second embodiment, carrier frequency power is restored by differentiating the data output signal and supplying the differentiated signal to an input of a voltage controlled oscillator included in the phase locked loop. Preferably, the phase modulator is linear and includes a series inductance-capacitance network, wherein the capacitor is a voltage controlled varactor. To compensate for nonlinearities in the varactor reactance vs. voltage characteristic, the series circuit is shunted by a properly selected inductance.

Abstract: An improved homodyne receiver for use in wideband optical communications systems is disclosed. The invention provides phase-locked homodyne reception of non-suppressed carrier or suppressed carrier input signals. Novel means are provided in the receiver for generating an error signal to provide phase-locked operation in the presence of noise and frequency excursions of the received signal.

Abstract: A digital phase-locked loop in which an error signal representing the difference between the phases of an input signal and an output signal is converted to a digital signal having a time-varying value. A programmable divider means is provided to produce a pulse control signal having a frequency which varies in accordance with the time-varying value of the digital signal. The pulse control signal controls the number of pulses which are deleted from a reference clock signal to produce an intermediate signal which in turn is fed to a feedback counter for producing the output signal, the phase of which depends on the number of deleted pulses, so that the phase of the output signal effectively follows the phase of the input signal.