Abstract: Signals outputted from oscillators (1-1, 1-2, . . . 1-n) are in phase with signals as reflected by band elimination filters (3-1, 3-2, . . . 3-n) at elimination frequencies of the band elimination filters (3-1, 3-2, . . . 3-n), while they are in opposite phase with signals leaked from the corresponding band elimination filters (3-1, 3-2, . . . 3-n). In this way, a stable oscillation can be performed with the oscillation frequencies of the oscillators (1-1, 1-2, . . . 1-n) balanced as optimum frequencies between the natural frequencies of the oscillators (1-1, 1-2 , . . . 1-n) and the elimination frequencies of the band elimination filters (3-1, 3-2, . . . 3-n), while the oscillators (1-1, 1-2, . . . 1-n) can be synchronized with the elimination frequencies being used as reference frequencies.

Abstract: A PLL circuit includes a polyphase reference clock output circuit, which outputs multiple reference clocks, each clock being of different phase. The PLL circuit further includes a digital voltage controlled oscillator, which, using any one of the multiple reference clocks chosen as an operating clock, outputs an output clock whose frequency varies according to a value of a frequency control signal, and which outputs a delay amount data representing a phase difference between the phase of the output clock and an ideal phase gained by computing based on the value of the frequency control signal. The PLL circuit further includes a selection circuit which is responsive to the delay amount data to select and output the output clock synchronized with one of the multiple reference clocks.

Abstract: A resonator-synchronized oscillator for resonance mode selection is disclosed. In one embodiment, the resonator-synchronized oscillator comprises an oscillation loop, at least one capacitor switching circuit coupled to the oscillation loop, and a multi-mode resonator having an output coupled to the at least one capacitor switching circuit. The output signal of the resonator is used to synchronize the oscillator using switched capacitor structures to instantaneously reset the phase of the resonator-synchronized oscillator.

Abstract: A voltage controlled oscillator unit is provided with cross coupled voltage controlled oscillators to generate quadrature phases. One control stage adjusts coupling between the oscillators. Another control stage adjusts the tail current that applies operating bias to the oscillators and to the couplers, respectively. The cross coupling and tail current control stages are arranged so that tuning one simultaneously and oppositely tunes the other for simultaneous adjustment in opposite directions. This limits the power consumption of the oscillator unit throughout the range of frequency control.

Abstract: An oscillator circuit is disclosed that includes a first oscillation part configured to output a first oscillation output by charging and discharging a first capacitor, and a second oscillation part configured to output a second oscillation output by charging and discharging a second capacitor. The second oscillation part includes a phase difference detection part configured to detect the phase difference between the first oscillation output and the second oscillation output, and a charging current and discharge current control part configured to control the charging current and the discharge current of the second capacitor in accordance with the phase difference detected by the phase difference detection part so that the second oscillation output synchronizes with the first oscillation output.

Abstract: A minimum frequency synchronization discriminator for use in providing a clock signal for a switch mode power supply automatically detects when the frequency of a sync signal is above a minimum frequency and causes the sync signal to serve as the clock signal for the controller. If the frequency of the sync signal is below the minimum frequency, the minimum synchronization frequency discriminator causes the output signal of the internal oscillator to serve as the clock signal.

Abstract: A phase synchronous multiple LC tank oscillator is described. A plurality of oscillator stages are configured to oscillate synchronously. The phase of each of the plurality of oscillator stages is substantially the same and the plurality of oscillators are inductively coupled.

Abstract: A phase-locked loop system configured to cause an output signal to tend toward a desired output frequency. The phase-locked loop system includes a charge pump system configured to produce a charge pump output based on differences detected between the output signal and the desired output frequency. The phase-locked loop system also includes an oscillator operatively coupled with the charge pump system and configured to produce the output signal based on the charge pump output. The charge pump system is configured to selectively effect proportional control over the output signal by applying correcting pulses along a proportional control path of the phase-locked loop system.

Abstract: Control signal oscillation filtering circuits, delay-locked loops, clock synchronization methods and devices and system incorporating control signal oscillation filtering circuits is described. An oscillation filtering circuit includes a first oscillation filter configured to filter oscillations and a majority filter configured to average filter an output of a phase detector and generate in response thereto control signals to an adjustable delay line.

Abstract: A system, apparatus, and method to connect an oscillator network to multiple parallel oscillator circuits. The apparatus may include multiple modules located within a platform, where each of the multiple modules includes an internal oscillator circuit and the platform includes an input port; and an oscillator network located external to the platform. The oscillator network is coupled to each of said internal oscillator circuits through the input port. Other embodiments are described and claimed.

Abstract: Electronic circuitry for generating and distributing standing wave clock signals. The electronic circuitry includes one or more two-conductor transmission line segments that are interconnected with an odd number of voltage-reversing connections to form a closed loop. A regeneration device is connected between the conductors of the transmission line segments and operates to establish and maintain a standing wave on the loop. At any location on a segment there is a pair of oppositely phase oscillations.

Abstract: A reference vibration generator 1 receives transmission waves from all reference vibration generators including itself as transmission/reception waves kk0?Pi (? is the sum of i=1 to N), amplifies them by an amplifier 3, superimposes them with a part of an output Pi from an limit cycle vibration circuit and inputs them into the limit cycle vibration circuit to thereby perform limit cycle vibration, and transmits a part of the output Qi=k0Pj to the outside. With the limit cycle vibration performed cooperatively by the whole systems, transmission waves are automatically modulated, whereby mutual synchronization is realized among reference vibration generators built in or added to a plurality of system units arranged distributively.

Abstract: A clock architecture employing redundant clock synthesizers is disclosed. In one embodiment, a computer system includes first and second clock boards. The first clock board may act as a master, generating a system clock signal, while the second clock board acts as a slave. The first clock board may monitor a phase difference between a first crystal clock signal and a feedback clock signal. If the phase difference exceeds a limit, the first crystal clock signal may be inhibited, preventing the first clock board from generating the system clock signal. The second clock board may monitor the system clock board in reference to a feedback clock signal. If the second clock board detects a predetermined number of consecutive missing clock edges, it may enable a second crystal clock signal, which may be used to generate a system clock signal.

Abstract: A method and system for fast wakeup of a high-Q oscillator (300) that includes a resonating element (304), preferably a crystal resonator (304), and an amplifier (310). The method comprises connecting the resonating element (304) to a fast wakeup, low-Q oscillator (302), inputting a plurality of pulses generated by the low-Q oscillator (302) into the resonating element (304), and simultaneously disconnecting the resonating element (304) from the low-Q oscillator (302) while connecting the resonating element (304) to the amplifier (310), thereby obtaining substantially uniform steady state oscillations in the high-Q oscillator. The system (300) includes in addition to high-Q and low-Q oscillator elements a mechanism for counting the pulses (312) and for performing the simultaneous disconnection and connection mentioned above.

Abstract: A means is provided to establish oscillations on a particular mode or resonance of a quartz crystal in a crystal oscillator and to discriminate against other modes. This is done by injecting a signal close in frequency to the desired mode until oscillation have been established and saturation of the active element has occurred. The limiting process then discriminates against the unwanted modes and holds the oscillation on the desired mode.

Abstract: A circuit and method for generating quadrature signals with a deterministic phase relationship. Between two inductive-capacitive (LC) based quadrature voltage controlled oscillators (VCO), phase shift circuitry is interposed such that the individual LC VCO circuits produce signals with corresponding phase delays which ensure that the desired lead or lag phase relationship between the quadrature signals is achieved.

Abstract: The invention relates to the field of electronics and more particularly to the tuning and injection locking of voltage controlled oscillators (VCOs). An improved injection locking circuit is provided which allows the VCO to injection lock with a smaller reference signal and therefore a smaller locking bandwidth (LBW). In order to allow the VCO to injection lock with a lower power reference signal, this invention includes a pre-tuning algorithm to place the VCO frequency such that the desired frequency is in the LBW. Tuning of the VCO is achieved using direct digital tuning that does not require an input reference. Injection locking is performed using a low frequency clock harmonic as the reference signal. More specifically, tuning is accomplished by sub-sampling and digitizing the output signal of the VCO, determining the center frequency, and adjusting the VCO control voltage.

Abstract: A method and apparatus for producing high-frequency oscillations is disclosed. A new resonator architecture minimizes via losses and supports a compact layout of active circuitry. The resonator architecture incorporates dual resonant transmission lines to reduce resonator loss and facilitate compact layout. The oscillations of two oscillators are cross-coupled in a way that compensates for the delay in the active devices of the oscillator, thus permitting accurate alignment of the active circuitry response with the oscillation waveform. The cross-coupling of the two oscillators improves phase noise performance and eliminates spurious oscillations. An active circuit architecture provides very narrow pulses for the operation of the oscillator. This architecture provides for accurate cross-coupling and pulsed-mode operation to improve manufacturing stability and phase noise performance.

Abstract: The invention provides a multi-phase oscillator includes a delay loop buffer and plurality of oscillators. The delay loop buffer has N delay units. The oscillator can be a single phase oscillator, a 180° phase difference oscillator or a multiple phase difference oscillator. The N delay units are used to constitute a configuration having 360° phase shift where each delay unit has the same delay time and phase shift. Furthermore, a 180° phase difference oscillator composed of a plurality of inverters and a regenerator can be applied in the multi-phase oscillator.

Abstract: A quadrature oscillator includes a master tuned oscillator and two injection-locked slave tuned oscillators.

Abstract: Timing signal generation and distribution are combined in operation of a signal path exhibiting endless electromagnetic continuity affording signal phase inversion and having associated regenerative active means. Two-or more-phases of substantially square-wave bipolar signals arise directly in travelling wave transmission-line embodiments compatible with semiconductor fabrication including CMOS. Coordination by attainable frequency synchronism with phase coherence for several such oscillating signal paths has intra-IC inter-IC and printed circuit board impact.

Abstract: A phase-locked loop system configured to cause an output signal to tend toward a desired output frequency. The phase-locked loop system includes a charge pump system and an oscillator operatively coupled with the charge pump system. The charge pump system is configured to selectively effect proportional control over the output signal by producing a correcting pulse having a duration and applying the correcting pulse to a proportional control path of the phase-locked loop system. The charge pump system includes a correcting circuit configured to store a correcting charge corresponding to the correcting pulse, and then output the correcting charge over a period of time that is greater than the duration of the correcting pulse. Other configurations of the phase-locked loop system employ programmable current mirrors, and other structures and methods, to reduce charge pump current within the phase-locked loop.

Abstract: A frequency variation apparatus is provided for use in a hardware-based random number generator. The frequency variation apparatus includes sampling frequency variation logic and a sampling frequency oscillator. The sampling frequency variation logic produces a noise signal that corresponds to parity of two independent and asynchronous oscillatory signals. The sampling frequency oscillator is coupled to the sampling frequency variation logic. The sampling frequency oscillator receives the noise signal, and varies a sampling frequency within the random number generator in accordance with the noise signal.

Abstract: The invention relates to a controlling equipment for properly maintaining a length of a period where an oscillator is to operate and also relates to a radio equipment incorporating such a controlling equipment. The oscillator is to supply a predetermined signal to a circuit that intermittently operates. A length of time, which is between a first instant and a second instant when the oscillator and the circuit are to initiate operation, respectively, is varied in accordance with a length of time from an initiation of operation of the oscillator to an output signal of the oscillator satisfying a predetermined condition. In an equipment or a system to which the invention is applied, it is possible to flexibly adapt to deviation or fluctuation in its characteristics and to reduce the power consumption.

Abstract: The invention provides an oscillator and a control method for controlling the oscillator which reliably oscillates even when the oscillator is driven at a low voltage. An oscillator repeats a startup operation and a suspension of the startup operation by turning on and off a switch with half a period of a Schmitt trigger oscillator circuit, until a piezoelectric oscillator circuit is put into a normal oscillation state. The oscillator thus creates a number of opportunities of transient response allowing the oscillation amplitude of the piezoelectric oscillator circuit to grow, and reliably oscillates.

Abstract: A clock multiplication technique includes driving two oscillatory circuits by an input signal. One of the circuits has an inverted input. The oscillatory circuits are characterized by a transfer function having an unstable region bounded by two stable region. Oscillations produced during operation of each of the circuits in the unstable regions are combined to produce a signal whose frequency is a multiple of the input frequency.

Abstract: Timing signal generation and distribution are combined in operation of a signal path exhibiting endless electromagnetic continuity affording signal phase inversion and having associated regenerative active means. Two-or more-phases of substantially square-wave bipolar signals arise directly in travelling wave transmission-line embodiments compatible with semiconductor fabrication including CMOS. Coordination by attainable frequency synchronism with phase coherence for several such oscillating signal paths has intra-IC inter-IC and printed circuit board impact.

Abstract: An injection-locked high-frequency oscillator has an annular transmission line, and m (m>1) units of oscillating amplifiers, and is provided with an oscillation closed loop formed with the transmission line and the oscillating amplifiers, the oscillating frequency thereof being determined by an electric length of line of the oscillation closed loop. When n≧1 is defined, and when the wavelength corresponding to the oscillating frequency is defined as &lgr;, the electric line length from any one oscillating amplifier to the neighboring oscillating amplifier is set to be n&lgr; by taking delay time due to the oscillating amplifiers into consideration, and further into in-phase points on the oscillation closed loop, synchronizing signals having, respectively, a frequency that is 1/mn of the oscillating frequency are injected.

Abstract: Two oscillators, such as in two pulse width modulator circuits of DC to DC power converters, are maintained in synchronization and at a predetermined phase shift from one another by a circuit incorporating a comparator. A sawtooth signal output from the master oscillator is fed to one comparator input while the sawtooth signal is filtered and applied to the second input of the comparator to generate an approximately 180° phase shift turn-on at the output of the comparator that is fed through a driver circuit to an input of a second oscillator. By insuring that the faster operating oscillator is the master, the slave oscillator will be triggered by the signal from the master.

Abstract: Two oscillators, such as in two pulse width modulator circuits of DC to DC power converters, are maintained in synchronization and at a predetermined phase shift from one another by a circuit incorporating a comparator. A sawtooth signal output from the master oscillator is fed to one comparator input while the sawtooth signal is filtered and applied to the second input of the comparator to generate an approximately 180° phase shift turn-on at the output of the comparator that is fed through a driver circuit to an input of a second oscillator. By insuring that the faster operating oscillator is the master, the slave oscillator will be triggered by the signal from the master.

Abstract: The present invention, generally speaking, provides a controlled oscillator that attains the foregoing objectives. The structure of the oscillator is, in general, that of a ring; however, timing of the oscillator is governed largely by an RC time constant. Since the delay is mostly RC-based, phase noise is minimal compared to an active implementation. Furthermore, in a preferred embodiment, two ring oscillators of this type are combined to form a differential oscillator circuit having still lower phase noise. In an exemplary embodiment, the ring oscillators are three-stage ring oscillators. The operation of two inverters is unaffected by the RC time constant. Because the speed of these inverters is very fast compared to the RC time constant, the oscillation frequency is quite constant versus temperature and supply voltage.

Abstract: An oscillation circuit provides clock signals and a clock distribution circuit or system of circuits having low skew and low jitter to logic circuits and memory circuits of a microprocessor or the like. Further, a semiconductor integrated circuit device of high speed is provided as a result of the stable clock signal that is generated and distributed. The oscillation circuit is in a semiconductor integrated circuit device having a plurality of oscillators each having an oscillation node, wherein the oscillation nodes of each of the oscillators are connected together by a conductive wiring line that may be a closed loop. The oscillators are synchronized to oscillate at substantially the same frequency. The oscillators are connected to the conductive wiring line at connecting points having substantially the same interval of conductive wiring lengths between the connection points, which leads to synchronizing the oscillators to oscillate with a substantially identical phase.

Abstract: An oscillator having multi-phase complementary outputs comprises a first plurality of single ended bistable amplifiers connected in series to form an input and an output and a second plurality of single ended bistable amplifiers connected in series to form an input and an output. The first and second plurality have the same odd number of amplifiers, A first feedback path connects the output to the input of the first plurality of amplifiers to establish bistable oscillations in the first plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the first plurality. A second feedback path connects the output to the input of the second plurality of amplifiers to establish bistable oscillations in the second plurality of amplifiers at a frequency dependent upon the delay time from the input to the output of the second plurality.

Abstract: A planar radiating oscillator apparatus for micro- and milliwaves includes a pair of conductor patches disposed with their pointed portions in proximity and their far edges on opposite sides, a high-frequency transistor disposed between and connected to the conductor patches, a conductor planar surface disposed under and parallel to the fan-shaped conductor patches from which it is separated by a distance equal to between one-fifteenth and one-fifth the generated wavelength therefrom, and at least one direct current power source connected to the conductor patches and having a ground potential in common with a source potential of the high-frequency transistor.

Abstract: A signal generator for producing a plurality of signals having the same frequency but a constant phase difference includes first and second cavity oscillators coupled to each other via an appropriate wall and coupling apertures. A first output signal is extracted from the first oscillator at a first predefined location on the oscillator's outer wall, which location defines a first angle relative to the wall aperture which couples the first oscillator to the second. A second output signal is extracted from a predefined location on the outer wall of the second oscillator, which location defines a second angle relative to the aperture in the first oscillator. Because the two oscillators are coupled to each other, they will produce an output signal having substantially the same frequency. The phase difference between the two output signals is defined by the difference between the first and second angles.

Abstract: A clock signal is driven at one point onto a clock bus of an integrated circuit by a driver circuit. Oscillators are coupled along the length of the clock bus. The oscillators are all loosely coupled to one another through the clock bus such that all the oscillators oscillate together at the frequency of the clock signal. The oscillators add energy to the clock signal on the clock bus locally so that all the energy required to sustain the clock signal does not have to come from the point of origin. By reducing current flow down the clock bus across the series resistance of the clock bus, limits on propagation speed due to the series resistance of the clock bus are avoided. In one embodiment, less than 15 milliwatts is consumed to “propagate” a 1.36 gigahertz clock signal a distance of two centimeters down a clock bus of an integrated circuit at a propagation speed of approximately 2.1×107 meters per second.

Abstract: A system and method for providing master and slave phase-aligned clocks. Upon a failure of a master clock signal, the system switches over to a slave clock signal in phase alignment with the master clock signal. The master clock signal is from a first clock source, while the slave clock signal is from a second clock source. The second clock source comprises a phase locked loop (PLL) including a switch, which is coupled to selectively provide a control signal to a voltage controlled oscillator (VCO). The switch may also provide a reference control voltage to the VCO. The first clock source may be on a first clock board, and the second clock source may be on a second clock board. The clock boards are preferably hot swappable. The first clock board may be removed from the system, such as upon a failure, and a third clock board placed in the system.

Abstract: A first and a second fixed-frequency oscillator coupled in a ring topology to generate a variable frequency output is provided. Frequency variation is achieved by varying the coupling between the two oscillators. The coupling may be varied by using a variable current or voltage source. The first fixed frequency oscillator may generate a first signal which is ninety degrees out of phase with a second signal generated by the second fixed frequency oscillator. An apparatus is provided comprising a first oscillator which produces a first signal, a second oscillator which produces a second signal which is about ninety degrees out of phase with the first signal, and first and second coupling modules, coupling the first and second oscillators. A frequency control circuit is provided which varies the coupling of the first and second coupling modules and thereby varies the frequency of the first signal and the second signal.

Abstract: Two or more equal amplitude periodic output signals which are mutually shifted in phase by an integer fraction of 360 degrees, such as 90°, are generated by injection locking a ring type oscillator circuit arrangement with a periodic low phase noise signal source. More particularly, a first ring oscillator is injection locked by a low phase noise signal source, one having a noise characteristic which meets the GSM radio standard of at least −132 dBc/Hz at a 3 MHz offset. An identical second ring oscillator is then driven with the output of the first ring oscillator. In one circuit configuration, an even numbered, e.g., a four stage ring oscillator is injection locked to a low-phase noise oscillator having a predetermined noise specification which is application specific and wherein a second even numbered stage, e.g., a four stage ring oscillator is coupled to the first ring oscillator. In a second circuit configuration, a first odd numbered, e.g.

Abstract: A frequency-providing circuit is disclosed for providing an output signal at a frequency fout. The circuit comprises a frequency-generating unit, a frequency-changing circuit, and a synchronizing circuit. The frequency-generating unit receives a frequency-selecting control signal and provides a frequency output at a frequency fosc, whereby the frequency-generating unit is switchable between different frequencies substantially without a settling time. The frequency-changing circuit receives the frequency output and a frequency-changing control signal and derives the output signal therefrom, whereby the frequency fout of the output signal can be changed, with respect to the frequency fosc, in accordance with the setting of the frequency-changing control signal. The synchronizing circuit synchronizes the frequency-selecting control signal and the frequency-changing control signal.

Abstract: An improved method and system for generating quadrature phase shift keying signals for use in data transmission is provided. A pair of oscillators are slaved to the transmit frequency and produce two quadrature signal components with the same frequency but 90 degrees out of phase. The two signal components are carried to separate bi-phase switches by mirrored waveguides. Each bi-phase switch has a reflective waveguide coupler which directs the received signal into a waveguide terminated by a hard short and has a controllable shorting plane spaced approximately one-quarter wavelength from the termination point. The shorting planes are controlled by the output data signals and each introduces a 180 degree phase shift in the respective signal component when activated. The reflective couplers direct the selectively phase shifted signal components to an in-phase combiner, where they are combined to produce the quadrature phase shift keyed output signal.

Abstract: In plural oscillation systems each of which can be described by the van der Pol equation, each oscillation system is reciprocally connected with at least one oscillation system other than the own oscillation system by a coupling factor to realize automatically the phenomenon of synchronization of the respective oscillation systems to enable spontaneous tuning of the entire system. A self-excited oscillation of an oscillation system prescribed by a van der Pol equation is controlled on/off by varying an applied voltage as a variable.

Abstract: A circuit separately measures one or both of the rising-edge and falling-edge signal propagation delays through a signal path of interest. The greater of these delays can then be used to establish a worst-case delay for the signal path. The worst-case delay can be used, in turn, to create accurate timing specifications for logic circuits that include similar or identical signal paths. To determine the delay through the signal path, the signal path is used with a second, typically identical, signal path to create alternating feedback paths of an oscillator. The oscillator is configured to output a test-clock signal having a period proportional to either the rising- or falling-edge delays through the two signal paths. The test-signal transitions are counted over a predetermined time period to establish the average period of the oscillator. Finally, the average period of the oscillator is related to the average signal propagation delay through the signal path of interest.

Abstract: An oscillation apparatus is provided with a signal input unit for supplying a pulse sequence consisting of pulses sequentially continuously occurred; a state quantity generating unit for generating state quantity having a value which is monotonously increased with the passage of time; a state quantity transition unit for transferring a value of state quantity in the course of generation in said state quantity generating unit to a value changed by a predetermined amount in a varying direction of the value of the state quantity with respect to a present value of the state quantity, whenever one pulse is fed from said signal input unit to said state quantity transition unit; a state quantity reset unit for comparing the present value of the state quantity generated in said state quantity generating unit with a predetermined threshold value, and resetting the present value of the state quantity generated in said state quantity generating unit to a predetermined initial value when the present value reaches the thr

Abstract: An oscillation circuit that improves the duty controllability by cross-coupling ring oscillators that are comprised of current inverters. The sources of current supply circuits 4a-4c and 6a-6c are connected to a power supply and their drains are connected to terminals A in corresponding current inverters, respectively. Each of the gates of those current supply circuits receives an output of a current inverter corresponding, one to one, to a current inverter to which the current supply circuit is connected.

Abstract: In a method of calibration of a voltage controlled oscillator (VCO), the VCO (100) provides an output signal which is used to drive a dividing oscillator (10) such as a relaxation oscillator (RO). The RO has at least two states, one in which the RO provides an output signal which has a first frequency that is related to the VCO output signal by a first ratio (e.g. 1/N) and one in which the relaxation oscillator provides a RO output signal which has a second frequency that is related to the VCO output signal by a second ratio (e.g. 1/(N+1)). By measuring the first and second frequencies (and knowing the relationship between the first and second ratios), the VCO frequency is calculated and stored (110). Several VCO frequencies can be calculated and stored for several applied voltages. As a result the VCO can be driven to any selected frequency in the calibrated range and can be used to provide an injection frequency for a radio.

Abstract: A system for synchronizing circuit operation within an integrated circuit having a high frequency clock. The system includes an oscillator for providing a clock signal and a transmission line coupled to the oscillator for distributing the clock signal to load buffers. The load buffers provide sub-circuits within the integrated circuit with synchronized clock signals. The load buffers are resonant and convert the capacitive load impedance of receiving circuits into a virtual inductive load. The impedance converter boosts the clock signal transition times to provide improved high frequency circuit synchronization within the integrated circuit.

Abstract: A clock for digital devices. Ordinarily, when multiple digital devices are clocked by a common clock, the clock signals frequently arrive at the digital devices at different times, due to propagation delays. The devices are thus not clocked synchronously. Under the invention, the multiple devices are connected to a common transmission line. A standing wave is generated on the transmission line, and the periodic collapse of the standing wave is used to clock the devices. Synchronous clocking to within about 1.0 nano-seconds has been attained, in a transmission line about ten feet long, wherein a clock signal ordinarily takes about 15 nanoseconds to travel from one end to the other.

Abstract: A radiating oscillator apparatus for micro- and millimeter waves includes paired fan-shaped conductor patches disposed with their pointed portions in proximity and their arcuate portions on opposite sides, at least one high-frequency transistor disposed between and connected to the fan-shaped conductor patches, a conductor planar surface disposed under and parallel to the fan-shaped conductor patches at an interval of between one-fifteenth and one-fifth the generated wavelength therefrom, and a pair of direct current power supplies connected to the fan-shaped conductor patches separately with a common ground potential.

Abstract: A circuit for synchronizing transmission local oscillating frequency in a co-channel microwave system, with more reliability, synchronizes horizontal and vertical polarization waves phase locked dielectric resonators which generate transmission local oscillating frequencies in a digital co-channel microwave system.