Abstract: Waves such as radio-waves, sound waves, or electric current waves are used for communication among system units. Each system unit includes a reference oscillation generation apparatus which receives as input a sum of a sent wave and a received wave. An upper limit and a lower limit for input amplitude range is set in said reference oscillation generation apparatus. The apparatus modulates the output (sent wave) so as to meet the input amplitude range so that synchronization among a large number of distributed reference oscillation generation systems is attained. As a result, it becomes possible to eliminate phase differences among reference oscillation systems added to a large number of distributed system units and attain synchronization.

Abstract: A clock circuit for providing an integrated circuit with a high accuracy, crystal oscillator clock which interfaces to an "off-chip" crystal to provide a high accuracy clock signal while an internal, low power oscillator provides a low power clock source. Either clock may be selected to drive a programmable processor under program control. When high accuracy and stability are required, the crystal oscillator may be chosen as the processor clock, and when lower power is desired, the low power oscillator may be chosen as the processor clock while the high accuracy clock is disabled. The high accuracy oscillator is used to clock a first timer circuit, while the low power oscillator is used to clock a second timer circuit. The second timer circuit output, in turn, is synchronized to the processor clock so that the programmable processor can utilize the second timer circuit even when the processor clock is asynchronous to the second timer circuit.

Abstract: A high frequency pulse-time modulation (PTM) signal generator employs four or more high frequency oscillators which are mutually locked uniquely either in a symmetric mode or an antisymmetric mode by means of a plurality of electronic phase shifters. The output signals from the oscillators are cascaded together to form a PTM output through control of the electronic phase shifters which shift the mutual locking of the oscillators back and forth between the symmetric and antisymmetric modes. Magic-tees or other combining elements are employed to combine the oscillator output signals so that an output pulse is generated when the oscillators are locked in the symmetric mode and a zero level output is generated when the oscillators are locked in the antisymmetric mode.

Abstract: An electromagnetic radiation reflection amplifier capable of amplifying cw or pulsed signals has a pair of cw oscillators operated under injection locking conditions. Diversion of oscillator power to a separate signal path during the off time of the input pulse is achieved through purely passive means; no active control devices are utilized. The device can be implemented for amplification of microwave, millimeter wave or optical signals. The amplifier comprises a 180-degree hybrid coupler, a matched pair of cw oscillator modules, a waveguide discontinuity, a waveguide termination, and an optional signal input element. For a magic-tee hybrid coupler, the cw oscillator modules are mounted on the ports of the symmetrically positioned waveguide arms and the waveguide discontinuity is located within either the sum arm or difference waveguide arm intermediate its ends.

Abstract: A high frequency pulse-time modulation signal generator employs first and second microwave or laser oscillators which are mutually locked uniquely either in a symmetric mode or an antisymmetric mode by means of an electronic phase shifter. The output signals from the oscillators are combined to generate pulse-time modulated output pulses through application of a control voltage to the electronic phase shifter which switches the mutual locking of the oscillators back and forth between the symmetric and antisymmetric modes. In a microwave embodiment, a hybrid-tee, such as a magic-tee, is employed to combine the oscillator output signals, while in the optical or laser embodiment, a half-silvered mirror is employed to combine the oscillator output signals. When the oscillators are locked in the symmetric mode, the hybrid-tee generates an output pulse, and when the oscillators are locked in the antisymmetric mode, the hybrid-tee generates a zero level output.

Abstract: A oscillator having two synchronized oscillator rings is described. Synchronization is accomplished by circuitry connected between the outputs of two aligned stages in coupled oscillator rings, the circuitry being operable to maintain outputs of the stages 180.degree. apart in phase.

Abstract: An optically controlled MESFET semiconductor oscillator assembly having a MESFET semiconductor which, when voltage biased by a pulsed dc voltage, oscillates at a free running frequency; an optical signal delivery system, such as a light intensity modulator connected to optical fibers; and other oscillator circuitry including a pulse generator. In operation, the pulsed free running oscillation of the MESFET semiconductor can be injection locked to the intensity modulated optical signal delivered via the optical signal delivery system.

Abstract: A voltage-controlled oscillator has ring oscillators R1, R2 and R3 which have three amplifier elements A1-A3, A4-A6 and A7-A9 respectively which are connected in the form of a ring. The way of connecting with the respective amplifier elements A10 to A18 is as follows: First, optionally selecting two output terminals from the 3.times.3 amplifier elements which form three ring oscillators, wherein the two output terminals are not selected from the input and output terminals of one amplifier element, and wherein the two output terminals are not selected from the output terminals belonging to the same ring oscillator. Next, connecting the input and output terminals of one of the amplifier elements A10 to A18 to the optionally selected two output terminals. Then repeating the above procedures one or more times to form a network between the ring oscillators R1 to R3. C1 to C9 are nodes for the connections.

Abstract: In a multiphase output oscillator a number of serially coupled oscillator circuits is organized in a loop. Each particular oscillator circuit is coupled to its serial successor in the loop, to provide adjustment of the phase of an oscillation signal of the successor oscillator circuit dependent upon a difference between the phase of the oscillation signal in the successor and the phase of an oscillation signal in the particular oscillator circuit. None of the oscillator circuits will oscillate freely: as each oscillator will adjust its successor all the way around the loop. Indirectly, each oscillator circuit thus influences all of the other oscillator circuits and ultimately over itself. The multiphase output oscillator as a whole will oscillate in a collective mode of oscillation wherein all oscillator circuits oscillate at the same frequency. Successive oscillator circuits along the loop will oscillate at respective fractions of the full oscillation period delayed from each other.

Abstract: A clock distribution network for synchronously coupled electronic communication systems that includes a clock distribution device having a phase locked loop for synchronizing the external clock signals provided to each semiconductive device with each other. The clock distribution device distributes a low speed clock to a large number of clocked semiconductor devices where those devices then internally generate high speed clocks in phase with the low speed clock. The low speed clocks are phase shifted with respect to each other to reduce radiated energy. The ratio of internal to external clock speed is also communicated to each chip so that the chips can be programmed to operate with a variety of external clock speeds. The phase shifting of the external clock to different chips is provided so that the chips can still communicate synchronously at the high speed internal clock.

Abstract: The voltage-controlled oscillator according to the invention has a plurality of first amplifier elements 100 and a plurality of phase correctors 101. Each of the first amplifier element 100 is provided with a pair of input signal lines, a pair of output signal lines and one or more control signal line 104 and can function as a differential amplifier and control the delay time for which a differential signal is transmitted from the pair of input signal lines to the pair of output signal lines by the control signal of the control signal line 104.

Abstract: An injection-locked oscillator having a non-reciprocal four-port network with a pair of input ports (1, 2) and a pair of output ports (3, 4) in which the signal transfer path from a first input port (1) to a first output port (3) is non-reciprocal, the signal transfer path from a second input port (2) to a second output port (4) is non-reciprocal, the signal transfer path from a second input port (2) to a first output port (3) is non-reciprocal, and an amplifier with the input port coupled with said first output port and the output port coupled with said second input port, is locked to an injection signal applied to said first input port and provides oscillation output to said second output port (4). The circuit between the first input port (1) and the second input port (2), and the circuit between the first output port (3) and the second output port (4) are isolated. The present oscillator is implemented in a small IC chip, and has feature to be injection-locked in wide frequency band.

Abstract: An array of coupled microwave oscillators operate at equally spaced output frequencies to produce a train of high-power RF pulses. Each oscillator is embedded in a printed planar radiating structure so that they form a classical antenna array. The oscillators are coupled through weak radiative interactions and by adjusting the frequencies of the oscillators so that adjacent devices operate at equally spaced frequencies, the output from the array is a frequency spectrum of equally spaced pulses. The pulses have a pulse repetition rate which is determined by the frequency spacing and the pulse duration and peak power are a function of the square of the number of oscillators in the array. In addition, the signal scans repetitively through space above the array.

Abstract: A serial data clock receiver circuit (11) is provided that synchronizes a clock signal to data. The serial data clock receiver circuit (11) comprises a control circuit (21), a dual oscillator circuit (19), and a phase locked loop circuit (22). The control circuit (21) arms the dual oscillator circuit (19) for being enabled during an idle period. The phase locked loop circuit (22) provides a reference voltage for the dual oscillator circuit (19). The dual oscillator circuit (19) is responsive to both the data and control circuit (19) for providing a clock signal.

Abstract: A direct digitally synthesizer-based, injection locked oscillator includes a direct digital synthesizer for generating a digitally synthesized signal at frequency f.sub.0, an analog oscillator circuit for generating an analog signal at frequency f.sub.1 and a filter coupled to the direct digital synthesizer for filtering the digitally synthesized signal to provide a signal at frequency Nf.sub.0. N may be an integer from 1 to 10. Also included is a coupler to couple the filtered, digitally synthesized signal into the analog oscillator to lock the frequency of the analog output signal to the frequency of the digitally synthesized signal such that the frequency f.sub.1 is equal to the frequency Nf.sub.0. The coupler also electrically couples the analog signal from the analog oscillator circuit to a second filter to filter the analog signal. An amplifier electrically coupled to the second filter amplifies the filtered signal to provide an analog oscillator output signal.

Abstract: A signal generator which includes two matched ring oscillators, and feedback gates which cross-couple each ring oscillator to the other. That is, in each oscillator, a first node gates a coupling transistor which connects a second node (complementary to the first node) across to drive the first node of the other oscillator.

Abstract: A system for operating a pair of microprocessors with independent system clocks while at the same time providing synchronization by a common interrupt signal, and in which the system clocks are cross-monitored to thereby provide Fail-Safe operation.

Abstract: An apparatus is provided for synchronously selecting different oscillators as the system clock source. The apparatus is comprised of two oscillator selectors. Each of the oscillator selectors has as its inputs the output of each of the oscillators and a three-bit command code which indicates which of the oscillators is to be selected by the oscillator selector and a single clock output. A different oscillator may be selected by each of the oscillator selectors at the same time. The output of the oscillator selectors are inputs to the clock controller. The clock controller also receives command signals for controlling the switching of the clock controller between the outputs of the two oscillator selectors. The output of the clock controller is the clock source for the system and a status signal indicating which oscillator selector is presently being used.

Abstract: A method and apparatus for recovering the phase of a signal which may change at periodic intervals is disclosed which comprises gated variable frequency oscillators. These results are obtained in an illustrative embodiment of the present invention in which an incoming signal is fed into a gated oscillator and the complement of the incoming signal is fed into a matching gated oscillator. Advantageously, the respective outputs of the two oscillators are fed into a Boolean NOR gate. When the gated oscillators are designed to oscillate at the frequency of the incoming signal, the output waveform will have a bounded phase relationship with respect to the incoming signal.

Abstract: Oscillator circuit of the regenerative type, comprising a first oscillator at least including a first feedback amplifier (Qa1, Qb1) and a first integrator (C1) in which the first oscillator has an output signal having two stable levels alternating in one oscillation cycle and an unstable or regenerative switching state between each of them, in which the loop gain is greater than unity, and has an input signal which originates from the integrator and which varies time-dependently in a positive or negative sense. A second oscillator identical to the first oscillator is provided which at least includes a second feedback amplifier (Qa2, Qb2) and a second integrator (C2) having an oscillation cycle which is equal to the said oscillation cycle or a multiple thereof and which is shifted with respect thereto.

Abstract: A pulse width modulated power supply controller is disclosed which is capable of generating synchronization pulses in such a manner that multiple ones of such power supply controllers in a system are synchronized to the controller having the highest oscillation frequency, without requiring one of the controllers to be implemented as a master and the others implemented as slaves. The power supply controller includes two comparators which are coupled to receive the external capacitor voltage. A first comparator enables a fast charging circuit, such as a current source, for increasing the rate at which the capacitor is charged responsive to the capacitor voltage reaching a first threshold; a single-ended or differential synchronization pulse is also generated, and communicated to the first comparators of other power supply controllers in a multiple controller system.

Abstract: Disclosed is a multi-channel electrostatic sensor apparatus including a main oscillation circuit; a plurality of pull-in type sub-oscillation circuits which are adapted to synchronize with the main oscillation circuit to generate sub-frequency signals whose frequency is equal to the main oscillation frequency or a multiple thereof; and a plurality of resonance circuits which are sensitive to any change in exterior capacitance when detected by an associated detector for changing its resonator resonance point with respect to the sub-frequency signal. Positive synchronization of the sub-oscillation circuits with the single main oscillation circuit prevents any adverse effect from being caused by the varying stray capacitance in flexible conductors connecting the sub-oscillation circuits to the main oscillation circuit while allowing the relatively free movement of the video heads of a video system, on which video heads the sub-oscillation circuits and subsequent components are attached.

Abstract: A system to measure time based on the output of a plurality of clocks employs a common oscillator, rather than a frequency synthesizer. Phase differences between a plurality of clocks are measured by mixing the output from each clock with the output of the common oscillator and detecting the zero crossing of each of the resulting beat signals. The zero crossings are counted and used to start and stop time interval counters, which count the time intervals between zero crossings of the beat signals from different clocks. The output of one of the clocks is used to provide a time base. The output of the first clock is input to a divider, and the divided signal used to start the first of the time interval counters. The number of zero crossings of the divided signal are also counted so that the relative frequency of the common oscillator can be determined. The output of the divider can be synchronized with an external clock.

Abstract: A phase-lock loop scheme which can be implemented in an application specific integrated circuit using CMOS elements is disclosed which is directed to controlling a plurality of slave gate array circuits such that each of the master gate array circuit and the slave gate array circuits are clocked at the same time and are within a fixed time delay from a device reference clock signal. The master gate array circuit receives the input clock synchronization signal from the master clock of the device containing the master and gate array circuits and produces an internal clock signal which is then sent to each of the slave gate array circuits, by means of equal delay paths. The phase-lock loop circuitry utilized by each of the gate arrays can be implemented on program logic array chips along with the logic which receives the synchronized clock signals generated by the respective phase-lock loops of each of the gate array chips.

Abstract: This invention provides an improved method for synchronizing a slave oscillator with a master oscillator. The slave includes two counters designated Reference and System, driven by its oscillator; the master includes a System Counter driven by its oscillator. The master sends a reset signal to the slave, simultaneously resetting its System Counter. Periodically, the master sends to the slave a synchronization signal, which signal is generated at predetermined intervals based upon the master's System Counter. Upon receipt of the reset signal, the slave resets its counters. Later, upon receipt of the synchronization pulse, the slave modifies the value of its System counter based upon the closest multiple of the expected count value for the synchronization signal interval. The Reference Counter is not synchronized and runs free.

Abstract: An apparatus for measuring the magnetic content of non-metallic samples includes operating and reference sine wave oscillators of identical frequency, a mutual synchronization loop for said oscillators, and a phase meter connected to the oscillator outputs for measuring the phase shift between their oscillations, when a test sample is placed inside the inductance coil of the operating oscillator. The mutual synchronization loop includes a switchable resistive attenuator for varying the resistance of the mutual synchronization loop according to the magnetic content of the test sample, such that the phase shift between the oscillations of the oscillators, with any value of content within the specified measuring range, is not in excess of 30 deg.

Abstract: A power amplifier driven in the switching mode is started into oscillation by a pulse from an auxiliary oscillator when it is first activated. Reactive currents thereby resulting in an output filter network, containing a series resonant circuit followed by a parallel resonant circuit which is connected across a load impedance, then produce the switching in of a feedback circuit, after which the amplifier oscillates in a self-excited mode, at a frequency determined by the tuning of the resonant circuits.

Abstract: A dynamic switching circuit for multiple asynchronous clock sources comprising a pair of flip-flops which are set and reset in such a manner as to provide high frequency and low frequency output clock pulses without a glitch and within a period extending from approximately a few nanoseconds to no greater than a period equal to the sum of the periods of one of said high and low frequency clock pulses.

Abstract: A delay circit is described which automatically adjusts the propagation delay of clock signals, generated by a clock source, distributed to various receiving devices so that the receiving devices are clocked simultaneously. In one embodiment, the clock signal generated by a single clock source is independently delayed for each receiving device. To determine the proper amount of delay, a clock signal is simultaneously transmitted to each of the receiving devices and a clock return signal from each receiving device is returned to a delay circuit via a return path. The delay circuit detects the various differences in round-trip arrival times of the clock signal associated with each receiving device and fixes a particular clock signal delay for each receiving device so that subsequent clock signals will arrive at each receiving device simultaneoulsy.

Abstract: A microwave power combiner having a spherical region from which six rectangular waveguides extend oppositely along mutually orthogonal diameters. The long dimension of each waveguide cross section extends along a diagonal of a cube circumscribing the region and extends orthognally to this long dimension of the opposite waveguide. One waveguide is an input for an injection locking signal, and four waveguides are inputs for power to be combined in the region from oscillators controlled by the signal. No circulator is required, and the combined power may be output through the remaining waveguide or through the injection locking input waveguide. A number of the combiners may be connected with the output of one combiner serving as an injection locking input or as one power input to another of the combiners.

Abstract: Apparatus and method for reducing the response time for changing a phase locked loop from one frequency to another in which a condition indicative of a frequency change is detected and the conditions in the phase locked loop are changed in response thereto. Specifically, the counts in the loop divider are reset to a predetermined count and an in-phase condition is simulated in the loop phase detector, thereby creating the conditions that are necessary for the phase locked loop to produce the new frequency without the time consuming incremental frequency adjustments that are normally required.

Abstract: A multiple redundant clock system comprises at least n=4 clocks and is self-synchronizing and fault tolerant against the failure of at the most 1/2(n-1) clocks. Each clock comprises an oscillator circuit which activates a dividing circuit at the end of each period in order to form its own clock signal on the output of the dividing circuit. Each clock furthermore comprises a deviation-determining device which compares the own clock signal with the clock signals originating from the other clocks in the system. When an excessively large number of the other clock signals deviate during the first half of the (own) period, the own oscillator circuit is decelerated. When an excessively large number of the other clock signals deviate during the second half of the own period, the own oscillator circuit is accelerated.

Abstract: A dielectric resonator oscillator utilizing transmission-type injection-locking for frequency stabilization is disclosed as including a transistor, two microstrip lines, and a dielectric resonator. One microstrip line is coupled to the transistor, while the other microstrip line receives the broadband signal. The dielectric resonator is positioned adjacent to and between the first and second microstrip lines and is operable for coupling an injection-locking signal into the transistor for locking the oscillation frequency of the oscillator. The two microstrip lines are preferably oriented at right angles so that various sizes of the dielectric resonator can be accommodated.

Abstract: A resonant circuit which includes the input capacitance of the clock pulse inputs of a shift register (10) is pulsed by a sinusoidal wave at voltage peaks of the wave by an oscillator delivering barely enough energy to overcome the damping of the resonant circuit. The oscillator may be crystal controlled and, instead of having a single ended output for delivering energy only on peaks of one polarity, may be in push-pull form reinforcing oscillation peaks of both polarities. This circuit is easily combined with arrangements for switching oscillator frequency from one value to another and/or arrangements for interrupting the clock pulse output for timed intervals after each loading or unloading of the shift register. The loss power dissipation is reduced to about 6% of the loss power dissipation of a square pulse drive for the clocking of the same shift register.

Abstract: An injection-locked waveguide oscillator comprises a first diode (3) having a free-running fundamental frequency above the local cut-off frequency of the waveguide (1) and a second diode (4) having a fundamental frequency below and a higher harmonic above the local cut-off frequency. The first diode (3) may be an IMPATT diode and the second diode (4) a Gunn diode. The free-running fundamental frequency of the first diode (3) is close to the higher harmonic of the second diode (4) so that the second diode (4) injection-locks the first (3). Locking in the reverse sense is inhibited by the inherent loss in conversion from the higher harmonic to the fundamental in the second diode (4), thus avoiding the need for a circulator or isolator. The two diodes (3, 4) preferably are mounted in a common waveguide (1) for a simple compact structure.

Abstract: There are three oscillator circuits which oscillate at different frequencies, each oscillator circuit including a gate having an input and an output. The output of the first gate is connected to an inverter and the input of the second gate. The output of the inverter is connected to the input of the third gate. The output of the second and third gates is connected across a piezoelectric transducer to produce a warble sound.

Abstract: A pair of crystal-controlled oscillators generate respective signals at specific frequencies that are useful in processing a video signal, such as in providing clock-driven signal delay or producing a subcarrier signal. The frequencies are used in such a way that they feed through into the frequency spectrum of the processed video signal. Though the frequencies are nominal multiples of each other they cannot be maintained invariant because of normal circuit conditions, such as ambient temperature variations and circuit aging. The frequencies therefore mix and a difference frequency develops in the processed video signal. By injecting a suitable harmonic of the lower frequency signal into the crystal oscillator generating the higher frequency signal, the higher frequency will lock to variations in the lower frequency. The difference frequency consequently disappears.

Abstract: A clock pulse generator system for providing a highly stable clock signal consists of two separate redundant clock signal generators which are controlled to operate in dead synchronization with each other. A microprocessor controlled digital phase lock loop operates to control each of the two clock signal generators and selects among a plurality of operating states such that the average dynamic phase difference in the two clock pulse signals generated is practically zero. Furthermore, the instantaneous dynamic phase difference does not exceed the phase noise of the voltage controlled crystal oscillators of the phase lock loops and, in one embodiment, is normally less than ten pico seconds, each phase lock loop comprising means for performing a fine, as well as coarse, phase comparison among internally or externally generated reference signals, only one of which is the highly stable clock signal output.

Abstract: The spatial power combiner disclosed here is used to efficiently combine the power sources, which incorporate two-terminal negative resistance devices, in a coherent manner such that a high power output with a stable and definite frequency and phase is obtained, the sources to be combined being arranged in an array configuration.

Abstract: The output signal frequencies of two current controlled oscillators are made to track closely by matching timing currents with a current mirror. A frequency difference between the output signals is obtained by establishing an additional timing current for only one of said oscillators.

Abstract: Phase locking of the output signal of a magnetron with a frequency source signal is obtained by a phase comparison of the output signal and source signal to obtain an error signal which energizes a winding of the magnetron magnet to thereby change the flux experienced by the magnetron tube operating in conjunction with frequency pulling of the magnetron output signal by the source signal coupled to the magnetron by a three-port circulator.

Abstract: A clock pulse regenerator uses a pair of oscillators each comprising a NOR gate and a transmission line feedback element. The oscillators are provided with complementary data pulses and provide an output signal only when the data signal is of a selected logic level. The output signals are combined to form a continuous regenerated clock signal. An FSK encoder using similar oscillators is also disclosed.

Abstract: The optical injection-locking of an FET oscillator is accomplished by injecting the beat signal between two coherently mixed slave lasers, which are locked to different harmonics of a modulated master laser, into the FET oscillator to be locked. 120 GHz injection-locking beat signals are possible using this technique.

Abstract: A combiner for power combining electromagnetic energy is disclosed. At least two electromagnetic cavities are positioned having intercavity coupling among all cavities: each cavity is tangent to all other cavities and/or external transmission line connections are employed to enhance/provide intercavity coupling. Each cavity contains within it at least one power generating device. An input/output port is connected via a nonreciprocal device to an output load and an injecting oscillator which usually has a lower power level than that of the free-running combiner and a higher spectral purity. The cavities are intentionally tuned to at least two different frequencies. For the two cavity and three cavity embodiments, a greater bandwidth is obtained compared with prior art combiners where the cavities are tuned to the same frequency. The power loss is slight.

Abstract: A multiburst test signal generator and a method for using the generator's test signal to determine the frequency response characteristics of television video circuits with a high degree of accuracy is described. One of the burst frequencies is continuously enabled and made variable and the other burst frequencies are disabled. The resulting continuous sine wave is applied to the circuit being tested, its frequency is varied, and the output of the circuit being tested is monitored with a conventional frequency counter.

Abstract: Two variable-frequency microwave generators, i.e. a coaxial magnetron producing outgoing waves and a voltage-controlled oscillator emitting a heterodyning signal for incoming waves of a radar transceiver, are continuously tuned by a pilot signal modifying their operating frequencies with a predetermined constant separation. To maintain this correlation, the tuning circuit of at least one microwave generator responds to the pilot signal through the intermediary of a read-only memory which, on being directly or indirectly addressed by that signal, emits stored setting instructions for the respective generator.

Abstract: Three or more oscillators to be locked in phase with one another are interconnected in a closed ring and have individual feedback loops including respective frequency dividers designed to keep them in step with a synchronizing frequency, equal to a fraction of their own operating frequency, fed in through an associated multiplexer. The multiplexer has a first input receiving the stepped-down feedback frequency of the immediately preceding oscillator, a second input connected to the output of the associated frequency divider, and a third input energizable with an external reference frequency such as a carrier of a PCM of FDM system. Each multiplexer, in the absence of an external switching command which holds it on its third input, stands on its first input unless a control circuit associated with the immediately preceding oscillator detects a disparity between the two frequencies fed to that preceding oscillator via the feedback loop and the multiplexer of the latter.

Abstract: A clock signal generator for providing redundant clock signals includes two clock modules that utilize phase-locked loop oscillators for generating clock and reference signals and for diagnosing malfunctions of the generated clock and reference signals. One clock module is selected as the master, and the other clock module is the slave, being phase and frequency locked to the master. Switching the master between the clock modules may be externally initiated by select signals and also is automatically initiated when malfunctions are detected. The master and slave clock modules are always phase and frequency locked to one another, even if both clock modules are malfunctioning. When both clock modules experience simultaneous malfunctions, the master is selected in accordance with the externally generated select signals. Since the master and slave clock modules are always phase and frequency locked, switching the master is transparent to clock signal utilization circuitry.

Abstract: An apparatus for providing a time-controlled output based primarily upon a primary time source and secondarily upon a secondary time source, the secondary time source counted down to the desired frequency of the time-controlled output. A sensor supplies a control circuit which outputs the primary time source signal when the primary time source is operative, and the secondary time source signal when the primary time source is not operative. The output of the control circuit then resets the appropriate segment of the secondary time source counter in order to synchronize the time-controlled output for the primary time source when the primary time source is operative.

Abstract: A high peak power microwave generator is disclosed in which a plurality of transmission lines are connected to an output wave guide at predetermined intervals along the direction of propagation. Each transmission line is periodically charged, and this electromagnetic energy is released into the wave guide upon the actuation of a light activated silicon switch (LASS) diode connected to the transmission line. The LASS diodes are actuated simultaneously by a laser beam which traverses equal optical paths to each switch. The coincident switching of the transmission lines enables the power in each line to be additive in the wave guide, and much higher output pulses can be obtained. Further, the high speed switching capabilities afforded by the LASS diodes means that the resulting high power can be obtained at a much higher frequency.