Transistorized Controls Patents (Class 331/8)
  • Patent number: 9455721
    Abstract: An FLL (frequency locked loop) oscillator/clock generator includes a free-running oscillator (such as a ring oscillator), and generates an FLL_clk with an FLL-controlled frequency fOSC. The FLL control loop includes a switched capacitor resistor divider that converts fOSC to a resistance, generating an FLL feedback voltage Vfosc used to generate a loop control signal OSC_cntrl input to the oscillator. In response, the oscillator frequency locks FLL_clk to fosc. In an example implementation, the FLL oscillator/clock operates with spread spectrum clocking (SSC) that provides triangular SSC modulation based on a truncated RC transition voltage generated as a negative feedback to an RC relaxation oscillator, with truncation based on switched tripping threshold voltages generated a positive feedback to the RC relaxation oscillator.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: September 27, 2016
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Divyasree J., Anant Shankar Kamath
  • Patent number: 9331704
    Abstract: An apparatus for generating an oscillating output signal includes an inductive-capacitive (LC) circuit and a current tuning circuit. The LC circuit includes a primary inductor and a varactor coupled to the primary inductor. A capacitance of the varactor is responsive to a voltage at a control input of the varactor. The current tuning circuit includes a secondary inductor and a current driving circuit coupled to the secondary inductor. The current driving circuit is responsive to a current at a control input of the current driving circuit. An effective inductance of the primary inductor is adjustable via magnetic coupling to the secondary inductor, and a frequency of the oscillating output signal is responsive to the effective inductance of the primary inductor and to the capacitance of the varactor.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: May 3, 2016
    Assignee: QUALCOMM INCORPORATED
    Inventors: Yiwu Tang, Jianyun Hu, Chiewcharn Narathong
  • Patent number: 9201165
    Abstract: A detection circuit is provided. A detection signal corresponding to an equivalent capacitance value of a micro-electro-mechanical system is generated by an oscillator, and the equivalent capacitance value of the micro-electro-mechanical system varies with a location of the micro-electro-mechanical system.
    Type: Grant
    Filed: October 3, 2013
    Date of Patent: December 1, 2015
    Assignee: Lite-On Technology Corporation
    Inventors: Yu-Nan Tsai, Kai-Wen Cheng, Chia-Hao Hsu, Chun-Lai Hsiao
  • Patent number: 9112649
    Abstract: Aspects disclosed herein relate to predicting one or more signal characteristics to improve efficiency for a PA. A wireless communications device may be include a power amplifier and a processor that is associated with a signal prediction module. In an aspect, the processor may be a modem, a RF chip, etc. In one example, the wireless communications device may be configured to buffer one or more values associated with an input signal. The signal prediction module may be configured to predict a system response to at least a portion of the one or more buffered values, and generate a switcher control signal based on the system response. The signal prediction module may also generate a predicted supply voltage from the values associated with the input signal.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: August 18, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jifeng Geng, Daniel Fred Filipovic
  • Patent number: 9048848
    Abstract: A phase-locked loop circuit using a multi-curve voltage-controlled oscillator (VCO) having a set of operating curves, each operating curve corresponding to a different frequency range over a control voltage range. The phase-locked loop circuit includes a phase and frequency detector driving a charge pump and a digital control circuit configured to perform a closed loop curve search operation to select one of the operating curves in the multi-curve VCO and to perform a curve tracking operation using the selected operating curve, the selected operating curve being used by the VCO to generate an output signal with an output frequency being equal or close to a target frequency of the phase-locked loop. In one embodiment, the digital control circuit increases the charge pump current above a nominal current value during the closed loop curve search operation and set the charge pump current to the nominal current during the curve tracking operation.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: June 2, 2015
    Assignee: Micrel, Inc.
    Inventors: Juinn-Yan Chen, Wei-Kang Cheng
  • Publication number: 20150130522
    Abstract: A voltage controlled oscillator (VCO) includes a sensing circuit, where the sensing circuit is configured to generate a plurality of compensation control signals. The VCO further includes a voltage-to-current converter comprising a plurality of current sources which are configured to generate a current signal in response to the plurality of compensation control signals. Additionally, the VCO includes a plurality of switching circuits, each of the plurality of switching circuits being configured to selectively enable or disable a corresponding one of the plurality of current sources in response to a corresponding one of the plurality of compensation control signals. Furthermore, the VCO includes a current controlled oscillator configured to generate an oscillating signal in response to the current signal.
    Type: Application
    Filed: January 26, 2015
    Publication date: May 14, 2015
    Inventors: Matt LI, Min-Shueh YUAN, Chih-Hsien CHANG
  • Publication number: 20150091658
    Abstract: An injection locked frequency divider includes a ring oscillator, an input terminal, an output terminal and a control voltage terminal. The ring oscillator has a three-stage cascade connection of a first amplification circuit including an N-channel MOS type transistor and P-channel MOS type transistors, a second amplification circuit configured in the same manner as the first amplification circuit and a third amplification circuit configured likewise. A high frequency signal is input to a gate terminal of each P-channel MOS type transistor. A predetermined DC control voltage is supplied to a gate terminal of each P-channel MOS type transistor.
    Type: Application
    Filed: February 24, 2014
    Publication date: April 2, 2015
    Inventors: Takahiro Shima, Hiroshi Komori, Takeaki Watanabe
  • Publication number: 20140247093
    Abstract: It is an object of the present invention to provide a phase locked loop in which a voltage signal input to a voltage controlled oscillator after a return from a stand-by state becomes constant in a short time and power consumption is reduced. A transistor including a semiconductor layer formed using an oxide semiconductor material is provided between an input terminal of a voltage controlled oscillator and a capacitor of a loop filter. The transistor is turned on in a normal operation state and turned off in a stand-by state.
    Type: Application
    Filed: May 13, 2014
    Publication date: September 4, 2014
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Kazunori WATANABE
  • Publication number: 20140232473
    Abstract: An ADPLL includes a digital controlled oscillator, a first counter counting a number of clocks from the digital controlled oscillator, a second counter to count a multiplication number representing a number of the clocks in a reference clock, a TDC detecting a delayed amount of a phase of the clocks against a phase of the reference clock, an adder adding the delayed amount to a difference between the multiplication number and the number of clocks, a slew rate setting part setting a slew rate of the clocks, an ADC receiving the clocks to which the slew rate is set, a switching part switching between an output of the adder and an output of the ADC, and a controller controlling the slew rate by shifting a phase of the clocks to set a slew rate while the ADLL is locked by utilizing the TDC.
    Type: Application
    Filed: April 28, 2014
    Publication date: August 21, 2014
    Applicant: FUJITSU LIMITED
    Inventor: Atsushi Matsuda
  • Publication number: 20140085012
    Abstract: A novel and useful millimeter-wave digitally controlled oscillator (DCO) that achieve a tuning range greater than 10% and fine frequency resolution less than 1 MHz. Switched metal capacitors are distributed across a passive resonator for tuning the oscillation frequency. To obtain sub-MHz frequency resolution, tuning step attenuation techniques are used that exploit an inductor and a transformer. A 60-GHz fine-resolution inductor-based DCO (L-DCO) and a 60 GHz transformer-coupled DCO (T-DCO), both fabricated in 90 nm CMOS, are disclosed. The phase noise of both DCOs is lower than ?90.5 dBc/Hz at 1 MHz offset across 56 to 62 GHz frequency range. The T-DCO achieves a fine frequency tuning step of 2.5 MHz, whereas the L-DCO tuning step is over one order of magnitude finer at 160 kHz.
    Type: Application
    Filed: September 16, 2013
    Publication date: March 27, 2014
    Applicant: Technische Universiteit Delft
    Inventors: Wanghua Wu, John Robert Long, Robert Bogdan Staszewski
  • Publication number: 20140085011
    Abstract: The inventive concept relates to a supply regulated voltage controlled oscillator having a function of an active loop filter by sharing one operational amplifier without additional use of active elements in a supply regulated voltage controlled oscillator using an operational amplifier as a supply regulator, and a phase locked loop using the same.
    Type: Application
    Filed: June 25, 2013
    Publication date: March 27, 2014
    Inventors: Woo-Young Choi, Kwang-Chun Choi
  • Publication number: 20140002197
    Abstract: An oscillator arrangement comprises a current controlled oscillator, a frequency to voltage converter, and an operational amplifier. The current controlled oscillator is adapted to generate a clock signal based on a control voltage signal, wherein the generated clock signal is supplied to the frequency to voltage converter. The frequency to voltage converter is adapted to generate an output voltage signal based on the generated clock signal and based on a supply voltage signal.
    Type: Application
    Filed: June 27, 2013
    Publication date: January 2, 2014
    Inventors: Manoj Kumar Patasani, Ronak Prakashchandra Trivedi
  • Publication number: 20130335149
    Abstract: The disclosed embodiments provide a resonant oscillator circuit. The resonant oscillator circuit includes a clipping mechanism configured to clip an output voltage of a signal pulse generated by the resonant oscillator circuit to a predefined constant level. The resonant oscillator circuit also includes a feedback path configured to return energy from the clipping mechanism to an input of the resonant oscillator circuit.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 19, 2013
    Applicant: APPLE INC.
    Inventors: William C. Athas, Catherine S. Chou
  • Publication number: 20130271226
    Abstract: Oscillators are described that have a highly stable output frequency versus the variation of supply voltage and different operating conditions such as temperature. The concepts are broadly applicable to various types of oscillators. The highly stable output is achieved with the use of self biasing loops. The circuits associated with providing constant harmonic output current can be used with the concept of a phi-null oscillator to further stabilize the output frequency.
    Type: Application
    Filed: July 2, 2012
    Publication date: October 17, 2013
    Applicant: SI-WARE SYSTEMS INC.
    Inventor: Nabil Mohamed Sinoussi
  • Publication number: 20130194043
    Abstract: In one embodiment, a voltage-controlled oscillator (VCO) is provided that includes: a plurality of differential inverters coupled to form a loop, each differential inverter having a differential pair of transistors configured to steer a tail current from a current source, the current source sourcing the tail current responsive to a bias voltage, wherein each transistor in the differential pair couples to a power source through a corresponding switching-capacitor circuit; and a bias circuit configured to generate the bias voltage such that a transconductance for each transistor in the differential pairs is proportional to a factor that is a function of a ratio of transistor widths within the bias circuit.
    Type: Application
    Filed: January 26, 2012
    Publication date: August 1, 2013
    Applicant: TagArray, Inc.
    Inventor: Mohammad Ardehali
  • Publication number: 20130141171
    Abstract: An oscillator circuit includes an amplifier including at least two terminals for receiving a crystal and an automatic amplitude control loop coupled to the amplifier including biasing circuitry switched between a first operational mode and a second operational mode. The first operational mode occurs during an initial time period and the second operational mode occurs after the initial time period is expired. The biasing circuitry includes first and second PMOS transistor circuits, each transistor circuit including an unswitched PMOS transistor and a switched PMOS transistor. Alternatively, the biasing circuitry can include first and second NMOS transistor circuits, each transistor circuit including an unswitched NMOS transistor and a switched NMOS transistor. The biasing circuitry is under control of an internally generated control signal.
    Type: Application
    Filed: December 28, 2010
    Publication date: June 6, 2013
    Inventors: Shuiwen Huang, Lin Huang
  • Publication number: 20130120071
    Abstract: A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning voltage. The tuning voltage range extension circuit is configured to selectively change current supplied by the first path as the tuning voltage exceeds a capacity threshold of the first transistor.
    Type: Application
    Filed: November 11, 2011
    Publication date: May 16, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Swarna L. Navubothu, Cheng Zhong, Nam V. Dang, Xiaohua Kong
  • Publication number: 20120249248
    Abstract: An adjustable-frequency oscillator, is formed by two looped systems, functioning at the same frequency but the signals are phase shifted by 90°. Each looped system includes a phase shift device, an active element providing the gain and a resonator having a fixed phase-frequency characteristic. As the phase shift in each loop is imperatively a whole multiple of 2?, the phase shift added in each loop by the phase shift device entails that each resonator introduces a complementary phase shift to comply with the oscillation criterion. This complementary phase shift is produced at a frequency defined by the resonator, this then defining the frequency of oscillation. The frequency is adjusted by two phase shift stages, which carry out the analogue multiplication of the signals coming from the two looped systems by control voltages and the summing of these products.
    Type: Application
    Filed: September 22, 2011
    Publication date: October 4, 2012
    Inventor: Patrick Magajna
  • Publication number: 20120194278
    Abstract: A thermally-compensated oscillator has a current reference with an output current which relates to an ambient temperature with a first relationship, a ring oscillator having an operating frequency which relates to the ambient temperature with a second relationship, and which receives the output current of the current reference and outputs an oscillator signal, and a level shifter which receives the oscillator signal from the ring oscillator and outputs a corresponding voltage-regulated clock signal.
    Type: Application
    Filed: January 27, 2011
    Publication date: August 2, 2012
    Applicant: NXP B.V.
    Inventors: Martin BUGBEE, Andrew BURTT
  • Publication number: 20120063504
    Abstract: An oscillator may include a crystal resonator, an inverter coupled in parallel with the crystal resonator, a first switched capacitor coupled to a first terminal of the crystal resonator, a second switched capacitor coupled to a second terminal of the crystal resonator, a control module configured to output a periodic dithering signal, the periodic dithering signal having a first pulse width based on a desired frequency of oscillation for the oscillator, and a delay module configured to communicate a first periodic enable signal to enable the first switched capacitor and a second periodic enable signal to enable the second switched capacitor. At least one of the first periodic enable signal and the second periodic enable signal may have a second pulse width greater than the first pulse width. The second periodic enable signal may be phase delayed relative to the first periodic enable signal by a non-zero delay.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 15, 2012
    Inventors: John Simmons, Kristopher Kaufman
  • Publication number: 20120038425
    Abstract: A resonance part of a voltage controlled oscillator (VCO) includes variable capacitance elements where an electrostatic capacitance changes in order to adjust a resonance frequency and an inductance element, and a transistor of grounded emitter type amplifies a frequency signal inputted from the resonance part to a base terminal. A feedback part includes capacitance elements for feedback, and feedbacks a frequency signal outputted from an emitter terminal of the transistor to the transistor via the base terminal. Besides, base bleeder resistances for adjusting a bias voltage to be applied to the base terminal and the transistor are formed in a common integrated circuit, and an emitter resistance is provided outside the integrated circuit as a resistance element being a different body in order to adjust an operating point of the transistor.
    Type: Application
    Filed: August 4, 2011
    Publication date: February 16, 2012
    Applicant: Nihon Dempa Kohyo Co., Ltd.
    Inventor: Junichiro Yamakawa
  • Patent number: 8044724
    Abstract: The subject innovation relates to systems and/or methodologies for generating a low jitter large frequency tuning LC-based phase-locked loop circuit for multi-speed clocking applications. In addition to a plurality of noise reduction features, the phase-locked loop includes programmable charge pump and loop filter that enable a wide loop bandwidth, a programmable VCO that enables a wide VCO frequency range and a per lane clock divider that further enables a wide PLL frequency range. Furthermore, an auto-calibration circuit ensures that the VCO included in the PLL receives the optimum current for noise reduction across the VCO frequency range.
    Type: Grant
    Filed: April 27, 2009
    Date of Patent: October 25, 2011
    Assignee: MoSys, Inc.
    Inventors: Chethan Rao, Alvin Wang, Shaishav Desai
  • Patent number: 8031027
    Abstract: A voltage-controlled oscillator includes a voltage regulator, and a delay unit. The voltage regulator independently receives a first oscillation control signal and a second oscillation control signal to provide a regulated voltage signal which is represented by a regular ratio of combination of the first and second oscillation control signals, and the regulated voltage signal is feedback to the voltage regulator. The delay unit generates an output signal having a frequency varying in response to the regulated voltage signal.
    Type: Grant
    Filed: June 5, 2009
    Date of Patent: October 4, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Park, Jong-Shin Shin
  • Publication number: 20110227655
    Abstract: In a crystal-oscillator circuit having a quartz crystal unit, further stabilization of output frequency change at a time of startup of the power supply is achieved. A crystal-oscillator circuit having a quartz crystal unit includes a first variable-capacitance element, which forms an oscillation loop with the quartz crystal unit, and a temperature compensation circuit which provides a first control signal for the first variable-capacitance element to compensate for a temperature characteristic of the quartz crystal unit. In addition, the crystal-oscillator circuit includes a second variable-capacitance element group, and a time constant circuit which provides a time constant signal, which changes with a predetermined time constant, for the second variable-capacitance element group as a second control signal.
    Type: Application
    Filed: January 12, 2011
    Publication date: September 22, 2011
    Inventors: Kei NAGATOMO, Hisato Takeuchi, Shuuji Shibuya
  • Patent number: 7961055
    Abstract: A phase locked loop circuit includes an oscillator part configured to generate a reference signal by amplifying a signal generated by an oscillator, and a phase locked loop part configured to include a filter that outputs a control signal to a clock transmitting circuit that generates a clock signal in accordance with a phase difference between the reference signal and a feedback signal, wherein a drive capability of the oscillator part is controlled in accordance with the control signal.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: June 14, 2011
    Assignee: Fujitsu Semiconductor Limited
    Inventors: Shinji Miyata, Masahiro Tanaka
  • Patent number: 7956695
    Abstract: A voltage-controlled oscillator operates at high frequency without high gain by dividing the frequency range into a plurality of subranges, which preferably are substantially equal in size. Within any subrange, the full extent of variation in the control signal changes the frequency only by the extent of the subrange. The gain is thus substantially equal to the gain one would expect for the full frequency range, divided by the number of subranges. The subrange may be selected manually, or by an initial calibration process. In one embodiment, the oscillator includes a voltage-to-current converter and a current-controlled oscillator, with a current mirror arrangement. In that embodiment, selection of the subrange may be controlled by turning on the correct number of current legs.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: June 7, 2011
    Assignee: Altera Corporation
    Inventors: Weiqi Ding, Mengchi Liu
  • Patent number: 7944312
    Abstract: This disclosure relates to a Phase-Locked Loop (PLL) device and a method for providing a stable free-running voltage signal to a voltage controlled oscillator.
    Type: Grant
    Filed: February 12, 2009
    Date of Patent: May 17, 2011
    Assignee: Infineon Technologies AG
    Inventor: Igor Ullmann
  • Patent number: 7940139
    Abstract: In a voltage-controlled oscillator capable of broadening a variable frequency range while suppressing increase of conversion gain, a converter (12) converts an input voltage to a first physical quantity, a variable converter (13) supplies a second physical quantity that accords with the status of each switch of a switch group (13a). another variable converter (14), when the input voltage is contained within a prescribed voltage range, supplies a third physical quantity that accords with the input voltage and the status of each switch of another switch group (14a), and a variable-frequency oscillator (15) supplies a signal of a frequency that accords with the first physical quantity, the second physical quantity, and the third physical quantity.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: May 10, 2011
    Assignee: NEC Corporation
    Inventor: Hiroshi Kodama
  • Patent number: 7928806
    Abstract: Provided is a low voltage frequency synthesizer using a boosting method for a power supply voltage of a charge pump. The low voltage frequency synthesizer includes a phase/frequency detector (PFD) that receives and compares a reference frequency and a feedback frequency to output a comparison signal, a charge pump that receives the comparison signal to output a current corresponding to the comparison signal, a low-pass filter (LPF) that generates a voltage corresponding to the output current of the charge pump, a voltage controlled oscillator (VCO) that receives the voltage of the LPF, amplifies the voltage to generate a boosting voltage, and outputs a frequency corresponding to the received voltage, and a DC converter that receives the boosting voltage of the VCO, converts the boosting voltage into a DC voltage, and applies the DC voltage as a power supply voltage of the charge pump.
    Type: Grant
    Filed: September 17, 2009
    Date of Patent: April 19, 2011
    Assignees: Electronics and Telecommunications Research Institute, Korea Advanced Institute of Science and Technology
    Inventors: Hui Dong Lee, Kwi Dong Kim, Jong Kee Kwon, Jong Pil Hong, Sang Gug Lee
  • Patent number: 7872536
    Abstract: A variance correction method includes generating a reference current depending on a resistance within a lowpass filter and outputting the reference current to a voltage controlled oscillator, and correcting characteristics of the lowpass filter and a gain of the voltage controlled oscillator based on an output clock of the voltage controlled oscillator.
    Type: Grant
    Filed: July 9, 2009
    Date of Patent: January 18, 2011
    Assignee: Fujitsu Limited
    Inventors: Toshihiko Mori, Masafumi Kondo
  • Patent number: 7839220
    Abstract: In a circuit having a runaway detector coupled to a phase-locked loop (PLL), the PLL may include a loop filter to receive a control voltage within the PLL and provide a filtered control voltage and a voltage-controlled oscillator to receive the filtered control voltage and provide an output clock signal. The runaway detector may provide a control signal for adjusting the filtered control voltage in response to a predetermined PLL condition. The runaway detector may include a comparator to receive a first and second input voltages, where the second input voltage is based on the output clock signal. When the predetermined PLL condition exists, the runaway detector may be active to adjust the filtered control voltage, thereby enabling the PLL to return to a lock condition.
    Type: Grant
    Filed: May 2, 2007
    Date of Patent: November 23, 2010
    Assignee: Marvell Israel (M. I. S. L.) Ltd.
    Inventor: Mel Bazes
  • Patent number: 7825737
    Abstract: A frequency phase locked loop (FPLL) includes a first feedback loop coupled to a second feedback loop. The first feedback loop is configured to correct a phase offset of an output signal of the FPLL. The second feedback loop is configured to correct a frequency offset of the output signal of the FPLL.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: November 2, 2010
    Assignee: Marvell International Ltd.
    Inventors: Steve Fang, Chi Fung Cheng
  • Patent number: 7791417
    Abstract: A mixed-mode PLL is disclosed. The mixed-mode PLL comprises an analog phase correction path and a digital frequency correction path. The analog phase correction path comprises a linear phase correction unit (LPCU). The digital frequency correction path comprises a digital integral path circuit.
    Type: Grant
    Filed: January 7, 2009
    Date of Patent: September 7, 2010
    Assignee: MediaTek Inc.
    Inventors: Ping-Ying Wang, Jing-Hon Conan Zhan
  • Patent number: 7786810
    Abstract: A phase locked loop with a current leakage adjustment function is provided. The phase locked loop includes a phase locked loop unit having a compensation voltage node, a digitalized leakage-detection circuit generating a plurality of digital control signals based upon the phase error between a reference clock signal and a feedback signal, and a compensation circuit generating a compensation current based upon the plurality of digital control signals. When there exist current leakages of the MOS capacitors, the current leakage adjustment circuits provided by the present invention may prevent the conventional phase locked loop from un-locking due to jittering.
    Type: Grant
    Filed: November 25, 2008
    Date of Patent: August 31, 2010
    Assignee: National Taiwan University
    Inventors: Shen-Iuan Liu, Jung-Yu Chang, Chao-Ching Hung
  • Publication number: 20100214027
    Abstract: A method for compensating an oscillation frequency, a device, and a phase locked loop (PLL) is applied in the LC oscillating loop, including: sending voltage control signals to one end of a variable capacitor of an LC oscillating loop to generate oscillating signals in the LC oscillating loop through the voltage control signals; obtaining variable bias voltage that reflects changes of external parameters; and sending the variable bias voltage to the other end of the variable capacitor to compensate changes to the oscillation frequency of oscillation signals generated in the LC oscillating loop. This invention compensates the changes to the oscillation frequency of the circuit that contains the LC oscillating loop and improves the stability of the circuit oscillation frequency by sending bias voltage to one end of the variable capacitor of the LC oscillating loop.
    Type: Application
    Filed: January 25, 2010
    Publication date: August 26, 2010
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Hongquan Sun
  • Publication number: 20100214025
    Abstract: A low jitter and wide-range frequency synthesizer for low voltage operation includes a detector to generate a detection signal based on a logic level difference between an input signal and a feedback signal, a charge pump to generate a control signal based on the detection signal, a filter to generate a tuning signal based on the control signal, a bias circuit to generate a first bias signal and a second bias signal based on the tuning signal, a controllable oscillator to generate a differential output signal based on the first and the second bias signals, a differential to single ended converter to convert the differential output signal into an output signal, and a programmable frequency divider to generate the feedback signal based on the output signal.
    Type: Application
    Filed: February 18, 2010
    Publication date: August 26, 2010
    Applicant: Sunplus Technology Co., Ltd.
    Inventors: Chun-Liang Chen, Hui-Chun Hsu
  • Publication number: 20100214026
    Abstract: A voltage controlled oscillator-phase lock loop (VCO-PLL) system includes a voltage controlled oscillator (VCO) system implementing four-channel architecture, such that two bands support two channels; a phase-locked-loop (PLL) system; and a mixer system. The VCO system further includes a control circuit; a first cross-coupled oscillator system adapted to receive a source voltage; a second cross-coupled oscillator system adapted to receive the source voltage; and a plurality of isolation buffer systems adapted to protect the first and second cross-coupled oscillator systems.
    Type: Application
    Filed: October 10, 2008
    Publication date: August 26, 2010
    Applicant: Georgia Tech Research Corporation
    Inventors: Padmanava Sen, Saikat Sarkar, Stephane Pinel, Joy Laskar, Francesco Barale
  • Patent number: 7746177
    Abstract: Self-biased bipolar ring-oscillator phase-locked loops with a wide tuning range are disclosed. In a particular example, an apparatus to provide a phase-locked loop is described, comprising a voltage-controlled oscillator (VCO) to provide an output clock signal having a frequency, a quantizer, a phase-frequency detector to generate an adjustment signal, and a charge pump to modify the control voltage. The example VCO includes several ring-oscillator stages, where each ring-oscillator stage includes several gain stages to provide several output currents based on a comparison of a control voltage and several corresponding threshold voltages. The example quantizer includes several comparators to generate digital signals based on the output currents. The example charge pump modifies the control voltage based on the digital signals and the adjustment signal, and includes several switching elements to increase or decrease current to the charge pump based on the digital signals.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: June 29, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Zhiheng Cao, Robert Floyd Payne
  • Patent number: 7728678
    Abstract: A semiconductor device includes a voltage control and oscillation circuit oscillating at a frequency according to a first control voltage to output an oscillation signal, a frequency/voltage conversion circuit receiving the oscillation signal from the voltage control and oscillation circuit and converting a frequency of the oscillation signal into a voltage, a control voltage generation circuit generating a new second control voltage having a level between that of the voltage converted by the frequency/voltage conversion circuit and that of a second control voltage generated previously, and an analog integration circuit integrating the second control voltage to generate the first control voltage and outputting the first control voltage to the voltage control and oscillation circuit.
    Type: Grant
    Filed: October 17, 2008
    Date of Patent: June 1, 2010
    Assignee: Renesas Technology Corp.
    Inventor: Katsuyoshi Mitsui
  • Patent number: 7728686
    Abstract: A digital-controlled oscillator (DCO) is utilized in an all-digital phase-locked loop for eliminating frequency discontinuities. The DCO includes a tank module and a negative gm cell. The tank module comprises a plurality of cells, at least a portion of the cells comprising a first tracking set and a second tracking set for respectively handling an odd bit or an even bit. The odd bit and the even bit are related to an integer signal, a fractional signal or a combination thereof, the fractional signal is indicated by a primary voltage inputted to the DCO. With the DCO, frequency discontinuities and undesired spurs are eliminated.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: June 1, 2010
    Assignee: Mediatek Inc.
    Inventors: Jing-Hong Conan Zhan, Ping-Ying Wang, Hsiang-Hui Chang
  • Patent number: 7710206
    Abstract: A design structure embodied in a machine readable medium used in a design process includes a current controlled, phase locked loop device having a phase detector configured to compare a reference frequency to an output frequency of a current controlled oscillator (ICO), a charge pump coupled to the phase detector and a low pass filter coupled to the charge pump. A voltage to current (V to I) converter is coupled to the low pass filter, providing an output current for integral control of the ICO. A control circuit is coupled to the ICO, and receives increment and decrement outputs of the phase detector, wherein the control circuit is configured to provide proportional control of the ICO through an amount of bias current applied thereto.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: May 4, 2010
    Assignee: International Business Machines Corporation
    Inventors: Ram Kelkar, Anjali R Malladi
  • Patent number: 7688122
    Abstract: In particular embodiments, a charge pump includes a first input transistor operable to receive an up signal and in response to receiving the UP signal, transmit a corresponding output current from a positive power supply to an output node. The charge pump further includes a second input transistor operable to receive a down signal and in response to receiving the DN signal, transmit a second corresponding output current from a negative power supply to the output node. Additionally, the charge pump includes a first cascode transistor and a second cascode transistor positioned in a first current path between the first input transistor and the output node, and a third cascode transistor and a fourth cascode transistor positioned in a second current path between the second input transistor and the output node. The charge pump further includes a current mirror coupled to gates of the first, second, third, and fourth cascode transistors.
    Type: Grant
    Filed: January 7, 2008
    Date of Patent: March 30, 2010
    Assignee: Fujitsu Limited
    Inventor: Nikola Nedovic
  • Patent number: 7675367
    Abstract: A design structure for an integrated circuit including a phase-locked loop (PLL) circuit responsive to a voltage controlled oscillator (VCO) frequency band selection circuit that provides automatic frequency band selection in real time to account for run-time variations, such as power supply and temperature variations over time. The PLL includes a charge pump and an LC tank circuit that provides the automatic frequency band selection based on a VCO control voltage signal supplied by the charge pump.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: March 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Kai D. Feng, Anjali R. Malladi
  • Publication number: 20100052746
    Abstract: A voltage-controlled oscillator includes a voltage regulator, and a delay unit. The voltage regulator independently receives a first oscillation control signal and a second oscillation control signal to provide a regulated voltage signal which is represented by a regular ratio of combination of the first and second oscillation control signals, and the regulated voltage signal is feedback to the voltage regulator. The delay unit generates an output signal having a frequency varying in response to the regulated voltage signal.
    Type: Application
    Filed: June 5, 2009
    Publication date: March 4, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Jae-Hyun Park, Jong-Shin Shin
  • Patent number: 7656235
    Abstract: A communication system and an oscillation signal provision method based thereon are provided. In the communication system, a high frequency oscillator generates a first high frequency signal upon receipt of an enable signal. The first high frequency signal is commonly shared by a first module and a second module. The first module is coupled to the high frequency oscillator, operating in either busy or idle mode, wherein the first module operates at the first high frequency signal when in busy mode. The second module converts the first high frequency signal to a second high frequency signal and operates at the second high frequency signal when in busy mode.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: February 2, 2010
    Assignee: Mediatek Inc.
    Inventors: Ti-wen Yuan, Chung-Shine Huang
  • Publication number: 20100013563
    Abstract: A voltage-controlled oscillator (VCO) circuit includes a level shifter, and a semiconductor device includes the VCO circuit. The VCO circuit includes an input voltage receiver, a current mirror, and a frequency oscillator. The input voltage receiver receives a first voltage input to the VCO circuit so as to generate a first current. The current mirror copies the first current so as to generate a second current. The frequency oscillator oscillates in response to the second current. The input voltage receiver includes a level shifter and a first current generator. The level shifter shifts a voltage level of the first voltage to a voltage level of a second voltage.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 21, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Ji-hyun Kim, Jung-hyeon Kim
  • Publication number: 20090278612
    Abstract: A gain circuit of an oscillator circuit includes an inverter portion having an input IN and an output OUT arranged for connection to an external feedback circuit comprising a pi network. A feedback member having a first resistive element is coupled between the input IN and output OUT. An offset sense and correction block (OSCB) is configured to detect a dc offset potential difference between said input IN and output OUT and to reduce the offset potential by supplying a current to said input IN.
    Type: Application
    Filed: May 6, 2008
    Publication date: November 12, 2009
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
    Inventor: Hong Sair LIM
  • Patent number: 7605667
    Abstract: A frequency synthesizer. The frequency synthesizer comprises a harmonic locked phase/frequency detector, a low pass filter, a voltage controlled oscillator, and a frequency divider. The harmonic locked phase/frequency detector receives a reference signal and a divided signal. The low pass filter is coupled to the harmonic locked phase/frequency detector. The voltage controlled oscillator is coupled to the low pass filter and provides an output signal. The frequency divider is coupled between the voltage controlled oscillator and the harmonic locked phase/frequency detector. Frequency of the divided signal is a harmonic frequency of the reference signal.
    Type: Grant
    Filed: December 7, 2007
    Date of Patent: October 20, 2009
    Assignees: Mediatek Inc., National Taiwan University
    Inventors: Shen-Iuan Liu, Chih-Hung Lee
  • Patent number: 7598815
    Abstract: Multiple carrier frequencies are provided from a phase locked loop, especially closely adjacent quadrature amplitude modulated subcarriers for multiplexed data communications. A quadrature voltage controlled oscillator (VCO) and cascaded frequency dividers provide feedback to a phase comparator to lock the VCO to a reference signal. In addition to frequency divider outputs for use as subcarriers, e.g., binary division factors of the VCO frequency, a quadrature mixer multiplies and adds corresponding quadrature components at two of the frequencies, to generate a differential signal at a difference frequency. The mixer may be outside of the feedback signal path but preferably is in the feedback path to suppress noise. A polyphase filter converts the mixer output to a quadrature signal useful as a subcarrier. The technique efficiently generates sequential integer multiples of a basic frequency, such as sixteen adjacent integer multiples of a frequency reference.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: October 6, 2009
    Assignee: Agere Systems Inc.
    Inventors: Jinghong Chen, Chunbing Guo, Fuji Yang
  • Publication number: 20090206936
    Abstract: A voltage-controlled oscillator is implemented with a succession of delay cells coupled in series to form an oscillator loop. The oscillator loop is supplied with reference voltages produced by a voltage generator. The reference voltages produce stable operation of the voltage-controlled oscillator. Cascode reference current generators are incorporated within the voltage generator to supply a cross-coupled arrangement of pull-up devices within each delay cell. The cross-coupled pull-up devices are instrumental in producing complementary output signaling from each delay cell. A pair of cascode current generators is configured in parallel to produce a magnitude of current according to an applied voltage and be selectable for dual or single operation with a corresponding frequency determination.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 20, 2009
    Applicant: SpectraLinear, Inc.
    Inventors: Francisco Fernandez, Alexei Shkidt