Abstract: An improvement in a phase locked loop comprising a VCO for generating a signal S.sub.VCO of frequency f.sub.VCO, a divider for dividing f.sub.VCO to produce a signal S.sub.N of frequency f.sub.N, a reference signal generator for generating a reference signal S.sub.R of frequency f.sub.R, and with said VCO responsive to a particular value E.sub.c of a variable control signal e.sub.c to cause f.sub.N =f.sub.R for a given value of N, the improvement consisting of a phase/frequency detector for detecting and correcting frequency and phase differences between S.sub.N and S.sub.R to cause f.sub.N =f.sub.R and comprising a three stage left/right shift register responsive to one of signals S.sub.N or S.sub.R to shift binary O's into the first stage thereof in the right direction and responsive to the other of signals S.sub.N or S.sub.R to shift binary 1's into the third stage thereof in the left direction.

Abstract: An adjustable frequency synthesizer primarily for use in an atomic frequency standard of the type used for stabilizing a frequency source by locking it to the hyperfine transition resonance of an atomic frequency resonator. The synthesizer is programmable by an externally applied code to provide the proper frequency, electromagnetic resonance field to the atomic frequency resonator. The synthesizer also provides a phase locked frequency modulating signal to produce the resonance deviation signal in the resonator. The broad range and fine frequency increments of the synthesizer permit accommodation of a wide range of resonance frequencies in the atomic frequency resonator to obviate resonator gas pressure and magnetic field variations which would otherwise decrease the production yield of such resonators.

Abstract: A non-linear phase detector is disclosed which compensates for gains occuring during tuning a frequency generator of a known phase locked loop circuit which incorporates a Varactor tuned resonant circuit as a VCO. The phase detector is of the sample and hold type and incorporates a Varactor rather than a hold capacator to compensate for non-linear gains which occur when tuning the frequency generator across its band spread. Additionally, bias compensation is provided for the resonant circuit Varactor to offset its contact potential.

Abstract: A combining and filter circuit is provided to connect the acquisition circuit and phase detector circuit to the voltage controlled oscillator in a phase locked loop. The combining and filter circuit includes twin-T filters for removing reference frequency signals. An output circuit includes series resistors and capacitors, and reverse poled Schottky diodes which provide rapidly changing acquisition signals that are relatively noise free.

Abstract: The voltage controlled oscillator (VCO) in a phase-locked loop carrier recovery circuit is provided with two control signals, one based upon a phase error between the phase modulated carrier and VCO output and the other based upon a frequency error between the phase modulated carrier and VCO output.

Abstract: Disclosed is an integrated circuit voltage controlled astable multivibrator with external fixed components: resistor RT and capacitor CT. The multivibrator has a center frequency which is a function of: the value of capacitor CT, the amplitude of a constant current Il used to charge and discharge capacitor CT, and a voltage VT. The period timed is proportional to VT/Il where VT is half the voltage swing across capacitor CT. Undesired frequency variations are minimized by generating both current Il and voltage VT in similar matched networks and from the same voltage source so that Il and VT track each other.

Abstract: Disclosed is a microwave frequency generator for producing a microwave signal with high frequency accuracy, high spectral purity, low noise and high frequency stability. It is known to phase lock the fundamental microwave oscillator to a highly stable crystal oscillator at lower frequency and convert to a higher output frequency with a multiplier or harmonic generator but fm noise is also multiplied. The present invention avoids this problem by using MESFET frequency dividers to phase lock a microwave oscillator to a stable reference oscillator without the need for frequency multipliers. The MESFET frequency divider provides signal gain instead of loss during operation.

Abstract: A phase detector generates an error signal by comparing an input data rate F:in with an output clock rate F:out. The error signal is amplified and applied to the base of an emitter follower circuit. Current from a discharging capacitor within a clock ramp generator flows through the emitter follower and the emitter impedance. The ramp current is controlled by the error signal. The ramp rate F:out is determined by the peak to peak ramp voltage and by the rate of discharge of the ramp capacitor. Variations in the error signal due to F:in drift, cause a compensating change in F:out for continuously maintaining sync between F:in and F:out within each passband. Multi-passband capability is provided by a multi-level current generator which also supplies current through the emitter impedance. The ramp current is reduced to a lower level by an amount equal to the current from the multi-level current source due to the emitter follower action.

Abstract: A second-order phase-locked loop circuit which does not require error voltage amplification is described. The output of a voltage controlled oscillator is accurately phase locked to a reference pulse. The loop phase detector is periodically enabled by a pulse generator and draws current only when enabled. Therefore very little noise may be coupled to the voltage controlled oscillator. The phase detector incorporates a current amplifier which allows very accurate establishment of the instant phase comparison takes place.

Abstract: A circuit for controlling the frequency of a pulse generator associated with a microprocessor that is connected to power line frequency, uses an RC-stage which is connected ahead of the pulse generator as the frequency-determining element and which has a resistor 19 that is variable by a control signal derived from the microprocessor. The control signal is obtained by comparing the power line frequency and the pulse frequency with one another.

Abstract: A first frequency-to-voltage converter develops a first voltage representative of a standard frequency. A variable frequency source is provided to furnish a pulse sequence with constant-duration but variable repetition pulses. A frequency-to-voltage converter receives the pulse sequence to develop a second voltage representative of a total pulse energy generated in the pulse sequence per unit time. The deviation of the second voltage from the first voltage is detected by a comparator to control the variable frequency source to derive a desired frequency.

Abstract: A voltage controlled oscillator (VCO) and reference oscillator are connected in a phase locked loop with a first phase detector, loop switch, and acquisition sawtooth sweep circuit. A second phase detector and fast integrator circuit are connected to the VCO and reference oscillator in quadrature relation with respect to the first phase detector. As the acquisition sweep circuit sweeps the VCO, the fast integrator produces a signal whose magnitude increases as the swept VCO frequency approaches the frequency needed for the phase locked loop to achieve phase lock. When this signal magnitude exceeds a predetermined threshold, an output control signal is produced. This output control signal causes the loop switch to close and make the phase locked loop operational. A delay circuit is connected to the second phase detector and fast integrator. The delay circuit produces a delayed output at a predetermined time after the control signal is produced.

Abstract: A controlled oscillator comprises an amplifier including an active device, a filter network arranged in a feedback loop of the amplifier for providing regenerative feedback to sustain oscillation of the amplifier, and a source of control signals. Output oscillatory signals from the amplifier and output control signals from the control source are summed by a combining network to produce a resultant controlled signal, which is coupled to the filter network. Parasitic capacitances associated with output terminals of the amplifier and control source impart an unwanted phase shift to the controlled signal. A compensation signal derived from the oscillator is supplied to the combining network with a magnitude and phase to offset the unwanted phase shift, to thereby produce a phase compensated resultant controlled signal.

Abstract: A variable-frequency oscillator includes an oscillator portion coupled to a phase shifter and a controllable gain device for controlling the amount of phase-shifted signal reintroduced to the oscillator. The oscillator includes first and second transistors coupled at their emitters to a current source. The emitters of third and fourth transistors are coupled to bases of the first and second transistors, respectively. The base of the third transistor is coupled to a voltage source, and the base of the fourth transistor couples to the collector of the first to form a regenerative loop capable of oscillation. A parallel-resonant circuit is coupled between the collector of the first transistor and the voltage source for establishing a frequency-sensitive phase characteristic in the loop by which the quiescent frequency is determined. The phase shifter is coupled to a point on the regenerative loop.

Abstract: A phase-locked loop for PCM transmission systems has a phase comparator (20) which provides continuous regulation of the loop oscillator (30). When a PCM pulse signal is present, the phase comparator selectively compares the PCM and oscillator clock signal and generates an error signal which synchronizes the oscillator to the PCM frequency. During the absence of a PCM pulse, the phase comparator provides a high impedance output and oscillator synchronization is maintained by a loop filter (23). In the disclosed embodiment, the phase comparator is a dual section tristate gate (300).

Abstract: A tank circuit including a quartz vibrator and a phase shifter connected to the tank circuit for forming a vector signal e.sub.1 from the tank circuit and a vector signal e.sub.2 delayed a predetermined angle from the signal e.sub.1. A differential circuit is used to subtract e.sub.1 from e.sub.2 thus forming a difference signal e.sub.3. The delayed signal e.sub.2 is inverted by a phase inverting circuit to obtain two signals e.sub.2 and -e.sub.2 which are applied to an addition circuit where their relative amplitude ratio is controlled. The addition circuit adds signal e.sub.3 to the signals e.sub.2 and e.sub.3 whose relative amplitude ratio has been controlled for producing a sum signal which is fed back to the tank circuit.

Abstract: A first frequency-to-voltage converter develops a first voltage representative of a standard frequency. A variable frequency source is provided to furnish a pulse sequence with constant-duration but variable repetition pulses. A frequency-to-voltage converter receives the pulse sequence to develop a second voltage representative of a total pulse energy generated in the pulse sequence per unit time. The deviation of the second voltage from the first voltage is detected by a comparator to control the variable frequency source to derive a desired frequency.

Abstract: A circuit for extracting a clock pulse waveform from an input pulse waveform comprising a phase-locked loop including a phase comparator having a first input to which the input pulse waveform is supplied, a second input and an output which is coupled in cascade at least with a voltage controlled oscillator whose output is coupled to the second input of the phase comparator. The clock pulse waveform is provided at the output of the oscillator.

Abstract: An electronic phase locked loop circuit including a variable period sawtooth generator. The sawtooth generator receives digital reference clock signals and in response thereto generates sawtooth-shaped signals having the same period as said reference clock signals. A sample and hold circuit samples the sawtooth-shaped signals in response to one logical state of a sampling clock. A voltage controlled oscillator is coupled to the output of the sample and hold circuit and oscillates at a frequency proportional to the magnitude of the held sample. A feedback circuit generates the sampling clock by coupling the output of the voltage controlled oscillator to the sampling input of the sample and hold circuit.

Abstract: A phase comparator circuit arrangement is provided for controlling an electrical member on the basis of a control signal formed in accordance with the difference detected between a first waveform which is periodic and has a constant cyclic ratio, after it has locked on to a reference signal, and a second waveform which, after this locking on for which it serves as a reference, becomes non-periodic with a variable cyclic ratio for the purposes of exerting the said control. The circuit comprises a combination of a first bistable flip-flop circuit which receives the first and second waveforms respectively and which receives enabling voltages whose evolution is complementary between one input and the other. Means to subtract the waveform emitted by the first flip-flop circuit from the first waveform are provided to form the said signal for controlling the member.

Abstract: A current-mode output stage for a digital phase detector has its output current magnitude controllable, with the output polarity determined by the phase detector. Either two or three output states can be provided.

Abstract: A phase locked loop includes a variable frequency oscillator, a phase comparator for comparing the phase between an output signal derived from the variable frequency oscillator and a reference signal and for generating a control signal in response to the phase difference between the two signals for controlling the variable frequency oscillator, an indicator for indicating the phase difference between the signals, and a control circuit for varying the frequency of the variable frequency oscillator.

Abstract: An automatic frequency control circuit comprising two switching transistors with the emitter-collector paths thereof connected in series with each other between a power source and a reference voltage source, a horizontal synchronizing signal being commonly coupled to the bases of the switching transistors, an integrating circuit having an input terminal receiving a horizontal pulse signal and an output terminal connected to the emitter-collector juncture between said two switching transistors, a smoothing circuit to convert the output voltage of said integrating circuit into a d-c voltage, and a voltage controlled oscillator to produce a frequency output in accordance with the d-c output voltage of the smoothing circuit, the output of said oscillator being fed back to the input terminal of said integrating circuit.

Abstract: A digital clock signal tracks a pulse stream data signal by developing two phase-lock restorative voltages through a phase-locked loop circuit which control the loop VCO that generates the clock signal, one voltage, designated as fine, being developed through a digital up/down counter and a digital/analog converter whenever the phase difference between the two signals exceeds a first threshold, and the second voltage, designated as coarse being generated by combining with the fine voltage a voltage to reduce or increase its value before application to the VCO so that the altered control voltage rapidly restores phase-lock whenever the phase difference exceeds a second threshold greater than that of the first.

Abstract: A circuit is provided for synchronizing the oscillation U.sub.o of a pulsed oscillator with a reference oscillation U.sub.m of comparatively small amplitude. The reference oscillation is coupled into the oscillator and a phase control loop is provided in which a phase discriminator compares the phase relationship of both oscillations and provides a resulting control voltage for controlling an adjustable reactance for the frequency change of the pulsed oscillator during the leading edge of the pulse. A phase shifter, adjustable up to 180.degree., is connected between the oscillator and the phase discriminator. The output of the phase discriminator, which is highly resistive, is connected in a low-resistance manner to the adjustable reactance by way of an impedance converter, such as an emitter follower or a multi-stage wide-band amplifier.

Abstract: Disclosed is a variable frequency oscillator system having a very stable center frequency and adjustable over a wide range of frequency excursions. A pair of variable frequency oscillators (VFO) are fabricated on the same integrated circuit chip so that corresponding components have substantially identical characteristics. The first VFO and a highly stable crystal oscillator provide comparable frequency output signals to a phase locked loop which provides as its output a correction signal (voltage or current) to lock the first VFO to the crystal oscillator frequency. The frequency of the second VFO in turn will be essentially the same as that of the first because of similarities in components and operating conditions as well as sharing of the correction signal between the two VFO's. The output of the second VFO provides the local clock signal and can be varied further by a second correction signal. In one embodiment, the second correction signal is provided by a second phase locked loop.

Abstract: A tank circuit including a quartz vibrator and a phase shifter connected to the tank circuit for forming a vector signal e.sub.1 from the tank circuit and a vector signal e.sub.2 delayed a predetermined angle from the signal e.sub.1. A differential circuit is used to subtract e.sub.1 from e.sub.2 thus forming a difference signal e.sub.3. The delayed signal e.sub.2 is inverted by a phase inverting circuit to obtain two signals e.sub.2 and -e.sub.2 which are applied to an addition circuit where their relative amplitude ratio is controlled. The addition cicuit adds signal e.sub.3 to the signals e.sub.2 and e.sub.3 whose relative amplitude ratio has been controlled for producing a sum signal which is fed back to the tank circuit.

Abstract: An electronic phase detector circuit includes a variable period sawtooth generator. The sawtooth generator receives digital reference clock signals and in response thereto generates sawtooth-shaped signals having the same period as said reference clock signals. A sample and hold circuit samples the sawtooth-shaped signals in response to one logical state of a sampling clock. A voltage controlled oscillator is coupled to the output of the sample and hold circuit and oscillates at a frequency proportional to the magnitude of the held sample.

Abstract: A dual time constant, phase lock loop indicator is described which will respond in one manner to signals indicating an "unlocked" condition and respond in another, different manner to signals indicating a "locked" condition.

Abstract: A phase locked loop system is described which controls and locks the frequency of a UHF transmitter to a desired frequency without the need for complex circuitry. A voltage controlled oscillator provides an output signal at the desired frequency and is controlled by an error signal from a phase detector. A harmonic resonator connected to the phase detector is tuned to a frequency which is approximately equal to the desired frequency but is displaced therefrom slightly in frequency. A reference frequency source at a subharmonic of the desired frequency is coupled to the resonator and the output signal is also coupled to the phase detector so as to generate the error signal which locks the voltage controlled oscillation precisely at the desired frequency.

Abstract: An FM demodulator and detector suitable for integration including a phase locked loop for locking to an FM signal and recovering the modulating signal and squelch circuitry coupled to the phase locked loop for gating out the recovered modulating signal. The phase locked loop includes an emitter coupled multivibrator whose phase shifted output is applied together with the FM signal to the squelch circuitry for quadrature phase detection, followed by filtering to derive an indication signal for controlling the gating of the recovered modulating signal.

Abstract: A circuit for receiving an incoming RF signal incurring frequency drift and producing a local signal for tracking the incoming signal includes a phase-locked loop and means incorporated in the loop which compensate or correct for the frequency drift so as to maintain the loop locked on the incoming signal. The loop is defined by a phase detector, a DC amplifier and a voltage controlled oscillator connected in series. The correction means is coupled in parallel with the loop amplifier between the loop detector and amplifier at its one end and between the amplifier and a DC bias voltage supply terminal for the amplifier at its opposite end.

Abstract: A controlled oscillator comprises an amplifier including an active device, a filter network arranged in a feedback loop of the amplifier for providing regenerative feedback to sustain oscillation of the amplifier, and a source of control signals. A common load network is provided for oscillatory signals produced by the amplifier and for the control signals, and is coupled to the filter network. The common load network comprises amplifying means having a low input impedance relative to an impedance presented to the oscillatory and control signals by parasitic capacitances which may be associated with respective output terminals of the active device and the source of control signals.

Abstract: A current controlled ring oscillator is utilized in a phase locked loop system. The ring itself is comprised of lateral pnp current sources and Schottky clamped npn transistors to provide a frequency range of 4 megahertz at 50 microamp drive to 43 megahertz at 1 milliamp drive. The frequency of the ring oscillator is varied by varying the current injected into the ring.

Abstract: A frequency lock loop circuit has a pair of square-wave pulse generators which are clocked from a common input. The width of the pulses from the first generator is dependent on the frequency of the clocking signal; the width of the pulses from the second generator is dependent on a reference frequency. The difference in the width of the pulses from the two generators is fed back as an error signal to adjust the frequency of the clocking signal until the two waveforms are aligned. In a heterodyne receiver, the clocking signal may be the intermediate frequency signal from the mixer and it may then be adjusted by adjusting the frequency of the local oscillator in accordance with the pulse-width difference signal.

Abstract: Phase locked loop (PLL) circuit comprises, a phase detector including first and second cascade-connected differential pairs of transistors constituting an analog multiplier with each one of the differential pair transistors supplied with two inputs, a low pass filter for converting the detection output into a D.C. control voltage, and an emitter-coupled multivibrator including constant current sources for determining the oscillation frequency with a timing capacitor. The PLL circuit is provided with constant current adjusting means for variably setting or determining the current through a constant current source connected to the second differential pair of transistors and the currents through the current sources determining the oscillation frequency in a correlated manner through a common variable resistor. Thereby, dispersions in the loop gain of the PLL circuit are reduced.

Abstract: A current control circuit comprises a current proportional circuit having two terminals, the current of one terminal being a proportional relationship with the current of the other terminal. An output terminal coupled with the current proportional circuit and a load through which a controlled current flows, and a constant current source. A steering circuit to which a switching signal is applied, is provided between the two terminals of the current proportional circuit and the constant current source, in order to couple the constant current source to one of the two terminals in response to the switching signal.

Abstract: In a phase locking oscillator servosystem, the phase of a voltage controlled oscillator (VCO) is determined by a stored control voltage representative of phase error. Positive and negative constant current sources are switched to an integrator, which provides the control voltage, at times determined by a reference input signal and the fed back VCO output. The current sources are switched simultaneously to or away from the integrator in response to a predetermined condition and are switched individually away from or to the integrator in response to respective input and output signals. The conditions for switching are such that a sufficient time interval for switching circuit operation is established between said individual and simultaneous switchings.

Abstract: An FM tuner having an improved automatic frequency control circuit and designed for use in an AM-FM receiver is described. The tuner employs a mixer transistor and an oscillator transistor connected in circuit so that they form a single series path across the bias source. This feature permits one to control conduction in both transistors by control of one and thus simplifies both biasing and mode conversion. Preferably, the transistor bias source and the source of AFC control potential are consolidated to save decoupling components. When the base of the mixer transistor is connected to the source through a low d.c. impedance, the AFC potential is transferred (less the mixer junction drop) to the collector of the oscillator transistor, where it provides sensitive automatic frequency control action. The circuit design uses a minimum of components.

Abstract: A controlled oscillator suitable for construction largely in integrated circuit form includes an oscillating amplifier stage and a regenerative feedback loop including a resonant frequency determining element coupled to the amplifier stage for providing an oscillatory reference signal. A phase shift network is provided outside the loop for shifting the phase of the oscillatory signal a predetermined amount. A control circuit which is supplied with the phase shifted oscillatory signal to produce anti-phase signal outputs is responsive to control signal representative of the phase and/or frequency of a predetermined reference signal for selecting portions of the anti-phase output signals. A combining network sums the oscillatory signal and the selected portions from the control circuit to produce a combined signal with a resultant phase which is supplied to the oscillating amplifier stage for maintaining the oscillatory signal in desired relation with the reference signal.

Abstract: A frequency-voltage converter using a charge-pump element and a pulse generating circuit stabilized in frequency of the output pulse signal by using the frequency-voltage converter for detecting the deviation or variation of the frequency of the output pulse signal.

Abstract: An oscillator suitable for use as a local oscillator of high frequency apparatus comprises a voltage controlled oscillator, a reference oscillator, a phase detector for detecting the phase difference between the oscillation frequencies of the voltage controlled oscillator and the reference oscillator, means for filtering the output of the phase detector to produce a DC voltage and a phase synchronizing loop for feeding back the DC output of the low-pass filter means to the voltage controlled oscillator. Depending upon whether the oscillation frequency of the reference oscillator is maintained at a duty cycle of 50% or at a value other than 50%, the oscillation frequency of the voltage controlled oscillator is synchronized with an odd multiple or an integer multiple of the oscillation frequency of the reference oscillator when the oscillation frequency of the voltage controlled oscillator is varied forcibly.

Abstract: A phase locked loop including a reference oscillator connected to one input of a loop phase detector the output of which is connected through an integrating low pass filter to a voltage controlled oscillator with the output of the voltage controlled oscillator being mixed with a second frequency and compared to the reference in the loop phase detector. The mixer output is also compared to an output of the reference oscillator shifted 90.degree. in a quadrature phase detector, the output of which controls a lock detector which in turn controls a fixed current sink. The fixed current sink is connected to the integrating low pass filter when the loop is in an unlocked condition so that a linear voltage, ramp signal is applied to the voltage controlled oscillator from the output of the integrating low pass filter.

Abstract: A voltage controlled oscillator circuit comprises a voltage controlled oscillator circuit, first and second constant-current circuits respectively for causing first and second constant currents, current dividing means for dividing the first constant current in accordance with an outside control voltage, and means for adjustably varying the control voltage. The oscillation frequency is controlled responsive to an input control current equal to the sum of one of the divided currents and the second constant current. The adjustment means causes an adjustment of the output currents of the current dividing means and of the free-running oscillation frequency.

Abstract: A circuit for locking an otherwise unstable oscillator to a frequency standard oscillation by the use of a discriminator and a differential amplifier, which amplifier produces a low-frequency output signal in response to a lack of synchronization between the oscillator being controlled and the reference oscillator.