Pulse Width Modulator Patents (Class 332/109)
  • Patent number: 10418950
    Abstract: Various embodiments of the present technology comprise a method and apparatus for a class-D amplifier. In various embodiments, the class-D amplifier operates to control an output signal during a start-up state to suppress a pop noise (start-up noise) without the need for a mute switch. The class-D amplifier may utilize a transition signal during the start-up state to prime or otherwise stabilize the output signal to suppress the pop noise.
    Type: Grant
    Filed: May 9, 2018
    Date of Patent: September 17, 2019
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Toru Dan
  • Patent number: 10374590
    Abstract: Provided is a pulse density modulation value converter, comprising: a pulse density modulation reference point storage for storing a plurality of pulse density modulation reference points, each pulse density modulation reference point comprising a linear pulse density modulation value, an actual pulse density modulation value and/or an integral non-linear error value, wherein the integral non-linear error value is the difference between the actual pulse density modulation value and the linear pulse density modulation value; and a pulse density modulation value calculator for receiving a linear pulse density modulation value, searching the pulse density modulation reference point storage for a pair of pulse density modulation reference points closest to the linear pulse density modulation value, obtaining an actual pulse density modulation value corresponding to the linear pulse density modulation value through linear interpolation on the basis of the pair of pulse density modulation reference points, and outp
    Type: Grant
    Filed: June 28, 2016
    Date of Patent: August 6, 2019
    Assignee: Intel Corporation
    Inventors: Fanzhong Wu, Zhigang Li, Jie Yan
  • Patent number: 10348282
    Abstract: This application relates to time-encoding modulators (TEMs). A TEM (100) receives an input signal (SIN) and outputs a time encoded signal (SPWM). A comparator (101) is located within a forward signal path of a feedback loop of the TEM. Also in the feedback loop are a filter (104) and a delay element (106) for applying a controlled delay. In some embodiments a latching element (101, 302; 106, 402) is located within the forward signal path to synchronize any signal transitions output from the latching element to a received first clock signal. Any signal transitions in the output (SOUT) from the modulator are thus synchronized to the first clock signal. In some embodiments the delay element (106) is a digital delay element which is synchronized to the first clock signal.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: July 9, 2019
    Assignee: Cirrus Logic, Inc.
    Inventor: John Paul Lesso
  • Patent number: 10313792
    Abstract: This application relates to methods and apparatus for digital microphones. Disclosed is a digital microphone apparatus (300) for outputting a digital output signal (DATA) at a sample rate defined by a received clock signal (CLK). The apparatus includes a band splitter (302) configured to receive a microphone signal (SMD) indicative of an output of a microphone transducer and split said microphone signal into first signal path (SP1) for frequencies in a first band and a second signal path (SP2) for frequencies in a second band, the frequencies of the second band being higher than the frequencies in the first band. A modulation block (304) is configured to operate on the second signal path to apply a selective gain modulation to signals in the second signal path.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: June 4, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, John Laurence Melanson
  • Patent number: 10290573
    Abstract: A semiconductor device with low power consumption is provided. The semiconductor device can serve as a current output DA converter. The semiconductor device converts a current corresponding to a digital signal into a voltage and then holds the voltage, which allows output of the analog voltage even after stopping supply of the current. A plurality of circuits that converts a current into a voltage is provided, whereby a settling time for changing the analog output voltage is reduced.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: May 14, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Masashi Fujita
  • Patent number: 10257612
    Abstract: This application relates to methods and apparatus for digital microphones. Disclosed is a digital microphone apparatus (300) for outputting a digital output signal (DATA) at a sample rate defined by a received clock signal (CLK). The apparatus includes a band splitter (302) configured to receive a microphone signal (SMD) indicative of an output of a microphone transducer and split said microphone signal into first signal path (SP1) for frequencies in a first band and a second signal path (SP2) for frequencies in a second band, the frequencies of the second band being higher than the frequencies in the first band. A modulation block (304) is configured to operate on the second signal path to down-convert signals in the second signal path from the second frequency band to a lower frequency band.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: April 9, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: John Paul Lesso, John Laurence Melanson
  • Patent number: 10250205
    Abstract: An outphasing power amplifying device includes a switching signal generating circuit configured to generate a switching pulse signal for switching a class-D power amplifier from two types of sinusoidal wave generated based on amplitude and phase of a modulated wave to be transmitted. The switching signal generating circuit includes: a sin calculation unit and a cos calculation unit for converting phase information of the two types of sinusoidal wave into a quadrature format; a DA converter for converting the quadrature-format phase information; a first filter for removing an aliasing component from the analogue signal; an analogue quadrature modulator for generating a sinusoidal wave from the analogue signals by using a local signal; a second filter for allowing a radio frequency and a component in the vicinity thereof to pass therethrough; and a comparator for converting the sinusoidal wave into a switching pulse signal by comparison with a reference voltage.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: April 2, 2019
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Kenya Tomaru, Manabu Nakamura
  • Patent number: 10250327
    Abstract: A method for operating an illumination system that includes at least one illumination device, a server configured to perform wireless communication with the illumination device, and a terminal configured to perform optical communication with the illumination device.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: April 2, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Jeongin Cheon, Dohyung Lee, Hongkyu Lee, Byunghun Park
  • Patent number: 10216700
    Abstract: A ternary pulse width modulation (“PWM”) method and apparatus. In one embodiment, the start of the pulse sequence in the “current” frame is referenced to the end of the pulse sequence in a previous, “reference” frame, rather than to the frame boundary at the start of the current frame, thereby allowing the compensation portion of the pulse sequence to overlap into the preceding or following frame, thus achieving a higher modulation index without dropping the compensation pulses. Although in most instantiations, the reference frame will be the frame immediately preceding in time the current frame, in other instances, the reference frame may be any frame preceding the current frame that falls within the constraints of the timing facility.
    Type: Grant
    Filed: June 21, 2016
    Date of Patent: February 26, 2019
    Assignee: Tempo Semiconductor, Inc.
    Inventor: Darrell Eugene Tinker
  • Patent number: 10200120
    Abstract: The present application relates to a wireless signal decoding method, which is used to decode an electric signal converted from a wireless signal, where the decoding method includes the following steps: recording a duration of each level of the electric signal; calculating an average value of m maximum durations and an average value of n minimum durations, where m and n are positive integers and are determined by referring to a distribution percentage value of first binary bit values and a distribution percentage value of second binary bit values in data respectively; calculating a decision duration according to the first average value and the second average value; comparing the duration of each level with the decision duration, and according to a comparison result, determining a binary bit value represented by the level; and integrating all binary bit values to restore the data represented by the electric signal.
    Type: Grant
    Filed: March 5, 2017
    Date of Patent: February 5, 2019
    Assignee: KUANG-CHI INTELLIGENT PHOTONIC TECHNOLOGY LTD.
    Inventors: Ruopeng Liu, Linyong Fan
  • Patent number: 9864769
    Abstract: A system and method for efficiently storing data in a storage system. A data storage subsystem includes multiple data storage locations on multiple storage devices in addition to at least one mapping table. A data storage controller determines whether data to store in the storage subsystem has one or more patterns of data intermingled with non-pattern data within an allocated block. Rather than store the one or more pattern on the storage devices, the controller stores information in a header on the storage devices. The information includes at least an offset for the first instance of a pattern, a pattern length, and an identification of the pattern. The data may be reconstructed for a corresponding read request from the information stored in the header.
    Type: Grant
    Filed: December 12, 2014
    Date of Patent: January 9, 2018
    Assignee: Pure Storage, Inc.
    Inventors: Marco Sanvido, Richard Hankins, John Hayes, Steve Hodgson, Feng Wang, Sergey Zhuravlev, Andrew Kleinerman
  • Patent number: 9853658
    Abstract: A DAC circuit includes: a PWM encoding circuit for converting a digital signal to first and second PWM signals, whereby a combination of the first and second PWM signals becomes a PWM encoded signal of at least 3 levels including a positive, a zero and a negative level, wherein the digital signal represents a number in a numerical range; and a demodulation circuit for generating the analog signal according to the first and second PWM signals. The first and second PWM signals have a minimum duty larger than 0 when the digital signal represents a middle number in the numerical range. The zero level of the combination of the first and second PWM signals has a duty which decreases as a difference between the number represented by the digital signal and the middle number increases.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: December 26, 2017
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventors: Ming-Jun Hsiao, Zong-Yi Chen
  • Patent number: 9762090
    Abstract: A wireless transmitter is described herein that provides power wirelessly to an apparatus with high efficiency. For example, the wireless power transmitter may include a class E amplifier that is used as a gate driver for a main power amplifier. This advantageously enables power to be transmitted wirelessly with a 100% theoretical power efficiency and with minimal power loss. Furthermore, electromagnetic interference (EMI) issues are reduced because only low orders of harmonics are applied to the gate of the main power amplifier. A system that incorporates such a wireless transmitter and methods of operating the same are also described herein.
    Type: Grant
    Filed: October 31, 2014
    Date of Patent: September 12, 2017
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Bing Jiang, John Walley
  • Patent number: 9748940
    Abstract: A device includes a combining circuitry that receives an incoming signal, and one or more delayed signals from a delay circuitry. The combining circuitry combines the incoming signal and the one or more delayed signals to generate a combined signal. The device includes a comparing circuitry that receives the combined signal from the combining circuitry, and compares a pulse width of the combined signal to a threshold pulse width. When the pulse width of the combined signal is greater than or equal to the threshold pulse width, the comparing circuitry provides the combined signal to an amplifier circuit and provides a null signal to the delay circuitry. The amplifier circuit generates a pulse width modulated (PWM) signal based on the combined signal.
    Type: Grant
    Filed: February 5, 2016
    Date of Patent: August 29, 2017
    Assignee: Marvell World Trade Ltd.
    Inventors: Kapil Jain, Zining Wu
  • Patent number: 9722701
    Abstract: A visible light communication (VLC) device and method for discovery and association with a VLC infrastructure node are disclosed. The VLC device is configured to receive a beacon frame from a VLC infrastructure node. The VLC device is further configured to transmit an association request to the VLC infrastructure node. The association request includes an indication of physical layer (PHY) capabilities and an indication of medium access control (MAC) capabilities of the VLC device. The VLC device is further configured to receive an association response from the VLC infrastructure node. The association response includes information for use in communicating with the VLC infrastructure node.
    Type: Grant
    Filed: June 12, 2015
    Date of Patent: August 1, 2017
    Assignee: InterDigital Patent Holdings, Inc.
    Inventors: Douglas R Castor, Samian Kaur, Weimin Liu
  • Patent number: 9696411
    Abstract: The system and method for multi-wavelength optical signal detection enables the detection of optical signal levels significantly below those processed at the discrete circuit level by the use of mixed-signal processing methods implemented with integrated circuit technologies. The present invention is configured to detect and process small signals, which enables the reduction of the optical power required to stimulate detection networks, and lowers the required laser power to make specific measurements. The present invention provides an adaptation of active pixel networks combined with mixed-signal processing methods to provide an integer representation of the received signal as an output. The present invention also provides multi-wavelength laser detection circuits for use in various systems, such as a differential absorption light detection and ranging system.
    Type: Grant
    Filed: January 8, 2015
    Date of Patent: July 4, 2017
    Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space Administration
    Inventor: Thomas D. McGlone
  • Patent number: 9614514
    Abstract: A PWM modulation device includes: a PWM modulator which receives upper N bits of an (N+1)-bit output from a noise shaper; a rising/falling edge detector which receives a PWM output signal of the PWM modulator and detects a rising/falling edge; a delay circuit which receives the PWM output signal, delays the PWM output signal by a predetermined delay time and outputs a PWM output delay signal; an AND gate which receives the lower one bit output from the noise shaper and an output control signal of the rising/falling edge detector; and a selector which receives a signal obtained as a result of an AND operation by the AND gate for the output control signal and the lower one bit and selects one of the PWM output signal and the PWM output delay signal.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: April 4, 2017
    Assignee: ROHM CO., LTD.
    Inventor: Takeshi Onodera
  • Patent number: 9503070
    Abstract: A signal conversion system and method for converting an input signal to a pulse width modulated signal is disclosed. The signal conversion system includes a sample rate converter coupled with an associated pulse width modulation (PWM) module. A hardware and power efficient signal conversion system for resampling an audio input signal with an arbitrary sample rate to a pulse width modulated output audio signal for use in an audio processor and/or reproduction is disclosed. The signal conversion system may be particularly suitable for use in a battery operated consumer electronics device.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: November 22, 2016
    Assignee: Actiwave AB
    Inventors: Erik Lindahl, Pär Gunnars Risberg
  • Patent number: 9496857
    Abstract: A driving circuit for driving half bridge connected electrically controlled power switches with a near zero interlock delay time between on-states of the power switches, wherein the driving circuit is configured to receive an input signal and to generate: —a first drive signal being adapted to switch a first power switch between the on and off state, —a second drive signal being adapted to switch a second power switch between the on and off state, wherein the signal curve of the first drive signal generated in response to a rising and falling edge of said input signal is mirrored with respect to the signal curve of the second drive signal along a time axis of a mirroring voltage value within a transition time, wherein the mirroring voltage value is adjusted such to be within the cutoff region of the power switches.
    Type: Grant
    Filed: January 17, 2013
    Date of Patent: November 15, 2016
    Inventor: Franc Zajc
  • Patent number: 9473144
    Abstract: An integrated circuit (IC) device can include a plurality of analog blocks, including at least one fixed function analog circuit, a plurality of reconfigurable analog circuit blocks, at least one analog routing block reconfigurable to provide signal paths between any of the analog blocks; and a digital section comprising digital circuits; wherein each analog block includes dedicated of signal lines coupled to the at least one analog routing block.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: October 18, 2016
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventors: Eashwar Thiagarajan, Harold M. Kutz, Hans Klein, Jaskarn Singh Johal, Jean-Paul Vanitegem, Kendall V. Castor-Perry, Mark E. Hastings, Amsby D. Richardson, Jr., Anasuya Pai Maroor, Ata Khan, Dennis R. Seguine, Onur Ozbek, Carl Ferdinand Liepold
  • Patent number: 9405865
    Abstract: A link simulation tool for simulating high-speed communications link systems is provided. Communications links may include link subsystems such as transmit (TX) circuitry, receive (TX) circuitry, oscillator circuits that provide reference clock signals to the TX and RX circuitry, and channels that link the TX and RX circuitry. The link simulation tool may model each of the subsystems using behavioral models. The behavioral models may include characteristic functions such as transfer functions, probability density functions, and eye characteristics. The link simulation tool may have a link analysis engine that is capable of performing two-dimensional (two-variable) convolution operations and in applying dual-domain (frequency-time) transformations on the characteristic functions provided by the behavioral models to simulate the performance of the link system.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: August 2, 2016
    Assignee: Altera Corporation
    Inventors: Peng Li, Masashi Shimanouchi, Thungoc M. Tran, Sergey Shumarayev
  • Patent number: 9337821
    Abstract: In an embodiment, a method of generating a pulse-width modulated signal from an input signal includes calculating a finite number of basis functions of a first pulse-width modulated signal based on the input signal, and forming an electronic output based on the calculated finite number of basis functions.
    Type: Grant
    Filed: January 20, 2014
    Date of Patent: May 10, 2016
    Assignee: Infineon Technologies AG
    Inventors: Peter Singerl, Christian Vogel
  • Patent number: 9281806
    Abstract: The present invention concerns a signal generator circuit powered by a supply voltage and including flip flop means including a first input to which is connected a continuous input signal whose amplitude is defined, a second input to which is connected a clock signal whose duty cycle is defined, and a third, reset input, and outputting an output signal whose duty cycle is that of the clock signal and whose amplitude is that of the input signal, characterized in that said circuit further includes regulating means arranged to compare the output signal to a set point signal representative of the desired duty cycle and to deliver a control signal connected to the third input of the flip flop means so as to activate the reset to modify the duty cycle of the output signal.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: March 8, 2016
    Assignee: EM MICROELECTRONIC-MARIN SA
    Inventors: Lubomir Plavec, Yves Theoduloz, Petr Drechsler
  • Patent number: 9281750
    Abstract: A power supply device includes a transformer including primary winding and secondary winding, a sensor configured to sense at least one of output voltage and output current in the power supply device, a pulse width modulation (PWM) controller configured to perform PWM switching so that voltage is selectively provided to the primary winding based on one of the sensed output voltage and output current, and a regulator configured to stop PWM switching of the PWM controller and keep the PWM switching in stopped state when at least one of the sensed output voltage and output current exceeds a preset value.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: March 8, 2016
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Kwan-bin Yim
  • Patent number: 9252824
    Abstract: Systems and methods are provided for performing noise filtering of a received signal. A first signal is received via a first receiver. A second signal is received via a second receiver. A combined signal based on the first and second signals is generated. The combined signal is processed to generate an adjusted combined signal. A phase adjustment is performed on the adjusted combined signal based on amplitude values of the adjusted combined signal during a period of time and an amplitude value of the first signal during the period of time. The phase-adjusted signal is subtracted from the first signal to generate a noise reference signal. The noise reference signal is subtracted from the combined signal to generate a filtered output signal.
    Type: Grant
    Filed: December 1, 2014
    Date of Patent: February 2, 2016
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: Jin Xie, Kapil Jain
  • Patent number: 9184738
    Abstract: A PWM (Pulse Width Modulation) signal outputting circuit includes a counting unit for counting a number of clocks to output a counter value, and for resetting the counter value to resume counting when a reset signal is input to the counting unit; a dead time value storage unit for storing a dead time value; and a plurality of PWM signal outputting units for setting a start setting value and a termination setting value. The PWM signal outputting unit generates a termination signal and a start signal. Further, the PWM signal outputting unit is configured to output a PWM signal, which is raised according to the start signal generated by itself and is decreased according to the termination signal generated by itself. Further, the PWM signal outputting units is configured to generate the termination signal when the counter value matches to the termination setting value generated by itself.
    Type: Grant
    Filed: September 7, 2012
    Date of Patent: November 10, 2015
    Assignee: Lapis Semiconductor Co., Ltd.
    Inventor: Kenjiro Matoba
  • Patent number: 9159272
    Abstract: Specifically provided is a light emitting device for image display, wherein each of light emitting elements, a PWM control unit which PWM-controls a current to be supplied to the light emitting element, a control condition setting unit which, according to the APL of image data, determines and updatably sets the PWM limiting condition for limiting the PWM value that is the duty ratio of the PWM control, and the reference current value that is the value of the current flowing to the light emitting element in response to turn-on of the PWM control, and a PWM value calculation unit which on the basis of the image data, the PWM limit condition, and the reference current value, calculates the PWM value of each area, and the PWM control unit performs the PWM control on the basis of the reference current value and the calculated PWM value.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: October 13, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Murai, Kohji Fujiwara, Tomohiko Yamamoto
  • Patent number: 9154121
    Abstract: An embodiment of pulse width modulated (PWM) signal generator includes a module or modules to calculate an amount of change in a period length and duty ratio of an output signal during a transition period between a first signal waveform and a second signal waveform using a first period parameter, a second period parameter, and a parameter indicating a predetermined number of steps in the transition period. The period parameter and duty parameter of the output signal during the steps of the transition period are based on the calculated amounts of change.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: October 6, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuhiko Azuma
  • Patent number: 9118260
    Abstract: A method for controlling at least one switch in a power converter, wherein the switching speed of the switch dynamically varies according to a measurement of a quantity representative of the efficiency of the converter.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: August 25, 2015
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Frédéric Gautier, Bertrand Rivet
  • Patent number: 9106214
    Abstract: A PCM signal is converted to a PWM signal using predistortion to alleviate harmonics. A PCM predistorted signal is converted to the PWM and amplified. A third harmonic nonlinear function receives the PCM signal and produces a third harmonic of the PCM signal. A third harmonic difference function takes one sixth of the third harmonic and produces a third harmonic PCM compensation signal. The PCM signal and the third harmonic PCM compensation signal are summed to produce a PCM predistorted signal for a full-bridge amplifier. A second harmonic nonlinear function produces a second harmonic of the PCM signal. A second harmonic function takes one fourth of the second harmonic to produce a second harmonic PCM compensation signal. The PCM signal, the third harmonic PCM compensation signal, and the second harmonic PCM compensation signal are summed to produce the PCM predistorted signal for a half-bridge amplifier.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: August 11, 2015
    Assignee: ADX Research, Inc.
    Inventor: Pallab Midya
  • Patent number: 9099996
    Abstract: A method for providing cross point information includes: providing an input signal having amplitude and phase information; interpolating between a first point of the input signal and a second point of the input signal to provide cross point information between the first point and the second point; and providing a pulse-width modulated signal based on the input signal and the cross point information.
    Type: Grant
    Filed: November 14, 2013
    Date of Patent: August 4, 2015
    Assignee: Infineon Technologies AG
    Inventors: David Seebacher, Peter Singerl, Christian Schuberth, Martin Mataln
  • Patent number: 9035710
    Abstract: A PWM signal generating circuit, printer, and PWM signal generating method are described. The PWM signal generating circuit includes: a single counter configured to count values expressed in N bits; and at least one arithmetic device configured to generate a PWM signal, each of the at least one arithmetic device including a pulse width data storage unit for storing N-bit pulse width data representing a pulse width of the PWM signal to be generated, and an adder for calculating a carry value from a most significant bit obtained when adding the count value and the pulse width data. A signal having a level corresponding to the carry value is output at every change in the count value so that the PWM signal having the pulse width of the pulse width data is generated.
    Type: Grant
    Filed: December 27, 2013
    Date of Patent: May 19, 2015
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Michiyoshi, Tetsuro Tatebe
  • Publication number: 20150130549
    Abstract: A method for providing cross point information includes: providing an input signal having amplitude and phase information; interpolating between a first point of the input signal and a second point of the input signal to provide cross point information between the first point and the second point; and providing a pulse-width modulated signal based on the input signal and the cross point information.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Inventors: David Seebacher, Peter Singerl, Christian Schuberth, Martin Mataln
  • Patent number: 9007140
    Abstract: The present invention provides a digitally controlled, current starved, pulse width modulator (PWM). In the PWM of the present invention, the amount of current from the voltage source to the ring oscillator is controlled by the proposed header circuit. By changing the header current, the pulse width of the switching signal generated at the output of the ring oscillator is dynamically controlled, where the duty cycle can vary between 50% and 90%. A duty cycle to voltage converter is used to ensure the accuracy of the system under process, voltage, and temperature (PVT) variations. The proposed pulse width modulator is appropriate for dynamic voltage scaling systems due to the small on-chip area and high accuracy under process, voltage, and temperature variations.
    Type: Grant
    Filed: January 8, 2014
    Date of Patent: April 14, 2015
    Assignees: University of South Florida, University of Rochester
    Inventors: Selcuk Kose, Eby G. Friedman
  • Patent number: 8994468
    Abstract: A modulation method is provided. The modulation method includes the steps of receiving multiple sinusoidal signals, obtaining the maximum value of the sinusoidal signals, obtaining the median value of the sinusoidal signals, and obtaining the minimum value of the sinusoidal signals within a period to generate a difference between the maximum value and the minimum value, generating a difference according to an upper limit and a lower limit of a predetermined comparison value, and comparing the two differences to generate an optimized modulation signal.
    Type: Grant
    Filed: May 15, 2013
    Date of Patent: March 31, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Shih-Hsiang Chien, Yong-Kai Lin, Chin-Hone Lin
  • Patent number: 8994426
    Abstract: In various embodiments, systems and methods for generating high-precision pulse-width modulation include a delay-locked loop comprising multiple delay units having time-variable delays, control logic for selecting a subset S of the multiple delay units to thereby generate a time-invariant shift amount having a precision finer than that of a system clock and circuitry for applying the shift amount to rising and falling edges of a pulse-width modulation waveform to thereby generate a high-precision pulse-width modulation waveform.
    Type: Grant
    Filed: August 31, 2012
    Date of Patent: March 31, 2015
    Assignee: Analog Devices, Inc.
    Inventors: Wreeju Bhaumik, Senthil Kumar Devandaya Gopalrao
  • Patent number: 8981863
    Abstract: A modulation apparatus for a class D switching amplifier is capable of reducing power consumption of an Electro-Migration Interface (EMI) of an output end and a gate driver end in a zero input signal. The modulation apparatus for a class D switching amplifier includes a control unit for detecting and outputting a control signal which is a common signal component of a first modulation signal modulated by using a first input signal and a second modulation signal modulated by using a second input signal; and is characterized by feedback of a first output signal, a second output signal and a common output signal outputted by using the first modulation signal, the second modulation signal and the control signal through an input of the modulation apparatus.
    Type: Grant
    Filed: August 18, 2011
    Date of Patent: March 17, 2015
    Assignee: Cesign Co., Ltd.
    Inventors: Jea Young Shin, Soo Hyoung Lee
  • Patent number: 8971398
    Abstract: In an embodiment, a method of producing a multi-level RF signal includes producing plurality of pulse-width modulated signals based on an input signal. The method further includes driving a corresponding plurality of parallel amplifiers with the plurality of pulse-width modulated signals by setting a parallel amplifier to have a first output impedance when a corresponding pulse-width modulated signal is in an active state and setting the parallel amplifier to have a second output impedance when the corresponding pulse-width is in an inactive state. The method also includes phase shifting the outputs of the plurality of parallel amplifiers, wherein phase shifting transforms the second output impedance into a third impedance that is higher than the second output impedance, and combining the phase shifted outputs.
    Type: Grant
    Filed: September 19, 2011
    Date of Patent: March 3, 2015
    Assignee: Infineon Technologies AG
    Inventors: Peter Singerl, Christian Schuberth, Martin Mataln, Franz Dielacher
  • Publication number: 20150022277
    Abstract: In a gyro sensor, a TDC detects a magnitude of vibration of a vibrator. A drive circuit (excluding the TDC) determines a duty ratio of a PWM drive signal in accordance with the magnitude of vibration so that the magnitude of vibration becomes a predetermined magnitude and outputs the PWM drive signal having the determined duty ratio. The drive circuit (excluding the TDC) includes a control circuit and a DCO. The control circuit measures time corresponding to the control value by using a gate delay time, generates the PWM drive signal having a pulse width corresponding to the control value and outputs the PWM drive signal.
    Type: Application
    Filed: May 28, 2014
    Publication date: January 22, 2015
    Applicant: DENSO CORPORATION
    Inventors: Shigenori YAMAUCHI, Takamoto WATANABE, Nobuyuki TAGUCHI
  • Patent number: 8937515
    Abstract: A device for mixing multiple (N) pulse density modulated (PDM) bit streams of a bit rate, the device comprises an input logic, an error accumulation circuit, an error correction circuit and an adder of more than N bits; wherein the device is arranged to output an output PDM bit stream that represents a mixture of the multiple input PDM bit streams; wherein the output PDM bit stream comprises a plurality of output PDM bits, wherein a certain output PDM bit of a plurality of output PDM bits that form the output PDM bit stream is generated during a certain clock cycle; wherein the input logic is arranged to select, during each fraction of the certain clock cycle, a current bit of a selected PDM bit stream, wherein different PDM bit streams are selected during different fragments of the certain clock cycle; wherein the error accumulation circuit is arranged to store intermediate values during a first fraction till a penultimate fraction of the certain clock signal and to store a last value during a last fraction
    Type: Grant
    Filed: October 23, 2013
    Date of Patent: January 20, 2015
    Assignee: DSP Group Ltd.
    Inventor: Moshe Haiut
  • Patent number: 8928424
    Abstract: Methods and apparatus for translating duty cycle information in duty-cycle-modulated signals to higher frequencies or higher data rates. An exemplary duty cycle translator includes a duty cycle evaluator, a high-speed digital counter, and a comparator. The duty cycle evaluator generates a first digital number representing a duty cycle of a low-frequency input duty-cycle-modulated (DCM) signal. The comparator compares the first digital number to a second digital number generated by the high-speed digital counter, and generates, based on the comparison, an output DCM signal having a higher frequency or data rate than the frequency or data rate of the low-frequency input DCM signal but a duty cycle that is substantially the same as the duty cycle of the low-frequency input DCM signal.
    Type: Grant
    Filed: January 2, 2013
    Date of Patent: January 6, 2015
    Inventor: Earl W McCune, Jr.
  • Patent number: 8922290
    Abstract: An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: December 30, 2014
    Assignee: Power Integrations, Inc.
    Inventors: Jonathan Edward Liu, Giao Minh Pham
  • Patent number: 8907736
    Abstract: A digital pulse width modulation controller includes a pulse width modulation controller, a selection unit having at least one selector, a comparison unit having at least one comparator, and a signal conversion unit having at least one digital-to-analog converter. The digital-to-analog converter generates a reference current and/or voltage. The comparator receives the reference current and/or voltage, and performs a comparison operation to generate a comparison signal based on a feedback signal. The selector selects one selection signal to input into the pulse width modulation controller, which receives other parameters set by a user or the system at the same time so as to control characteristics of the digital pulse width modulation signals, thereby improving the electric properties of a loading circuit.
    Type: Grant
    Filed: September 10, 2013
    Date of Patent: December 9, 2014
    Assignee: Inno-Tech Co., Ltd.
    Inventors: Chih Feng Lin, Shu-Chia Lin, Wen-Yueh Hsieh, Ching-Yuan Lin, Ting-Chin Tsen, Yi-Pin Chen
  • Patent number: 8907735
    Abstract: A PWM circuit that can have two refresh rates, including: a first PWM signal generator and a second PWM signal generator; wherein the first PWM signal generator and the second PWM signal generator respectively control refresh rates in two dimensions of an output data generated from a target apparatus. A PWM signal generation method that can have two refresh rates, including: generating a first PWM signal; generating a second PWM signal; and controlling refresh rates in different dimensions of an output data generated from a target apparatus respectively by using the first PWM signal and the second PWM signal.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: December 9, 2014
    Assignee: Silicon Touch Technology Inc.
    Inventors: Chi-Yuan Chin, Kuei-Jyun Chen
  • Patent number: 8878603
    Abstract: A device for detecting a PWM wave, comprising: a PWM wave generating module, configured to generate the PWM wave; a detecting module coupled to the PWM wave generating module, configured to receive the PWM wave and to determine an electric level of the PWM wave; a timer coupled to the detecting module, configured to start a counting when the detecting module receives the PWM wave, and to interrupt the counting when the counting reaches a predetermined value, the detecting module determining whether the electric level of the PWM wave is a high electric level or a low electric level when the counting is interrupted; and a calculating module coupled to the detecting module, configured to calculate a duty ratio of the PWM wave based on a number of high electric level and a number of low electric level of the PWM wave determined within one period of the PWM wave.
    Type: Grant
    Filed: June 22, 2012
    Date of Patent: November 4, 2014
    Assignees: Shenzhen BYD Auto R&D Company Limited, BYD Company Limited
    Inventors: Yu Liu, Xiaofeng Shen, Jianhua Zhang
  • Patent number: 8878622
    Abstract: In an embodiment, a method of generating a pulse-width modulated signal from an input signal includes calculating a finite number of basis functions of a first pulse-width modulated signal based on the input signal, and forming an electronic output based on the calculated finite number of basis functions.
    Type: Grant
    Filed: April 7, 2011
    Date of Patent: November 4, 2014
    Assignee: Infineon Technologies AG
    Inventors: Peter Singerl, Christian Vogel
  • Patent number: 8872594
    Abstract: A pulse width modulation device includes a switching transistor for defining modulation phases, a capacitor, and switches arranged to: a) in a first phase, charge the capacitor to a voltage corresponding to the on/off threshold of the switching transistor, and b) in a second phase, connect the capacitor between a terminal for applying a setpoint voltage and the gate of the switching transistor. A constant current source is connected to apply a current in the capacitor tending to bring the gate of the switching transistor toward the on/off threshold.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: October 28, 2014
    Assignees: STMicroelectronics SA, STMicoelectronics (Grenoble 2) SAS
    Inventors: Marc Sabut, Severin Trochut, Christophe Curis
  • Patent number: 8860523
    Abstract: The frequency characteristic of a voltage-feedback class-D amplifier circuit for driving an output load is improved. A triangular-wave correction circuit which compensates a gradient of a triangular wave is provided to a triangular-wave signal generator which supplies a triangular wave signal used as a PWM carrier to a comparison circuit for performing PWM modulation of an input signal. In an area where a duty of a command value for an output circuit drive becomes about 50%, a slew rate (gradient) of the triangular wave is decreased.
    Type: Grant
    Filed: January 11, 2012
    Date of Patent: October 14, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Naoya Odagiri
  • Publication number: 20140300427
    Abstract: Embodiments are directed to modulating a pulse width modulation (PWM) signal, by initializing at least one phase index to an initial value, establishing a set of values in a lookup table that correspond to data points for PWM comparator values that correspond to a given number of samples of a single periodic waveform during a predetermined sampling rate that establishes a table resolution, repeatedly executing the following operations at the predetermined sampling rate: determining a value of a command signal frequency, setting a value to a jump factor equal to the quotient of the value of the command signal frequency divided by the table resolution, progressing the value of the phase index by the value of the jump factor, selecting a value of a commutation vector from the lookup table that corresponds to the phase index, and loading the value of the commutation vector into a corresponding PWM comparator.
    Type: Application
    Filed: March 7, 2014
    Publication date: October 9, 2014
    Applicant: Hamilton Sundstrand Corporation
    Inventors: Alex Seguritan, Ravishankar Piramanayagam
  • Patent number: 8854151
    Abstract: An electrical resonance network comprising a first capacitor and a first inductor whose resonance frequency can be tuned by means of a second capacitor and/or a second inductor. The resulting effective capacitor- or inductor value of a network period is controlled by a variable coupling respectively decoupling interval by means of at least one coupling switch. The coupling respectively decoupling interval is synchronized by a sign change of a current and/or voltage in the network.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: October 7, 2014
    Inventor: Markus Rehm