Semiconductor Mounts Patents (Class 333/247)
  • Patent number: 6606014
    Abstract: An interconnect system for linking integrated circuits (ICs) mounted on a surface of a printed circuit board (PCB) includes a trace positioned below the surface, one or more vias linking the trace to the surface of the PCB, and other conductors linking pads on the ICs to the vias. Impedances of the various components of the interconnect system are sized relative to one another to optimize interconnect system frequency response.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: August 12, 2003
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Publication number: 20030146811
    Abstract: Structures and methods are provided for dual referenced microstrip structures having low reference discontinuities between a microstrip trace referenced to a primary reference plane as compared to a microstrip trace referenced to a secondary reference plane.
    Type: Application
    Filed: February 1, 2002
    Publication date: August 7, 2003
    Inventors: James Breisch, Chee-Yee Chung, Alex Waizman, Teong Guan Yew
  • Patent number: 6597053
    Abstract: An integrated circuit arrangement having a number of structural elements, at least one of which is surrounded by a metallic shielding structure. This structural element is thus protected against interference due to disturbing impulses from its environment. In particular, the structural elements of the circuit arrangement can be arranged next to or on top of one another. To produce the metallic shielding structure of a structural element of the circuit arrangement, at least one depression which surrounds the structural element is created and then lined with metal. The contacts and electrical connections of the structural element are electrically insulated from the metal of the shielding structure.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: July 22, 2003
    Assignee: Siemens Aktiengesellschaft
    Inventors: Anton Anthofer, Holger Hübner
  • Publication number: 20030117245
    Abstract: A projecting part is formed on the bottom surface of a dielectric substrate and a first conductive layer and a second conductive layer are respectively formed on the top surface and the bottom surface of the dielectric substrate. A plurality of through holes are formed along the left and the right of the projecting part. A coplanar line including a center electrode sandwiched between two grooves is provided on the top surface. Two slots connected to the top end of the coplanar line are formed at a position corresponding to the position of the projecting part, whereby a waveguide formed by the projecting part and the coplanar line are interconnected via the slots.
    Type: Application
    Filed: December 3, 2002
    Publication date: June 26, 2003
    Inventors: Shingo Okajima, Toshiro Hiratsuka, Takeshi Okano
  • Publication number: 20030112090
    Abstract: There is provided an antibody granule, consisting essentially of one or more antibodies, or fragments derived thereof, granulated with an alkali metal salt. Also provided is a process for preparing said antibody granules. The granules can be used in an enzymatic stain bleaching or anti dye-transfer composition.
    Type: Application
    Filed: December 18, 2001
    Publication date: June 19, 2003
    Inventors: Mehdi Frederik Soltan, Hamid Reza Rategh
  • Patent number: 6580402
    Abstract: An integrated ceramic chip carrier module for a phased array antenna. The module is comprised of a plurality of layers of low temperature, co-fired ceramic formed into an integrated module. The module combines the injection molded probes, button layer and holder, and the ceramic chip carrier into a single integrated component part. This construction provides for improved performance, reliability, manufacturing repeatability, and lower overall antenna manufacturing costs.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: June 17, 2003
    Assignee: The Boeing Company
    Inventors: Julio Angel Navarro, Douglas Allan Pietila
  • Publication number: 20030095014
    Abstract: Connection packages for high-speed integrated circuits (“ICs”) in optical, electronic, wired or wireless communications are disclosed. The connection package achieves dimensional transformation of signal routes from high-speed, high-density IC's input/output pads to the external terminals such as coaxial terminals and BGA balls, while maintaining constant characteristic impedance throughout the transmission lines. A package may include a substrate having microstrips for communicating signals between the IC pads and external terminals. A pair of differential microstrips can be positioned closer to each other near the IC pads and create capacitive coupling. Such coupled capacitance allows the width of the microstrips to be reduced. A portion of the coupled microstrips near the IC pads can be widened to increase the capacitance so that the overall transmission path can become an all-pass network—from the IC pads, through the bonding wires, to the microstrips.
    Type: Application
    Filed: November 21, 2001
    Publication date: May 22, 2003
    Inventors: Binneg Y. Lao, William W. Chen, David A. Rowe
  • Publication number: 20030080836
    Abstract: A high frequency circuit module for use in an automotive radar or the like, in which RF circuit parts are mounted on both sides of a hard multilayer dielectric substrate, and a transmission line connecting the RF circuit parts provided on both sides is constructed by a via group including a periodical structure or a via having a coaxial structure perpendicular to faces of the multilayer dielectric substrate. As the multilayer dielectric substrate, a hard multilayer substrate using metallic layers as a microstrip line wiring layer, a DC/IF signal line layer, and grounding metal layers for shielding which are disposed on and under the DC/IF signal line is employed. By using the transmission line achieved by a through via having the periodical structure or the through via having the coaxial structure, an electromagnetic wave propagating in parallel between the grounding conductors is confined.
    Type: Application
    Filed: February 8, 2002
    Publication date: May 1, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Hideyuki Nagaishi, Hiroshi Kondoh
  • Patent number: 6552564
    Abstract: The present invention provides a method and apparatus, for integrated circuit or printed circuit board interconnections, which is able to minimize the reflections and ringing with minimal delay of signals which are propagated through transmission lines to destination points within the circuit or board. The invention utilizes interconnection lines which are designed to have a resistivity, line length, and line cross sectional area which produces a resistance of the interconnection line which will minimize the ringing and reflections with minimal delay of the signal propagated to the destination points to insure signal quality.
    Type: Grant
    Filed: August 30, 1999
    Date of Patent: April 22, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Kie Y. Ahn
  • Patent number: 6548896
    Abstract: A method and structure for reducing mechanical shear stresses induced in an IC chip by metal interconnect lines that interconnect the chip with its surrounding substrate. A dielectric layer overlies at least a portion of the substrate and a peripheral surface region of the chip. The lines are formed on the dielectric layer and are electrically interconnected with contact pads on the peripheral surface region of the chip, i.e., beneath the dielectric layer. At least one trench is formed in the dielectric layer and surrounds the peripheral surface region of the chip. The lines traverse the trench so as to have nonplanar portions within the trench. The trenches and the nonplanar portions of the lines increase the expansion/contraction capability of the dielectric layer and lines in a region sufficiently close to where the lines are interconnected to the contact pads, such that shear stresses at critical points near the line-pad connections are significantly reduced.
    Type: Grant
    Filed: May 20, 2002
    Date of Patent: April 15, 2003
    Assignee: General Electric Company
    Inventor: Renato Guida
  • Patent number: 6549105
    Abstract: A millimeter wave module includes a silicon substrate with first and second cavityes formed by anisotropic etching on the silicon substrate, and a glass substrate having a microstrip filter pattern and microbumps for connecting the glass substrate to the silicon substrate. A filter is provided using an air layer as a dielectric disposed in the first cavity. An MMIC is mounted by the flip chip method over the second air layer. A coplanar waveguide is on the silicon substrate for connecting the filter and MMIC. The filter having low loss is achieved because it has the microstrip structure using air as an insulating layer. Also change in characteristics of the MMIC during mounting is eliminated because the MMIC is protected by contacting air. Accordingly, the millimeter wave module has excellent characteristics and is made using a simple method.
    Type: Grant
    Filed: October 3, 2001
    Date of Patent: April 15, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuaki Takahashi, Ushio Sangawa
  • Patent number: 6545573
    Abstract: An optical microwave package eliminates launching electrical modes into a microwave strip-line by forming a moat in a housing portion of the package to suppress microwave resonant energy. The moat can be filled with a conductive material to further suppress package resonances. Additionally, the bottom of a substrate positioned within the housing is isolated from any conductive metal to further suppress microwave resonant energy.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: April 8, 2003
    Inventors: Mindaugas F. Dautartas, John M. Geary
  • Publication number: 20030062966
    Abstract: A signal line of a data bus includes first wires on a first board and a second wire on a second board. The second board is installed on the first board to connect the first and second wires with each other in series to establish the signal line. Semiconductor devices are connected with the second wire. In such data bus system, impedance of the second wire is decided according to additional capacitance of the semiconductor device on the second board in order to harmonize impedance of the first board with impedance of the second board.
    Type: Application
    Filed: September 26, 2002
    Publication date: April 3, 2003
    Applicant: ELPIDA MEMORY, INC.
    Inventors: Hisashi Abo, Hiroaki Ikeda
  • Patent number: 6534725
    Abstract: A high-frequency switch includes: a high-frequency circuit board including an MIC substrate, a microstrip line disposed on a front surface of the MIC substrate, and a signal wiring layer and a front surface grounding conductor disposed along the microstrip line; bumps disposed on the microstrip line, the signal wiring layer, and the front surface grounding conductor; and a semiconductor chip disposed on the high-frequency circuit board through the bumps. A gate electrode of a transistor of the semiconductor chip is connected to the signal wiring layer of the high-frequency circuit board through at least one of the bumps; a source electrode is connected to the front surface grounding conductor through at least one of the bumps; and a drain electrode is connected to the microstrip line through at least one of the bumps.
    Type: Grant
    Filed: June 5, 2001
    Date of Patent: March 18, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiro Tsukahara
  • Patent number: 6528732
    Abstract: A circuit device board having a desired characteristic is provided by bonding dielectric substrates. A printed board 11 carrying patterns 11a and 11b incorporating a resonator is joined by a prepreg 13 to a printed board 12 carrying patterns 12a and 12b, which are substantially identical to the patterns 11a and 11b, so that the patterns come opposite to each other. As a grounding conductor is provided on the outer side of each of the printed boards 11 and 12, a band-pass filter having the three-plate structure is completed. The patterns 11a and 12a are connected to each other for determining the signal input while the patterns 11b and 12b are connected to each other for determining the signal output. Accordingly, the frequency response can be obtained at a desired level regardless of the thickness of the prepreg 13.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: March 4, 2003
    Assignee: Sony Corporation
    Inventors: Akihiko Okubora, Takayuki Hirabayashi, Hideyuki Shikichi
  • Publication number: 20030034861
    Abstract: A microwave monolithic integrated circuit (MMIC) assembly and related method are disclosed. A dielectric substrate has a surface on which radio frequency circuits and microstrip lines are formed. At least one MMIC chip opening is dimensioned for receiving therethrough a MMIC chip. A metallic carrier is mismatched as to coefficient of thermal expansion to the dielectric substrate and includes a component surface adhesively secured to the dielectric substrate on the surface opposing the radio frequency circuits and microstrip lines. At least one raised pedestal is on the component surface that is positioned at the MMIC chip opening. A MMIC chip is secured on the pedestal and extends through the MMIC chip opening for connection to the radio frequency circuits and microstrip lines. Stress relief portions are formed in the metallic carrier that segment the carrier into subcarriers and provide stress relief during expansion and contraction created by temperature changes.
    Type: Application
    Filed: September 24, 2002
    Publication date: February 20, 2003
    Applicant: Xytrans, Inc.
    Inventors: Danny F. Ammar, Gavin Clark
  • Publication number: 20030030516
    Abstract: The present invention was developed in order to provide a connected construction of a high-frequency package and a wiring board having an excellent high-frequency transmission characteristic, without degradation of the transmission characteristic of even high-frequency signals in a wide band ranging from 20 GHz to 80 GHz in the case of connecting a high-frequency package to a wiring board, wherein a distance between conductive vias and conductive vias to connect grounds formed on both main surfaces of a high-frequency transmission line substrate constituting the high-frequency package, and a distance between conductive vias and conductive vias to connect grounds formed on both main surfaces of the wiring board on which the high-frequency package is mounted, are set in consideration of the dielectric constant of the high-frequency transmission line substrate and the dielectric constant of the wiring board in order to improve the high-frequency transmission characteristic between the high-frequency transmission
    Type: Application
    Filed: March 26, 2002
    Publication date: February 13, 2003
    Inventors: Yoshio Tsukiyama, Masato Shiobara
  • Publication number: 20030020560
    Abstract: In electronic apparatus, a coaxial signal cable is connected to a semiconductor circuit using a coaxial connector 24 to convert the coaxial signal to a coplanar wave (CPW) mode, the CPW mode signal being transferred from the connector 24 to the circuit 27 via a flexible connection 23 comprising a CPW transmission line 25 on a flexible substrate 26.
    Type: Application
    Filed: July 24, 2002
    Publication date: January 30, 2003
    Applicant: Bookham Technology plc
    Inventor: Stephen Paul Marsh
  • Patent number: 6507495
    Abstract: An apparatus for use with data processing systems. In one embodiment, the apparatus includes but is not limited to at least one conductive member having a first end electrically coupled to a first conductive structure which partially forms a moat and a second end electrically coupled to a second conductive structure which substantially spans the moat, with the second conductive structure having at least a part overhanging a third conductive structure which partially forms the moat.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: January 14, 2003
    Assignee: Dell Products L.P.
    Inventors: Jeffery C. Hailey, Donald L. Brooks
  • Patent number: 6501343
    Abstract: Described herein is a probe card assembly providing signal paths for conveying high frequency signals between bond pads of an integrated circuit (IC) and an IC tester. The frequency response of the probe card assembly is optimized by appropriately distributing, adjusting and impedance matching resistive, capacitive and inductive impedance values along the signal paths so that the interconnect system behaves as an appropriately tuned Butterworth or Chebyshev filter.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: December 31, 2002
    Assignee: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 6498551
    Abstract: A low cost millimeter wave (MMW) module for a microwave monolithic integrated circuit (MMIC) includes a carrier board formed of a dielectric material and having at least one MMIC die mounted thereon and at least one interface line, such as a 50 Ohm microstrip interface line. A base plate is formed of a material that has a higher unmatched coefficient of thermal expansion (CTE) than the carrier board and supports same. A housing is mounted over the carrier board and engages the base plate. The housing has at least one subminiature coaxial connector (SMA) interface mounted thereon. A flexible circuit interconnect, such as a fuzz button, connects the subminiature coaxial connector and MMIC die through the interface line. A thermal interface member is positioned between the carrier board and base plate to aid in heat transfer between the base plate and housing and the lower CTE carrier board.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: December 24, 2002
    Assignee: Xytrans, Inc.
    Inventors: Danny F. Ammar, Eugene Fischer, Gavin Clark, John Hubert, Glenn Larson
  • Publication number: 20020190812
    Abstract: An RF microcircuit package and interconnection device is disclosed which minimizes impedance mismatch between circuit elements. Multiple signal via and close proximity ground vias as well as tuned wire bonds are disclosed.
    Type: Application
    Filed: August 26, 2002
    Publication date: December 19, 2002
    Applicant: HEI, Inc.
    Inventors: River (Guanghua) Huang, Parker Chandler
  • Publication number: 20020186106
    Abstract: An electromagnetic interconnect method and apparatus effects contactless, proximity connections between elements in an electronics system. Data to be communicated between elements in an electronic system are modulated into a carrier signal and transmitted contactlessly by electromagnetic coupling. The electromagnetic coupling may be directly between elements in the system or through an intermediary transmission medium.
    Type: Application
    Filed: May 8, 2001
    Publication date: December 12, 2002
    Applicant: FormFactor, Inc.
    Inventor: Charles A. Miller
  • Publication number: 20020186089
    Abstract: A high frequency semiconductor integrated circuit includes a main circuit, a circuit block, a pad, and a wire. The main circuit includes an input terminal, a transistor, transmission lines, a pad, and an output terminal. The circuit block includes a passive circuit, and a capacitor. The pad is disposed close to the circuit block. The wire connects the pad to the pad included in the main circuit. In the high frequency semiconductor integrated circuit, the main circuit outputs an input signal inputted at the input terminal from the output terminal through the transistor, the transmission line, the pad and another transmission. As a result, the high frequency semiconductor integrated circuit can realize various kinds of its performances and thereby can be used to many applications.
    Type: Application
    Filed: October 10, 2001
    Publication date: December 12, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Ko Kanaya, Shin Chaki
  • Patent number: 6489680
    Abstract: In a semiconductor device such as a high-frequency power amplifier module, a plurality of amplifying means are formed on a semiconductor chip which is mounted on a main surface of a wiring substrate, and electrodes of the semiconductor chip are electrically connected by wires to electrodes of the wiring substrate. In order to make the high-frequency power amplifier module small in size, a substrate-side bonding electrode electrically connected to a wire set at a fixed reference electric potential is place at a location farther from a side of the semiconductor chip than a substrate-side output electrode electrically connected to an output wire. A substrate-side input electrode electrically connected to an input wire is located at a distance from the side of the semiconductor chip about equal to the distance from the side of the semiconductor chip to the substrate-side output electrode, or at a location farther from the side of the semiconductor chip than the substrate-side bonding electrode is.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: December 3, 2002
    Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Iwamichi Kohjiro, Yasuhiro Nunogawa, Sakae Kikuchi, Shizuo Kondo, Tetsuaki Adachi, Osamu Kagaya, Kenji Sekine, Eiichi Hase, Kiichi Yamashita
  • Patent number: 6489866
    Abstract: In a microwave module including a transmitting portion circuit and a receiving portion circuit, the transmitting portion circuit and the receiving portion circuit are respectively constructed by transmission lines of different kinds in which polarization planes are orthogonal to each other, and are constructed on the same surface of the same substrate. For example, one of the transmitting portion circuit and the receiving portion circuit is constructed by a microstrip line, and the other is constructed by a coplanar line. Further, one of the transmitting portion circuit and the receiving portion circuit is constructed by a microstrip line, and the other is constructed by a slot line. By this, there is obtained a microwave module in which mutual interference by an electromagnetic field between element circuits in the module can be suppressed, the circuits can be arranged close to each other without requiring a shielding member, and miniaturization of the module can be realized.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: December 3, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Hiromitsu Uchida, Yasushi Itoh
  • Patent number: 6483406
    Abstract: A high-frequency module comprising a high-frequency device-mounting package and an external circuit board, wherein said high-frequency device-mounting package includes a dielectric substrate having a first grounding layer contained therein, said dielectric substrate mounting a high-frequency device on one surface thereof and having, formed on one surface thereof, first high-frequency signal transmission lines connected to said high-frequency device, and having, formed on the other surface thereof, second high-frequency signal transmission lines coupled to said first high-frequency signal transmission lines; said external circuit board is constituted by a dielectric board having third high-frequency signal transmission lines and a second grounding layer, said third high-frequency signal transmission lines being formed on one surface of said dielectric board, and said second grounding layer being formed on the other surface of said dielectric board or inside thereof; and said high-frequency device-mounting pack
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: November 19, 2002
    Assignee: Kyocera Corporation
    Inventors: Yoshinobu Sawa, Shinichi Koriyama, Kenji Kitazawa, Hidehiro Minamiue
  • Patent number: 6472961
    Abstract: In a non-radiative dielectric line, slots opposing each other are respectively formed on two conductive plates and a dielectric strip is disposed within both the slots to form a NRD guide. Convex portions “P” protruding in the lateral direction to the propagating direction of an electromagnetic wave are formed at a predetermined position of the dielectric strip 3 while concave portions “H” are formed on internal surfaces of the slots in the conductive plates 1 and 2 so as to mate the both of them with each other. Variations in characteristics due to the positional slippage of the dielectric strip and so forth are prevented, and even when the dielectric strip is produced by machining, etc., the process is easily performed. Characteristics as a transmission line are also maintained without disturbing the electromagnetic field distribution in a mode to be propagated.
    Type: Grant
    Filed: June 19, 2000
    Date of Patent: October 29, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Atsushi Saitoh, Hiroshi Nishida, Toru Tanizaki, Ikuo Takakuwa
  • Publication number: 20020153977
    Abstract: A semiconductor device package adapted for use with high frequency signals and/or coaxial connections. The package has an angled coaxial input shielded by a plurality of vias. In one embodiment the coaxial input is orthogonal to a leadframe, and the coaxial input is matched to a transmission line on the leadframe.
    Type: Application
    Filed: April 18, 2001
    Publication date: October 24, 2002
    Inventors: Robert J. McDonough, Weimin Sun
  • Patent number: 6467152
    Abstract: A microwave microstrip/waveguide transition structure includes a substrate, an elongated microstrip layer residing on a surface of the substrate, and an elongated integral hollow waveguide on the surface of the substrate. The microstrip layer and a side of the hollow waveguide constitute a single continuous piece of metal. The transition structure is fabricated by providing a substrate, depositing a metallic layer on the substrate, and depositing a metallic hollow housing continuous with a portion of a length of the metallic layer. The metallic hollow waveguide bounded by the metallic layer and the metallic hollow housing and having a contained volume therewithin is thereby defined.
    Type: Grant
    Filed: December 11, 1999
    Date of Patent: October 22, 2002
    Assignee: Hughes Electronics Corp.
    Inventors: Hector J. De Los Santos, Yu-Hua Kao Lin, Andrew H. Kwon, Eric D. Ditmars, John R. Dunwoody
  • Patent number: 6469592
    Abstract: An RF microcircuit package and interconnection device is disclosed which minimizes impedance mismatch between circuit elements. Multiple signal via and close proximity ground vias as well as tuned wire bonds are disclosed.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: October 22, 2002
    Assignee: Hei, Inc.
    Inventors: River Guanghua Huang, Parker Chandler
  • Patent number: 6466113
    Abstract: A printed circuit architecture includes a relatively thick, stiffening base of thermally and electrically conductive material, and a laminate of conductive layers including a printed circuit structure, interleaved with dielectric layers, disposed atop the base. The patterned conductive layers contain an integrated circuit structure that is configured to provide RF signaling, microstrip shielding, and digital and analog control signal leads, and DC power. Low inductance electrical connectivity among the conductive layers and also between conductive layers and the base is provided by a plurality of conductive bores. Selected bores are counter-drilled at the RF signaling layer and filled with insulating plugs, which prevent shorting of the RF signal trace layer to ground, during solder reflow connection of leads of circuit components to the RF signaling layer.
    Type: Grant
    Filed: January 21, 2000
    Date of Patent: October 15, 2002
    Assignee: Spectrian Corporation
    Inventors: E. James Crescenzi, Jr., Anwar A. Mohammed
  • Publication number: 20020145479
    Abstract: Method of series connecting lumped elements in a slotline. A lumped element such as a resistor or diode is series connected in a slotline by inserting a high impedance stub in a portion of the slotline, and placing the series element across the junction of the slotline and the high impedance stub.
    Type: Application
    Filed: April 10, 2001
    Publication date: October 10, 2002
    Inventor: Blythe C. Deckman
  • Patent number: 6459347
    Abstract: Conductors extend parallel to one another in a device in the microwave range. Each conductor includes a conductive layer, a layer of a dielectric material and a ground plane. The ground planes of the two conductors are separated in the device by a core made of a dielectric material. The various layers are arranged on one another in the desired order, and a cavity is arranged in the device, extending from that layer in the first conductor which is to be connected to the second conductor, at right angles to the main direction of this layer, up to and including the layer on which the conductive layer of the second conductor is to lie. A component including a stripline conductor is arranged in the cavity, the component being arranged so that electrical contact is brought about between the conductor of the component and that layer in the first conductor which is to be connected to the second conductor.
    Type: Grant
    Filed: August 27, 1999
    Date of Patent: October 1, 2002
    Assignee: Telefonaktiebolaget LM Ericsson
    Inventors: Leif Bergstedt, Katarina Boustedt
  • Patent number: 6459343
    Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic discharge (ESD) protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. Also the ESD protection function is distributed among multiple ESD devices interconnected by series inductors to provide a multi-pole filter at each IC terminal.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: October 1, 2002
    Assignee: Formfactor, Inc.
    Inventor: Charles A. Miller
  • Patent number: 6452267
    Abstract: An integrated circuit device includes electrical conductors providing electrical communication between a substrate and a silicon chip. The silicon chip has first electronics and second electronics. The second electronics are for operating at higher frequencies than the first electronics. A first portion of electrical conductors are in communication with the first electronics and a second portion of electrical conductors are in communication with the second electronics. A first medium is positioned adjacent to the first portion of electrical conductors and a second medium is positioned adjacent to the second portion of electrical conductors. The second medium is different from the solid first medium.
    Type: Grant
    Filed: April 4, 2000
    Date of Patent: September 17, 2002
    Assignee: Applied Micro Circuits Corporation
    Inventors: Timothy L. LeClair, Mary Jo Nettles
  • Patent number: 6448865
    Abstract: In an interconnect system for providing access to a common I/O terminal for multiple circuit devices such as drivers, receivers and electrostatic protection devices implemented on an IC, each such device is provided with a separate contact pad within the IC. The contact pads are linked to one another and to the IC I/O terminal though inductive conductors such as bond wires, metalization layer traces in the IC, or legs of a forked, lithographically-defined spring contact formed on the IC. The conductor inductance isolates the capacitance of the circuit devices from one another, thereby improving characteristics of the frequency response of the interconnect system. The inductances of the conductors and various capacitances of the interconnect system are also appropriately adjusted to optimize desired interconnect system frequency response characteristics.
    Type: Grant
    Filed: February 25, 1999
    Date of Patent: September 10, 2002
    Assignee: Formfactor, Inc.
    Inventor: Charles A. Miller
  • Publication number: 20020123317
    Abstract: A radio frequency module packaging system and method characterized by compact package size, reduced packaging loss and variation, and reduced heat generation. The radio frequency module is provided with via holes, electrodes for signals, and grounding electrodes on the surface of a substrate. Under the electrodes for signals, via holes are made, and on both sides of the electrodes for signals, grounding via holes are made so that these via holes form microstrip lines. Both input and output ends of a high frequency circuit including an active device, formed as the module's functional circuit on the substrate, are routed through the via holes and connected to another circuit.
    Type: Application
    Filed: June 19, 2001
    Publication date: September 5, 2002
    Inventors: Takuma Tanimoto, Shinichiro Takatani, Hiroshi Kondoh
  • Publication number: 20020121947
    Abstract: A monolithic microwave integrated circuit (MMIC) includes a semiconductor substrate, active and passive devices formed on the semiconductor substrate, a dielectric layer formed to cover the active and passive devices on the semiconductor substrate, and a ground plane formed on the dielectric layer to ground the active device through the dielectric layer.
    Type: Application
    Filed: October 31, 2001
    Publication date: September 5, 2002
    Inventors: Dong-sik Shim, Sang-goog Lee
  • Patent number: 6445256
    Abstract: The present invention provides a small-sized oscillator facilitating the adjustment of a resonance frequency, permitting mass productivity to be improved, sufficiently suppressing a fundamental wave, and permitting cost reduction, and provides radio equipment using the oscillator. In this oscillator, an oscillation circuit is formed by providing a line and a Gunn diode on a dielectric substrate. An NRD guide serving as an output transmission line is formed by disposing a dielectric strip between upper and lower conductor plates, and the above-mentioned line and the NRD guide are coupled. The cut-off frequency of this NRD guide is determined so that the fundamental wave component of an oscillation signal from the oscillation circuit is cut off, so that higher harmonic components are propagated.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: September 3, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazumasa Haruta, Sadeo Yamashita, Koichi Sakamoto, Toru Tanizaki
  • Publication number: 20020113673
    Abstract: A printed circuit architecture includes a relatively thick, stiffening base of thermally and electrically conductive material, and a laminate of conductive layers including a printed circuit structure, interleaved with dielectric layers, disposed atop the base. The patterned conductive layers contain an integrated circuit structure that is configured to provide RF signaling, microstrip shielding, and digital and analog control signal leads, and DC power. Low inductance electrical connectivity among the conductive layers and also between conductive layers and the base is provided by a plurality of conductive bores. Selected bores are counter-drilled at the RF signaling layer and filled with insulating plugs, which prevent shorting of the RF signal trace layer to ground, during solder reflow connection of leads of circuit components to the RF signaling layer.
    Type: Application
    Filed: April 18, 2002
    Publication date: August 22, 2002
    Applicant: SPECTRIAN CORPORATION
    Inventors: E. James Crescenzi, Anwar A. Mohammed
  • Patent number: 6437669
    Abstract: An interface have been provided to permit the formation of solder connections between substrates suitable for microwave to millimeter wave frequencies. Specifically, signal traces on the substrate are selectively masked to form solder dams. The high temperature, thick-film solder dams define the bonding area and control the flow of solder. Since the solder dam forms a finite-extent structure, the solder mask minimally overlies the signal trace, and signal propagation through the trace is not degraded.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: August 20, 2002
    Assignee: Applied Micro Circuits Corporation
    Inventors: Robert B. Welstand, Timothy L. Leclair
  • Publication number: 20020105395
    Abstract: A DC block circuit comprises a conductive line (3) disposed on one surface of a dielectric substrate (1), via which an electrical signal is passed, an interdigital capacitor (6) forming a part of the conductive line (3), and a chip capacitor (4) that is disposed so that the interdigital capacitor (6) is sandwiched between the chip capacitor (4) and the dielectric substrate (1), and that is connected to the conductive line (3) so that the chip capacitor (4) is in parallel with the interdigital capacitor (6).
    Type: Application
    Filed: February 13, 2002
    Publication date: August 8, 2002
    Inventor: Minoru Tajima
  • Patent number: 6426686
    Abstract: A circuit package for a microwave signal comprises a substrate defining a MMIC surface of the substrate and an opposing non-MMIC surface of the substrate. The substrate is devoid of signal carrying vias. A waveguide is disposed on the MMIC surface of the substrate. A MMIC is disposed on the MMIC surface of the substrate, and the MMIC is in electrical communication with the waveguide. An I/O port is in electrical communication with the waveguide wherein a transmission path for the signal is provided from the I/O port, through the waveguide and to the MMIC. In an alternative exemplary embodiment of the invention, the I/O port of the circuit package is electrically connectable to a PC board. The MMIC surface of the substrate faces the PC board when the I/O port is electrically connected to the PC board.
    Type: Grant
    Filed: June 16, 1999
    Date of Patent: July 30, 2002
    Assignee: Microsubstrates Corporation
    Inventors: Daniel F. Douriet, Jorge M. Hernandez, M. P. Ramachandra Panicker
  • Patent number: 6418031
    Abstract: An improved method and means for decoupling a printed circuit board are disclosed. A power plane is included having a peripheral edge. The power plane includes a first region and a second region which is separate from and contiguous to the first region. The first region is located from the peripheral edge to a middle portion of the power plane. The first region includes a peripheral portion of the power plane. The second region includes only the middle portion of the power plane. A ground plane is coupled in parallel to the power plane. The ground plane has a peripheral edge. The ground plane includes a first region, and a second region which is separate from and contiguous to the first region. The first region includes the peripheral edge and includes a peripheral portion of the ground plane. The second region includes a middle portion of the ground plane. A first plurality of decoupling elements are connected to the first region of the power plane and to the first region of the ground plane.
    Type: Grant
    Filed: May 1, 2000
    Date of Patent: July 9, 2002
    Assignee: International Business Machines Corporation
    Inventor: Bruce Roy Archambeault
  • Patent number: 6417747
    Abstract: An RF interconnect is incorporated in RF module packages for direct attachment onto a multi-layer PWB using compressible center conductor (fuzz button) interconnects. The module has circuitry operating at microwave frequencies. The module package includes a metal housing including a metal bottom wall structure. The module includes a plurality of RF interconnects, which provide RF interconnection between the package and the PWB. Each interconnect includes a feedthrough center pin protruding through an opening formed in the metal bottom wall, with isolation provided by a dielectric feedthrough insulator. The center pin is surrounded with a ring of shield pins attached to the external surface of the bottom wall of the module housing. The pins are insertable in holes formed in the PWB, and make contact with fuzz button interconnects disposed in the holes. Circuitry connects the fuzz button interconnects to appropriate levels of the PWB for grounding and RF signal conduction.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: July 9, 2002
    Assignee: Raytheon Company
    Inventors: Timothy E. Dearden, Jeffrey J. Stitt, Clifton Quan
  • Publication number: 20020075106
    Abstract: A high frequency module device of a thin type, high precision and high functions in which the size and the cost of the package may be diminished. The module device includes a base substrate (2) and a high frequency device layer (4). The base substrate (2) is formed by forming a patterned wiring layer (9) on a first major surface (5a) of a core substrate (5) molded of an organic material exhibiting thermal resistance and high frequency characteristics. The uppermost layer of the base substrate (2) is planarized to form a high frequency device layer forming surface (3). The high frequency device layer portion (4) is formed on the high frequency device layer forming surface (3) by a thin film or thick film forming technique and includes intra-layer passive elements, made up of a resistor (27) and a capacitor (26). The passive elements are supplied with power or signals from the side base substrate.
    Type: Application
    Filed: September 13, 2001
    Publication date: June 20, 2002
    Inventors: Akihiko Okubora, Tsuyoshi Ogawa, Hirokazu Nakayama, Yoichi Oya
  • Publication number: 20020075105
    Abstract: A circuit package for a microwave signal comprises a substrate defining a MMIC surface of the substrate and an opposing non-MMIC surface of the substrate. The substrate is devoid of signal carrying vias. A waveguide is disposed on the MMIC surface of the substrate. A MMIC is disposed on the MMIC surface of the substrate, and the MMIC is in electrical communication with the waveguide. An I/O port is in electrical communication with the waveguide wherein a transmission path for the signal is provided from the I/O port, through the waveguide and to the MMIC. In an alternative exemplary embodiment of the invention, the I/O port of the circuit package is electrically connectable to a PC board. The MMIC surface of the substrate faces the PC board when the I/O port is electrically connected to the PC board.
    Type: Application
    Filed: June 16, 1999
    Publication date: June 20, 2002
    Inventors: DANIEL F. DOURIET, JORGE M. HERNANDEZ, M.P. RAMACHANDRA PANICKER
  • Patent number: 6384701
    Abstract: A microwave and millimeter wave device includes: a dielectric substrate including at least one signal line, a passive circuit and a first grounding conductor portion which are formed on a surface side of the dielectric substrate; and a semiconductor substrate including a plurality of active elements. The signal line is physically and electrically connected to an input/output terminal of the active element via a metal bump; and the first grounding conductor portion is physically and electrically connected to a grounding terminal of the active element via another metal bump.
    Type: Grant
    Filed: February 19, 1999
    Date of Patent: May 7, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Atsushi Yamada, Eiji Suematsu, Noriko Kakimoto
  • Patent number: 6369411
    Abstract: A semiconductor device including (a) a base plate, (b) an insulation substrate including of an insulator plate with a front electrode and a back electrode bonded thereon and fixed onto the base plate by the back electrode, (c) a semiconductor element fastened onto the insulation substrate by the front electrode, (d) an insulating cover covering the semiconductor element, and (e) electrodes that are led from the semiconductor element to the outside of the insulating cover. The back electrode is larger than the insulator plate, and the base plate has a through hole that is smaller than the back electrode and larger than the insulator plate. The insulation substrate is positioned in the through hole and is fastened onto the back surface of the base plate by the periphery of the back electrode. The insulation substrate can make direct contact with a heat sink without the base plate intervening therebetween, and thereby thermal resistance between the semiconductor element and the heat sink is decreased.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: April 9, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Hideo Matsumoto