Semiconductor Mounts Patents (Class 333/247)
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Patent number: 6023209Abstract: Two or three conductor coplanar transmission lines and lossy coplanar resistive films are formed on a surface of a substrate. The resistive film dimensions and resistivity are selected to suppress various spurious electromagnetic modes within and around the substrate. The resistive films may be positioned along the outer edges of the transmission lines or between the transmission line conductors. The resistive film may have regular spaced openings for producing an average resistivity different than that of a continuous resistive film. In one embodiment, a signal conductor has a serpentine shape and resistive film elements are positioned between adjacent sections of the signal conductor. In another embodiment, interdigitated resistive film elements extend between transmission line conductors.Type: GrantFiled: July 5, 1996Date of Patent: February 8, 2000Assignee: Endgate CorporationInventors: Mark V. Faulkner, Edward B. Stoneham, Clifford A. Mohwinkel, Mark J. Vaughan
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Patent number: 6023080Abstract: A semiconductor device comprises a dielectric substrate formed on a metal carrier, a semiconductor chip formed on the dielectric substrate and having a first electrode, a microstrip line formed on the dielectric substrate and having a second electrode to be connected to the first electrode, and wires, having different lengths, for connecting the first and second electrodes.Type: GrantFiled: February 11, 1998Date of Patent: February 8, 2000Assignee: Kabushiki Kaisha ToshibaInventor: Haruo Kojima
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Patent number: 6018283Abstract: An ultrawide bandwidth z-axis interconnect which has a z-axis lap joint structure with embedded ground planes that self compensate for the interface misalignment and impedance mismatch. The structure acts as a low pass filter that can be tailored to meet performance requirements from DC to in excess of 100 GHz. The area required for the interface is reduced while increasing the alignment tolerance range. The interconnect structure is easily modeled as a multi-element low pass filter with interfacing transmission lines (microstrip or stripline) to allow for rapid design efforts and reduction in cycle time for a program.Type: GrantFiled: December 17, 1997Date of Patent: January 25, 2000Assignee: Texas Instruments IncorporatedInventors: Cary Kyhl, Thomas P. Budka
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Patent number: 6014066Abstract: A stand-alone circuit board (3), a packaged surface mount PIN diode (1) and a metal ribbon (9) are mounted together in a new tented diode configuration. The flat end surface of the diode end terminal (4) is attached to a metal trace (5) on the circuit board, positioning the diode in an upstanding position, overlying the metal trace and leaving the other diode end terminal (2) in an elevated position over the circuit board. The metal ribbon wraps over the diode symmetrically extending along opposed sides of the diode to complete an electrical connect on the circuit board. In performance, the configuration emulates that prior configuration employing a thick metal plate backed circuit board. An improved RF switch incorporates the foregoing tented diode configuration.Type: GrantFiled: August 17, 1998Date of Patent: January 11, 2000Assignee: TRW Inc.Inventors: Harry S. Harberts, Jeffrey A. Grant
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Patent number: 6002375Abstract: A radio-frequency circuit (20) includes a hybrid integrated circuit (24) having a passive circuit element (38) and a d-c biasing circuit element (54) embedded within a first substrate (32) of a low cost and rugged first semiconducting material, and first and second active circuit elements (36, 40) embedded within second and third substrates (44, 46), respectively, of a second semiconductor material having the characterisitics of greater frangibility but higher gain than the first semiconductor material. The first and second activ circuit elements (36, 40) are substantially first and second single components (36, 40), and are each electrically coupled to the passive circuit element (38). The d-c biasing circuit element (54) is electrically coupled to the first and second active circuit elements (36, 40). The second and third substrates (44, 46) are physically coupled to the first substrate (32), which is thicker than either the second or third substrate (44, 46).Type: GrantFiled: September 2, 1997Date of Patent: December 14, 1999Assignee: Motorola, Inc.Inventors: David Warren Corman, Richard Scott Torkington, Stephen Chih-Hung Ma, Dean Lawrence Cook, Kenneth Brice-Heames
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Patent number: 5990757Abstract: Flip chip monolithic microwave integrated circuits (MMIC) devices formed on gallium arsenide substrates and use thermally bumped diodes and field effect transistor devices to achieve improved heat dissipation and power protection. Flip chip limiter MMIC devices and transmit/receive switch MMIC devices are specifically provided by the present invention. The flip chip gallium arsenide limiter and transmit/receive switch MMIC devices use plated metallized bumps for both I/O connections and for thermal connections to a host substrate (aluminum nitride). The present invention also incorporates coplanar waveguide transmission line, thereby eliminating backside processing of the gallium arsenide substrates. The transmit/receive switch device provides power protection in both transmit and receive modes.Type: GrantFiled: June 5, 1998Date of Patent: November 23, 1999Assignee: Raytheon CompanyInventors: S. Doug Tonomura, James M. Harris, Christopher A. Moye
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Patent number: 5990768Abstract: A millimeter waveguide is disclosed which includes: a first single crystal substrate having a groove therein; a conductor film on a surface of said groove and a surface of said first single crystal substrate connected to said surface of said groove; a second single crystal substrate covering said conductor film; and a microstrip line on a surface of said second single crystal substrate, exposed to a cavity in said groove. A protruding portion may be formed on a bottom surface of the groove. The microstrip line including foundation (nickel chromium) and conductive (gold) layers may be formed on a surface of the groove. A protruding portion may be formed on the second single crystal substrate, wherein the height of this protruding portion is less than the depth of the groove. A millimeter waveguide for a resonator is also disclosed wherein a cavity is formed in substrates with grounding conductive layers on surfaces of the cavity, a probe extending from a microstrip line on a top surface of the substrates.Type: GrantFiled: November 26, 1997Date of Patent: November 23, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuaki Takahashi, Mitsuo Makimoto
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Patent number: 5990732Abstract: A composite high frequency apparatus includes a high frequency filter and a high frequency switch which have a substantially reduced size and do not require an impedance matching circuit. The apparatus includes a multilayered base having an outer surface with a plurality of diodes, an external ground electrode, an external electrode for a transmission circuit, an external electrode for a receiving circuit, an external electrode for an antenna circuit and external electrodes for control terminals located thereon. A plurality of strip lines, capacitor electrodes and an external grounding electrode are located within the multilayered base.Type: GrantFiled: April 30, 1998Date of Patent: November 23, 1999Assignee: Murata Manufacturing Co., Ltd.Inventors: Koji Furutani, Norio Nakajima, Ken Tonegawa, Mitsuhide Kato, Koji Tanaka, Tatsuya Ueda
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Integrated circuit structure having an active microwave component and at least one passive component
Patent number: 5969405Abstract: Integrated circuit structure having an active microwave component and at least one passive component.A high-resistance silicon substrate (11) comprises an active microwave component (16) and at least two metallization planes (12, 14), which are insulated from one another by an insulation layer (13). A passive component surrounded by a grounded line (122) in one of the metallization planes (12) is provided, which comprises a first metal structure (121), which is realized in the first metallization plane (12), and a second metal structure (141), which is realized in the other metallization plane (14). The passive component is designed, in particular, as a capacitor, coil or resonator which comprises a capacitor and a coil.Type: GrantFiled: March 7, 1997Date of Patent: October 19, 1999Assignee: Seimens AktiengesellschaftInventor: Thomas Aeugle -
Patent number: 5946794Abstract: A composite microwave circuit module includes a multilayer dielectric substrate, upper- and lower-surface grounds, an antenna pattern, a plurality of shield via holes, and a large number of first holes. The upper- and lower-surface grounds are formed on upper and lower surfaces of the multilayer dielectric substrate, respectively, and the upper-surface ground has an opening portion for waveguide coupling. The antenna pattern is formed on an interlayer of the multilayer dielectric substrate by a high-frequency signal line in correspondence with the opening portion. The plurality of shield via holes are formed around the antenna pattern and filled with a filler material to form a pseudo waveguide structure. The first holes have cavities formed in the multilayer dielectric substrate in correspondence with the pseudo waveguide structure between the antenna pattern and the opening portion of the upper-surface substrate. A method of manufacturing this circuit module is also disclosed.Type: GrantFiled: June 19, 1997Date of Patent: September 7, 1999Assignee: NEC CorporationInventors: Takao Koizumi, Yuhei Kosugi
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Patent number: 5949312Abstract: A MMIC for providing a suspended transmission medium, comprising a MMIC chip, an upper ground plane overlying and spaced from critical circuitry and a lower ground plane underlying and spaced from the critical circuitry. The upper and lower ground planes are spaced from the critical circuitry at electrically similar distances. The portion of the MMIC chip that has the critical circuitry is suspended over a recess in the housing floor.Type: GrantFiled: October 30, 1997Date of Patent: September 7, 1999Assignee: Motorola, Inc.Inventors: Kenneth Vern Buer, David Warren Corman, Deborah Sue Dendy, James Roger Clark, II
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Patent number: 5942804Abstract: A means of connecting a plurality of essentially identical active devices is presented for the purpose of multifunction and multiple function operation. These devices, mounted on a chip, are flip-mounted to a circuit motherboard having large passive elements. A push-pull amplifier is presented as an example in which the multiple function operation is the combining of amplifiers whose active devices are on a single chip. The electromagnetic coupling, impedance matching and signal transmission are variously provided by the use of striplines, slotlines, coplanar waveguides, and a slotline converted into a coplanar waveguide.Type: GrantFiled: September 3, 1996Date of Patent: August 24, 1999Assignee: Endgate CorporationInventors: Clifford A. Mohwinkel, Mark Van Ness Faulkner
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Patent number: 5942960Abstract: A printed circuit board with a metal layer (15) arranged on its lower side and HF components (11, 12) arranged on its upper side, which components are connected by their input and/or output sides to HF sources, HF loads, or other HF components via microribbon lines (13, 14) and can be connected to a DC current source (21) via a separate connection line (20). To render possible a current-saving series arrangement of at least two HF components (11, 12),the metal layer (15) is electrically separated from the surrounding metal layer (15) by a gap (16) in the connection region of at least one HF component (11), andthe metal island (17) thus formed in the region below the microribbon connection line (13) associated with the HF component (11) has an HF coupling to the adjoining metal layer (15).Type: GrantFiled: September 23, 1997Date of Patent: August 24, 1999Assignee: U.S. Philips CorporationInventors: Ronald Schiltmans, Evangelos Avramis
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Patent number: 5939954Abstract: The present invention relates to an equivalent circuit of a package ground terminal paddle which is used to mount a microwave integrated circuit, and more particularly, to an approximate equivalent circuit of the package ground terminal paddle by which the expressions of parasitic components can be easily expanded according to the number of gold wires that are down-bonded to the paddle, by introducing an equivalent circuit structure which takes the impedance component output from each terminal as one common impedance component and grounds the common impedance.Type: GrantFiled: October 21, 1997Date of Patent: August 17, 1999Assignee: Electronics and Telecommunications Research InstituteInventors: Min Gun Kim, Choong Hwan Kim, Chang Seok Lee, Jae Jin Lee, Kwang Eui Pyun
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Patent number: 5929728Abstract: A technique for forming imbedded microwave structures in a microwave circuit package is presented. In one method, windows are punched, stamped or molded into metal laminate plates. A metal laminate layer is formed by fusing each of the metal laminate plates one on top of another, preferably using a diffusion bonding technique. The metal laminate layer is fused on top of a metal base plate, which is adhered to a ceramic substrate, and a shielded cover is fused on top of the metal laminate layer to form the imbedded waveguide structure as the base plate, metal laminate plates, and cover plate are fused together. In another method, indented cavities are formed in a shielded cover. The shielded cover is then fused, preferably using a diffusion bonding technique, to a metal base plate, which is adhered to a ceramic substrate.Type: GrantFiled: June 25, 1997Date of Patent: July 27, 1999Assignee: Hewlett-Packard CompanyInventors: Ronald J. Barnett, Anthony R. Blume
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Patent number: 5923225Abstract: Active electronic circuits are immersed in photonic bandgap crystals (PBC's) that form part of transmission lines for propagation of output signals of the electronic circuits. The output signals of the electronic circuits are accompanied by noise signals that result from spontaneous emission in emission frequency bands which are associated with the active electronic circuits. The PBC's are configured to have photonic bandgaps that include at least a portion of the emission frequency bands. Because the active electronic circuits are immersed in the photonic bandgap crystal, the launch of at least a portion of the noise signals into the transmission line is thereby inhibited. Consequently, the output signal and less than all of the noise signals are propagated along the transmission line, i.e., the noise content of the circuit output is reduced.Type: GrantFiled: October 3, 1997Date of Patent: July 13, 1999Inventor: Hector J. De Los Santos
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Patent number: 5917241Abstract: A high frequency semiconductor device includes a molded resin package having side surfaces; a source lead for die-bonding, having a thickness, partially disposed within the package, and penetrating through the side surfaces of the package; gate and drain leads having the same thickness as the source lead and disposed adjacent to and spaced from the source lead by a distance shorter than the thickness of the source lead, the gate and drain leads being partially disposed within the package and penetrating through the side surfaces of the package; and a field effect transistor die-bonded to the source lead within the package and electrically connected within the package to the source, gate, and drain leads.Type: GrantFiled: October 28, 1996Date of Patent: June 29, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Osamu Nakayama, Jun Ohtsuji, Yukio Nakamura
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Patent number: 5917388Abstract: The invention provides a microwave module including a plurality of stacked elementary structures forming a unit, each elementary structure comprising a bottom dielectric layer on a top surface of which an integrated circuit (20, 21) is disposed, and a top dielectric layer covering the circuit (20, 21). The module is characterized by a connection line (20a, 30, 21a) between two respective circuits belonging to first and second elementary structures, the connection line being constituted by an input coplanar line (21a) disposed on the top surface of the bottom dielectric layer of the first structure, by an output coplanar line (20a) disposed on the top surface of the bottom dielectric layer of the second structure, and a by link coplanar line (30) connecting one end of the input coplanar line to one end of the output coplanar line.Type: GrantFiled: April 3, 1997Date of Patent: June 29, 1999Assignee: Alcatel EspaceInventors: Christian Tronche, Philippe Monfraix, Augustin Coello Vera
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Patent number: 5913134Abstract: A micromachined self-packaged circuit provides at least partial shielding of a circuit element. Preferably, all the elements comprising a circuit are completely shielded between a first wafer of semi-conductor material having a recess and receiving a metallized layer therebeneath and a second wafer of semi-conductor material having a groove in a bottom face against which is received a metallized layer. The first wafer metallized face is then adhesively bonded to the second wafer on a surface opposite the metallized layer to which a circuit is affixed. The second wafer metallized face and metallized grooves cooperate with the first wafer metallized face to provide a shielded circuit cavity therebetween. Alternatively, the first or second wafer can be used alone to partially shield a circuit element.Type: GrantFiled: December 5, 1996Date of Patent: June 15, 1999Assignee: The Regents of the University of MichiganInventors: Rhonda Franklin Drayton, Linda P. B. Katehi
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Patent number: 5912484Abstract: An intrinsic device section is provided by laminating a drain area, an intermediate area, and a source area above a GaAs substrate and by forming a channel area at one oblique surface thereof. A drain electrode ohmic connected to the drain area extends toward the output side, a source electrode ohmic connected to the source area extends above the drain electrode with a dielectric layer placed therebetween, and thereby an output micro-wave transmission line is formed. A gate electrode Schottky connected to the channel area extends toward the input side, the source electrode extends above the drain electrode with the dielectric layer placed therebetween, and thereby an input micro-wave transmission line formed.Type: GrantFiled: June 20, 1997Date of Patent: June 15, 1999Assignee: Murata Manufacturing Co., Ltd.Inventors: Yohei Ishikawa, Koichi Sakamoto
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Patent number: 5903239Abstract: An antenna apparatus comprises: a first chip having: a substrate; a ground film on the substrate; a dielectric film on the ground film; a micro-patch antenna on the dielectric film; a microstrip line extending from the micro-patch antenna; and an in/output microstrip line on the dielectric film; a second chip having a circuit for effecting an operation with the antenna; and a connecting portion for fixing the second chip to the first chip by providing mechanical and electrical connection (flip-chip bonding) between the circuit and the microstrip line and between the circuit and the in/output microstrip line. The substrate comprises a silicon, a GaAs substrate, or a dielectric substrate. The antenna may be provided on the bottom surface of the substrate and be provided on a third substrate also connected by the flip-chip bonding wherein the second chip and the antenna is connected using a through hole. Instead of the through hole, the antenna is coupled to the circuit portion electromagnetically.Type: GrantFiled: May 26, 1995Date of Patent: May 11, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuaki Takahashi, Suguru Fujita, Morikazu Sagawa
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Patent number: 5886597Abstract: A resonant via-type connection between layers of a multilayer support structure having, at predetermined RF frequencies, a very low, effectively short circuit impedance. The resonant vias utilize the inductance of a via post by forming it into a resonant circuit with a capacitance at the via's distal end coupled to another conductor. A plurality of resonant vias can be formed having respective plurality of resonant frequencies to form a wideband connection. The capacitances at the vias' distal ends coupling to another conductor can be formed to resonate with the total series inductance of the via post and of wire connections to an attached device.Type: GrantFiled: March 28, 1997Date of Patent: March 23, 1999Assignee: Virginia Tech Intellectual Properties, Inc.Inventor: Sedki M. Riad
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Patent number: 5880657Abstract: The propagation of very high frequency signals, e.g., 8 to 10 GHz, via a path printed on a printed wiring board is enhanced by arranging the path so that it simulates a high-quality transmission path at very high frequencies. The path comprises a conventional lead and a series of microstrips, in which the design of the microstrips is optimized to (a) minimize insertion loss and group delay distortion, (b) maximize return loss, and (c) minimize pulse distortion.Type: GrantFiled: May 29, 1997Date of Patent: March 9, 1999Assignee: Lucent Technologies, Inc.Inventors: Claus Dorschky, Sean Ortiz, Kwangsoo Park, Roland Seitz, David L. Wilson
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Patent number: 5872485Abstract: An amplifying circuit is formed by a combination of a dielectric line waveguide and a semiconductor device. Two electrically conductive plates are provided substantially parallel to each other. Two dielectric strips are disposed between the two conductive plates, and a dielectric plate is further inserted between the dielectric strips. Ground conductors are formed on the dielectric plate. The ground conductors have an area which equals an amount required for blocking a RF signal propagating in the dielectric line waveguide. A slot line is formed between the ground conductors in a position intermediate opposed sides of the dielectric strips. Line-switching conductor patterns are provided at both sides of the ends of the slot line. A field-effect transistor is mounted on the slot line such that it bridges over the slot line. Accordingly, losses and distortion of an RF signal, which would occur in an input/output circuit, are suppressed, and the generation of parasitic coupling is eliminated.Type: GrantFiled: July 28, 1997Date of Patent: February 16, 1999Assignee: Murata Manufacturing Co., Ltd.Inventors: Yohei Ishikawa, Koichi Sakamoto, Sadao Yamashita, Takehisa Kajikawa
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Patent number: 5869903Abstract: A semiconductor device includes a circuit substrate having a first surface on which a high-frequency circuit is located; a first metal layer disposed on a second surface of the circuit substrate; bump wirings on the first surface of the circuit substrate and electrically connected to the high-frequency circuit; a metal wall disposed on the first surface of the circuit substrate surrounding the high-frequency circuit; a wiring substrate having one surface on which substrate wirings corresponding to the bump wirings are located, the wiring substrate being disposed on the circuit substrate so that the substrate wirings are electrically connected to the bump wirings, and in contact with the metal wall, sealing a region including the high-frequency circuit; and a second metal layer disposed on a second surface of the wiring substrate. An electromagnetic shielding effect sufficient for use in a high-frequency circuit is obtained and fabricating cost is considerably reduced.Type: GrantFiled: January 31, 1997Date of Patent: February 9, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Mitsunori Nakatani, Hirofumi Nakano
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Patent number: 5852391Abstract: A high-performance low-cost functional module package handles microwaves or millimeter waves. The package has multilayered dielectric substrates, signal through holes (25, 28) connected to signal conductors that are formed on one of the dielectric substrates, and ground through holes (24, 26, 27, 29) connected to ground conductors that are formed on another of the dielectric substrates. The through holes are formed on side faces of the dielectric substrates and serve as terminals. Each pair of the ground through holes (24 and 26, or 27 and 29) is arranged on opposite sides of a corresponding one (25 or 28) of the signal through holes. The terminals are positioned between parts of the package to be connected to an external circuit board and the signal and ground conductors.Type: GrantFiled: July 16, 1996Date of Patent: December 22, 1998Assignee: Fujitsu LimitedInventors: Shin Watanabe, Tominaga Watanabe, Hideki Ikuta
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Patent number: 5847453Abstract: A microwave circuit package includes a metallic base plate on which are mounted a plurality of monolithic microwave integrated circuits (MMICs) and a spacer, made of a dielectric material, separating the MMICs from each other, and the MMICs and spacer are sealed in the package. The provision of the spacer substantially reduces the volume of the interior space of the package. A dielectric substrate having generally the same height as substrates of the MMICs may also be mounted on the metallic base plate, and a strip conductor may be provided on the dielectric substrate so as to form a microstrip line thereon.Type: GrantFiled: March 19, 1997Date of Patent: December 8, 1998Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Hiroshi Uematsu, Hiroshi Kudoh, Masanobu Urabe
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Patent number: 5844321Abstract: A semiconductor device comprises a chip soldered to a support. The chip comprises a semiconductor substrate, a via a ground plane on a rear surface, and an anti-adhesion layer deposited continuously inside the via. A solder layer which does not wet the anti-adhesion layer but which does wet the ground plane has a globular shape in the via opening and makes no mechanical contact with the walls of the via. The manufacturing process comprises the sandwiching of a soldering preform between the support and the rear surface provided with the ground plane and said anti-adhesion layer, and melting of the preform under pressure so that the solder rises in globular shape inside the via. The anti-adhesion layer is realized without mask.Type: GrantFiled: February 28, 1997Date of Patent: December 1, 1998Assignee: U.S. Philips CorporationInventor: Pierre Baudet
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Patent number: 5832598Abstract: A low cost microwave circuit package having high performance characteristics is disclosed. The package operates in the frequency range up to 90 GHz while requiring less space on the printed circuit board. Space savings is provided by small components and the leadless design of the package. Taking the place of leads is a ball grid array and RF ports. An unlimited number of layout designs are possible within an ?s! matrix close to ##EQU1## within the operating frequency band of the package, for any pair of signal transmission ports.Type: GrantFiled: November 1, 1996Date of Patent: November 10, 1998Assignee: Circuit Components IncorporatedInventors: Norman L. Greenman, Jorge M. Hernandez, M. P. Ramachandra Panicker
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Patent number: 5831489Abstract: Operating high frequency cryogenic superconductor devices requires an enclosure that permits application of wide band RF signals from an external source to the superconductor device while maintaining the device at cryogenic temperatures in an essentially magnetic field free environment. A magnetic field shielding enclosure is formed of inner (5, 7) and outer (9, 11) mumetal containers, one larger than the other in size. Each of those containers is formed of two open-ended container like pieces that are nested together with overlapping side walls to define two generally closed regions, the first containing the cryogenic superconductor device (1) and the second (9, 11) containing the first container (5, 7). A shielded high bandwidth transmission line (12), sufficiently compliant physically, is snaked through slight clearance spaces between the pieces of each of those containers to the superconductor device.Type: GrantFiled: September 19, 1996Date of Patent: November 3, 1998Assignee: TRW Inc.Inventor: Michael S. Wire
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Patent number: 5821827Abstract: An oscillator circuit having a flip chip metalization pattern and base substrate metalization pattern is defined such that a common-drain oscillator is configured with the common drain interposed between the source and gate terminals, providing an effective RF common reference with reduced parasitic inductance elements which otherwise degrade oscillator power and phase noise at high frequencies. Multiple sets of such patterns on the substrate and such three-terminal devices on the flip chip are arranged such that conductor patterns on the substrate connecting separately from the gates and the sources of the multiple devices to the common-drain reference are easily configured into separable tuning (or resonator) and feedback circuits. A common-drain oscillator having an interdigitated capacitor coplanar cavity resonator circuit as the gate input circuit having reduced distributed inductance is realized utilizing the interposed common-drain connections provided thereby.Type: GrantFiled: December 18, 1996Date of Patent: October 13, 1998Assignee: Endgate CorporationInventors: Clifford A. Mohwinkel, Edward B. Stoneham
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Patent number: 5808519Abstract: A millimeter-wave device includes a pedestal having an upper surface; a microwave IC chip operating at a millimeter wave band, the chip being mounted on the upper surface of the pedestal; line substrates having respective transmission lines connected to the microwave IC chip, the line substrates being mounted on opposite sides of the microwave IC chip on the upper surface of the pedestal; a lid covering and sealing the microwave IC chip and the line substrates, the lid being disposed opposite the upper surface of the pedestal; and waveguides, each waveguide including a waveguide input/output part having an opening penetrating the pedestal transverse to the upper surface and a waveguide end portion connected to the waveguide input/output part, the waveguides being disposed in the vicinity of opposite ends of the pedestal.Type: GrantFiled: February 28, 1997Date of Patent: September 15, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Kei Gotoh, Yoshihiro Notani, Takayuki Katoh
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Patent number: 5796321Abstract: An apparatus for the propagation of microwaves, particularly ultrahigh frequency waves. A substrate has formed therein a cavity open on one of the sides of the substrate. A membrane is deposited on the substrate above the cavity. At least one transmission line is located on the membrane which is able to propagate an ultrahigh frequency wave. An integrated circuit for rigidifying the membrane is fixed to the transmission line or to the membrane on the side where the line is located.Type: GrantFiled: July 30, 1996Date of Patent: August 18, 1998Assignee: Commissariat a l'Energie AtomiqueInventors: Patrice Caillat, Claude Massit
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Patent number: 5783976Abstract: A composite high frequency apparatus includes a high frequency filter and a high frequency switch which have a substantially reduced size and do not require an impedance matching circuit. The apparatus includes a multilayered base having an outer surface with a plurality of diodes, an external ground electrode, an external electrode for a transmission circuit, an external electrode for a receiving circuit, an external electrode for an antenna circuit and external electrodes for control terminals located thereon. A plurality of strip lines, capacitor electrodes and an external grounding electrode are located within the multilayered base.Type: GrantFiled: August 24, 1995Date of Patent: July 21, 1998Assignee: Murata Manufacturing Co., Ltd.Inventors: Koji Furutani, Norio Nakajima, Ken Tonegawa, Mitsuhide Kato, Koji Tanaka, Tatsuya Ueda
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Patent number: 5777529Abstract: An integrated circuit assembly and a method for distributed broadcasting of high speed chip input signals to a series of on-chip destination cells is provided, which eliminates the need for input buffers. A bufferless distributed broadcasting path is provided by matching the impedances off-chip conductive trace, i.e. a package trace, which together with interface circuitry forms a first transmission line, and on-chip conductive traces which form a second transmission line, to provide a constant impedance transmission line extending from a package trace to the far end of the on-chip trace. The method of bufferless distributed circuit (BDC) broadcasting is applicable to chip designs such as a crosspoint switch, parallel multiplier and distributed amplifier, and provides advantages of lower signal delay and power dissipation. In an experimental GaAs HBT 8.times.Type: GrantFiled: October 10, 1996Date of Patent: July 7, 1998Assignee: Northern Telecom LimitedInventor: Kerry S. Lowe
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Patent number: 5773887Abstract: A high frequency semiconductor component (10) includes a first substrate (12) having a first surface (13) opposite a second surface (14), a first electrically conductive layer (16) supported by the first surface (13) of the first substrate (12), a second electrically conductive layer (17) supported by the second surface (14) of the first substrate (12) wherein the second electrically conductive layer (17) is electrically coupled to the first electrically conductive layer (16), a second substrate (19) having a first surface (20) and a second surface (21), a third electrically conductive layer (22) supported by the first surface (20) of the second substrate (19), and an electrically insulating layer (23) between the second and third electrically conductive layers (17, 22) wherein the second and third electrically conductive layers (17, 22) are electrically coupled together through the electrically insulating layer (23).Type: GrantFiled: June 20, 1997Date of Patent: June 30, 1998Assignee: Motorola, Inc.Inventors: Anthony M. Pavio, William M. Vassar
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Patent number: 5768109Abstract: A multi-layer circuit board (11) has a cofired ceramic with a configuration of circuit traces (27) extending though differing layers of the multi-layer circuit board (11) to facilitate mountable conductive contact with semiconductor flip chips (13). Via holes (23) are precisely formed in the multi-layer circuit board (11) and are filled with solder or conductive epoxy. Semiconductor chips (13) have an array of metallic posts (19) alignable with the holes (23) and are mounted upon the upper surface of the multi-layer circuit board (11) in plug fashion. An aperture (25) may be formed in multi-layer circuit board (11) directly below each semiconductor chip (13) for protection of the circuitry on semiconductor chip (13) from contact with multi-layer circuit board (11). The via holes (23) and transmission line structure of the circuit board (11) are precisely formed to achieve a desired characteristic impedance.Type: GrantFiled: July 22, 1996Date of Patent: June 16, 1998Assignee: Hughes ElectronicsInventors: Jon J. Gulick, Craig K. Shoda
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Patent number: 5764119Abstract: A wiring board for high-frequency signals, which comprises, a substrate, a dielectric layer formed on the substrate and provided on its surface with a U-shaped groove having an arcuate bottom for forming a wiring therein, and a signal wiring formed in the U-shaped groove, which is featured in that an upper end portion of the signal wiring is protruded out of the surface of the dielectric layer. A distance (H) from a protruded top surface of the signal wiring to a bottom of the U-shaped groove and a width (W) of the U-shaped groove preferably meet a relationship of 2<(W/H)<50, and the height of the portion of signal wiring which is protruded out of the surface of the dielectric layer is preferably in the range of 10 nm to 10 .mu.m.Type: GrantFiled: October 3, 1996Date of Patent: June 9, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Miyagi, Yuji Iseki, Yasushi Shizuki, Kunio Yoshihara, Masayuki Saito, Kazuhito Higuchi, Takeshi Hanawa, Eiji Takagi
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Patent number: 5752182Abstract: On a ceramic substrate, spiral-type inductors of a single layer wiring of a metal thin film are provided and respectively connected to a wiring pattern formed on another face of the substrate via through holes. A semiconductor chip is flip-chip mounted on the substrate in a face-down manner. On the face of the semiconductor chip, capacitors composed of a highly dielectric material, resistors formed by an ion implantation method or a thin-film forming method, and FETs are provided, respectively. Interconnection between the substrate and an external circuit board is achieved employing terminals formed at end faces of the substrate. The terminals have a concave shape with respect to the end face of the substrate. Thus, there is no need to use a package, and miniaturization and reduction in cost of a high-performance hybrid IC is achieved.Type: GrantFiled: May 2, 1995Date of Patent: May 12, 1998Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tadayoshi Nakatsuka, Junji Itoh, Shinji Yamamoto, Mitsuru Nishitsuji
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Patent number: 5751201Abstract: A resonator includes a substrate (15) having a first dielectric constant, an insulative layer (16, 31) overlying the substrate (15) and having a second dielectric constant wherein the second dielectric constant is lower than the first dielectric constant, and a electrically conductive layer (11) overlying the insulative layer (16, 31). The resonator has a higher "Q" factor than the prior art.Type: GrantFiled: June 19, 1996Date of Patent: May 12, 1998Assignee: Motorola, Inc.Inventor: Anthony M. Pavio
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Patent number: 5729439Abstract: A printed wiring substrate in which first and second parts are mounted in adjacent with each other on soldering lands formed on an insulative board and put to reflow soldering, wherein the width of the land on which at least one of the parts is soldered is made greater on the side where the pants oppose to each other and made gradually narrowed toward the opposite side. By varying the width of the soldering land in reflow soldering using a cream solder, the surface tension of the solder is exerted such that the two parts are drawn to each other and brought into intimate contact thereby enabling close contact soldering.Type: GrantFiled: September 11, 1996Date of Patent: March 17, 1998Assignee: Alps Electric Co., Ltd.Inventor: Ichiro Saito
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Patent number: 5698898Abstract: A bolt (42a) is connected to a copper plate (9a) by a first electrode (51a), a second electrode (52a) and a wire (10a) for connecting the first and second electrodes. Similarly, a bolt (42b) is connected to a copper plate (9b) by a first electrode (51b), a second electrode (52b) and a wire (10b) for connecting the first and second electrodes. The wires (10a, 10b) are flexible and made of aluminum, for example. Electrical connection can be kept and the upper bound of absorption of the stress applied between the bolts (42a, 42b) and the copper plates (9a, 9b) can be increased.Type: GrantFiled: May 21, 1996Date of Patent: December 16, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Hideo Matsumoto
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Patent number: 5691673Abstract: In a semiconductor integrated circuit apparatus, a semiconductor chip (device, or module) has input/output portions each connected to two external pins (or terminals). The two external pins are connected to an incoming transmission line and an outgoing transmission line, respectively. The following formula is satisfied: ##EQU1## where Z is an impedance of each of the transmission lines; L1 and L2 are inductances of the two pins; and C1 is a capacitance of each of the input/output portions.Type: GrantFiled: June 17, 1996Date of Patent: November 25, 1997Assignee: NEC CorporationInventor: Toru Ishikawa
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Patent number: 5689138Abstract: A semiconductor device for microwave frequencies with a substrate which is provided at a first side with a semiconductor element, a passive element, and a pattern of conductive elements, while the opposed, second side is provided with a metallization which is connected to the elements present on the first side through windows formed in the substrate. The substrate consists of a silicon layer which is present on a layer of insulating material, the semiconductor element being formed in the silicon layer, and the metallization being provided on that side of the layer of insulating material which is remote from the silicon layer. The silicon layer may here have a very small thickness of, for example, 0.1 to 0.2 .mu.m. In such a thin silicon layer, bipolar and field effect transistors capable of processing signals of microwave frequencies can be formed. Since the silicon layer is thin, the influence of the conductivity of silicon on passive elements is small.Type: GrantFiled: October 26, 1995Date of Patent: November 18, 1997Assignee: U.S. Philips CorporationInventors: Ronald Dekker, Henricus G. R. Maas, Wilhelmus T. A. J. Van Den Einden
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Patent number: 5677570Abstract: A semiconductor integrated circuit device is provided for high-frequency or high-speed circuitry having stabilized characteristics and reduced influence on surrounding devices. In the device structure, ground leads extending from a metal substrate or metal layer for mounting ICs for high-frequency or high-speed circuitry are disposed adjacent to at least one side of signal leads and a width W or a space S of at least a part of the leads are set to inherent values for reducing the inductance of ground leads. Further, passive circuit chips for short-circuiting or blocking a high frequency signal are mounted on the metal substrate to suppress high-frequency component signals flowing through power supply leads and ground leads.Type: GrantFiled: February 16, 1996Date of Patent: October 14, 1997Assignee: Hitachi, Ltd.Inventors: Hiroshi Kondoh, Eiichi Hase, Tooru Fujioka, Kazumichi Sakamoto, Tomio Yamada, Toshio Miyamoto, Isao Arai
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Patent number: 5668512Abstract: A radio-frequency power amplifier includes a multiple-FET chip that is flip mounted on a connection region of a substrate. An input impedance-matching network is also mounted on the substrate. The network includes a coplanar waveguide having an elongate waveguide signal conductor for each gate terminal on the FET chip with a distal end spaced from the connection region and a proximal end in the connection region. The distal ends are connected to a single base input conductor. The proximal ends are flip mounted to respective ones of gate terminals of the FET chip. A capacitor couples each of the input signal conductor distal ends to an adjacent ground conductor. The signal conductors and capacitors provide a selected impedance at a selected frequency. The capacitors may be on a separate chip flip mounted to the waveguide signal and ground conductors, and may be formed as coplanar waveguides with open-ended signal conductors.Type: GrantFiled: June 12, 1996Date of Patent: September 16, 1997Assignee: Endgate CorporationInventors: Clifford A. Mohwinkel, Edwin F. Johnson, Edward B. Stoneham
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Patent number: 5652696Abstract: A high frequency microwave integrated circuit assembly (14,20) includes a fragile monolithic microwave integrated circuit (MMIC) chip (22) mounted in an MMIC subassembly (20) that is completely assembled, tested and burned in independent of the main high frequency microwave integrated circuit assembly and is mechanically attached to the main assembly by a captivation screw (100). The MMIC chip (22) is bonded to an uppermost tier (30) of a multi-tier spaced pedestal (26) and is received within an aperture (46) within a slave board (44) that itself is mounted and bonded to a lower tier (28) of the pedestal (26). The main integrated circuit assembly is formed with a rectangular opening (84) in an upper portion of its substrate to non-rotationally receive the rectangular slave board and a slightly larger internally threaded circular hole (94) in a lower portion of the main assembly substrate that threadedly receive the captivation screw (100).Type: GrantFiled: September 25, 1995Date of Patent: July 29, 1997Assignee: Hughes Aircraft CompanyInventors: Patrick A. Traylor, Richard A. Holloway
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Patent number: 5650760Abstract: Microwave ports and low-frequency ports of a microwave enclosure are configured to realize high return losses and low insertion losses and suppress resonance modes below a predetermined microwave frequency. The microwave ports include microwave transmission lines which have first and second microstrip portions and a stripline portion which connects the first and second microstrip portions. The microwave transmission lines are positioned with the stripline portion received in a housing aperture. The low-frequency ports include a dielectric member and a plurality of metallic signal lines carried within the dielectric member. The dielectric member is relieved to expose inner and outer ends of the signal lines. The connector systems are received in housing apertures with metallic members positioned through the dielectric members and across the connector apertures to electrically partition the connector apertures into subapertures which each have a predetermined microwave cutoff frequency.Type: GrantFiled: November 13, 1995Date of Patent: July 22, 1997Assignee: Hughes Aircraft CompanyInventors: Joginder S. Degun, Robert A. Brunner
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Patent number: 5644277Abstract: A vertical interconnect structure comprising a three-wire-line transmission line structure for providing electrical continuity between different levels of a multilevel substrate. The present invention provides a means for transferring power between various levels of the substrate without introducing excessive additional RE losses. First and second coplanar transmission line structures are disposed on first and second surfaces of the substrate. A vertical interconnect structure is disposed in the multilevel RF substrate and is coupled between the first and second transmission line structures. The vertical interconnect structure comprises three conductors having predetermined cross-sectional dimensions and predetermined separations therebetween that are adapted to transfer RE power between the first and second transmission line structures.Type: GrantFiled: November 6, 1995Date of Patent: July 1, 1997Assignee: Hughes Aircraft CompanyInventors: Jon J. Gulick, John J. Wooldridge
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Patent number: RE35869Abstract: An active device, such as a field effect transistor ("FET") or MMIC, converts microwave signals between a microstrip transmission line ("microstrip") and a coplanar wave guide ("CPW"). In microstrip-to-CPW conversion using a simple FET, a gate connection is made to the microstrip signal conductor. A drain connection is made to the center conductor on the CPW. Two FET source terminals are connected respectively to each CPW ground strip. The ground strips are electrically coupled to the microstrip ground plane with a minimum length connection so the inductance common to the FET input and output is minimized. The FET can be reconnected so as to reverse the input and output, providing for conversion of signals from CPW to microstrip. Conversion from microstrip to an intermediate CPW and back to microstrip provides for mounting an intermediate circuit, such as an amplifier or other MMIC, directly on the CPW.Type: GrantFiled: July 12, 1997Date of Patent: August 11, 1998Assignee: Endgate CorporationInventor: Clifford A. Mohwinkel