Abstract: A resistor is provided with a resistance body and a pair of electrodes connected to the resistance body (a first electrode body, a second electrode body), the resistance body being arranged so as to be at least separated away from a substrate board (a circuit board) when mounted on the substrate board (the circuit board), wherein the resistor has the oxide film on at least one of the resistance body and each of the electrodes (the first electrode body, the second electrode body) at a boundary portion (a bonded portion, a bonded portion) between the resistance body and each of the electrodes (the first electrode body, the second electrode body) on the mounting surface of the resistor.

Abstract: Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a resistive structure overlying the substrate. The resistor also comprises a conductive contact overlying and electrically coupled to the resistive structure. A capping structure is disposed over the conductive contact, wherein the capping structure extends laterally over an upper surface of the conductive contact and vertically along a first sidewall of the conductive contact, such that a lower surface of the capping structure is disposed below a lower surface of the conductive contact.

Abstract: A method to form an inductor, the method comprising: forming a metal structure by removing unwanted portions of the metal plate to form a first electrode, a second electrode, and a bare conductor wire between the first electrode and the second electrode, wherein a first thickness of the first electrode is greater than a thickness of the bare conductor wire, and a second thickness of the second electrode is greater than said thickness of the bare conductor wire; and forming a magnetic body to encapsulate the bare conductor wire, and a least one portion of the first electrode and a least one portion of the second electrode.

Abstract: A multilayer printed circuit board includes a plurality of conductive layers formed by a conductive material, in which a blank region with the conductive material removed is formed in at least part of at least an intermediate conductive layer that is formed inside the multilayer printed circuit board, among the plurality of conductive layers, a plurality of island regions are formed by the conductive material included in the intermediate conductive layer in the blank region, and each of the plurality of island regions is not electrically connected to other regions included in the intermediate conductive layer and is disposed so as to be dispersed from one another.

Abstract: Disclosed is a sheet resistor designed to operate in a high frequency environment. Unlike conventional sheet resistors, the equivalent series inductance (ESL) is minimized or even eliminated altogether when using the designed sheet resistor. As a result, better signal isolation can be achieved.

Abstract: An inductive component is disclosed, the inductive component comprising a metal structure, comprising a bare conductor wire, a first electrode and a second electrode, wherein the first electrode and the second electrode are integrally formed with the bare conductor wire, wherein a first thickness of the first electrode is greater than that of the bare conductor wire and a second thickness of the second electrode is greater than that of the bare conductor wire; and a magnetic body encapsulating the bare conductor wire, at least one portion of the first electrode, and at least one portion of the second electrode, wherein the first lateral surface of the first electrode and the second lateral surface of the second electrode are embedded inside the magnetic body.

Abstract: The present invention is provided with a base electrode layer forming step of forming a base electrode layer on both surfaces of a thermistor wafer formed of a thermistor material, a chip forming step of obtaining a thermistor chip with a base electrode layer by cutting the thermistor wafer to form chips, a protective film forming step of forming a protective film formed of an oxide on an entire surface of the thermistor chip with a base electrode layer, a cover electrode layer forming step of forming a cover electrode layer by applying and sintering a conductive paste on an end surface of the thermistor chip with a base electrode layer, and a conduction heat treatment step of performing a heat treatment such that the base electrode layer and the cover electrode layer are electrically conductive, in which the electrode portion is formed.

Abstract: In a method of manufacturing a cartridge of an electronic vaping device, wherein the cartridge includes a pre-vapor formulation storage element, an electrical resistor is physically manipulated to change a resistance of the electrical resistor from a first resistance value to a second resistance value, the second resistance value indicative of a pre-vapor formulation substrate contained in the pre-vapor formulation storage element. The electrical resistor is then mounted to a portion of the cartridge.

Abstract: A method for fabricating a semiconductor structure includes forming a plurality of semiconductor fins protruding through a trench isolation region above a substrate. A first gate structure is formed over a first of the plurality of semiconductor fins. A second gate structure is formed over a second of the plurality of semiconductor fins. A gate edge isolation structure is formed laterally between and in contact with the first gate structure and the second gate structure, the gate edge isolation structure on the trench isolation region and extending above an uppermost surface of the first gate structure and the second gate structure. A precision resistor is formed on the gate edge isolation structure, wherein the precision resistor and the first gate structure and second gate structure comprise a same material layer.

Abstract: One aspect is a resistor component for surface mounting on a printed circuit board, including a ceramic substrate with a first side and an opposite second side. A sinterable metallization is at least in some regions arranged on the second side. A resistance element comprising a metal layer is arranged at least in some regions on the first side of the ceramic substrate with a first connection and a second connection. An insulation layer is arranged at least in some regions on the resistance element and the ceramic substrate. A first region on the first connection and a second region on the second connection remain uncovered by the insulation layer. A first contact pad electrically contacts the first connection via the first region, and a second contact pad electrically contacts the second connection via the second region.

Abstract: Aspects of the disclosure relate to apparatus and methods for producing a downhole electrical component, having steps of providing a non-conductive polymer substrate, establishing an active area on the non-conductive polymer substrate, patterning the active area on the non-conductive polymer substrate with a conductive material through an additive manufacturing process and incorporating the patterned non-conductive polymer substrate into a final arrangement.

Abstract: A resistor circuit, an artificial intelligence chip and a method for manufacturing the same are provided. The resistor circuit includes a stack structure. The stack structure includes resistive material layers and insulating layers stacked alternately. The resistor circuit includes at least two unit resistors electrically connected in series or parallel. The at least two unit resistors are respectively defined in the resistive material layers of different layers.

Abstract: A strain gauge includes a flexible substrate; and resistors each formed of a Cr composite film. The resistors include a first resistor and a second resistor that are formed on one side of the substrate, and include a third resistor and a fourth resistor that are formed on another side of the substrate. The first resistor, the second resistor, the third resistor, and the fourth resistor constitute a Wheatstone bridge circuit.

Abstract: A strain gauge includes a flexible substrate; and resistors each formed of a Cr composite film. The resistors include a first resistor and a second resistor that are formed on one side of the substrate, and include a third resistor and a fourth resistor that are formed on another side of the substrate. The first resistor, the second resistor, the third resistor, and the fourth resistor constitute a Wheatstone bridge circuit.

Abstract: In a metal plate resistor according to the present disclosure, each of a pair of electrodes includes a first portion and a second portion. The first portion protrudes from one surface of a resistive element to be in contact with an end of a protection film. The second portion is disposed in a corresponding recess of a pair of recesses. In a direction in which the pair of electrodes is arranged, the second portion has a length longer than a length of the first portion.

Abstract: The chip resistor according to the present disclosure includes insulating substrate, a pair of upper face electrodes provided on both ends of one face of insulating substrate, and resistor provided on the one face of insulating substrate and connected between the pair of upper face electrodes. The chip resistor includes a pair of end-face electrodes provided on both end faces of insulating substrate to be electrically connected to the pair of upper face electrodes, and plating layer formed on portions of the pair of upper face electrodes and faces of the pair of end-face electrodes. Insulating film formed of a resin is provided on another face opposite to the one face of insulating substrate. Insulating film has a thickness of more than or equal to 30 ?m.

Abstract: A manufacturing method of shunt resistor according to the present invention includes a step of calculating a difference between an initial resistance value and a desired resistance value as a resistance value to be adjusted, a step of providing a plurality of recess forming members capable of forming recesses each having a characteristic size in the surface of a resistive alloy plate, a recess determining step of determining the size and the number of the recesses necessary to be formed at the surface of the resistive alloy plate, and a recess forming step of forming the recesses according to the size and the number determined in the recess determining step by using the corresponding recess forming members.

Abstract: A chip resistor includes a substrate, a resistor layer, a first conductive layer, an insulating layer, a second conductive layer, a third conductive layer, and a fourth conductive layer. The first conductive layer is electrically connected to the resistor layer. The insulating layer covers the resistor layer and the first conductive layer. The second conductive layer covers the first conductive layer and the insulating layer. The third conductive layer covers the second conductive layer and the insulating layer. The fourth conductive layer covers the second conductive layer and the third conductive layer. Bonding strength between the third and fourth conductive layer is stronger than that between the second and fourth conductive layer.

Abstract: A chip resistor having a predetermined resistance value is manufactured by the following method. A resistive element is provided on an upper surface of an insulating substrate. The resistive element includes a wide portion, a first narrow portion extending from the wide portion, and a part extending from the wide portion, the first narrow portion has a smaller width than the wide portion. First and second electrodes are provided on the upper surface of the insulating substrate. The first electrode is located away from the wide portion. The first electrode contacts the first narrow portion. The first electrode overlaps the first narrow portion when viewed from above. The second electrode contacts the part of the resistive element. The second electrode overlaps the part of the resistive element when viewed from above. A distance between the narrow portion and the wide portion is determined so as to cause a resistance value between the first and second electrodes to be the predetermined resistance value.

Abstract: A semiconductor structure that includes a resistor that is located within an interconnect dielectric material layer of an interconnect level is provided. The resistor includes a diffusion barrier material that is present at a bottom of a feature that is located in the interconnect dielectric material layer. In some embodiments, the resistor has a topmost surface that is located entirely beneath a topmost surface of the interconnect dielectric material layer. In such an embodiment, the resistor is provided by removing sidewall portions of a diffusion barrier liner that surrounds a metal-containing structure. The removal of the sidewall portions of the diffusion barrier liner reduces the parasitic noise that is contributed to the sidewall portions of a resistor that includes such a diffusion barrier liner. Improved precision can also be obtained since sidewall portions may have a high thickness variation which may adversely affect the resistor's precision.

Abstract: A chip resistor includes a base substrate having a first surface and a second surface opposing each other, two side surfaces connecting the first surface and the second surface, and two end surfaces connecting the first surface and the second surface, a resistive layer disposed on the second surface of the base substrate, the resistive layer having a first surface in contact with the base substrate and a second surface opposing the first surface of the resistive layer, a first terminal and a second terminal spaced apart from each other and each being connected to the resistive layer on the second surface of the resistive layer, and a third terminal connected to the resistive layer on the second surface of the resistive layer, disposed between the first terminal and the second terminal, and extending to the first surface of the base substrate along the side surfaces.

Abstract: A chip part according to the present invention includes a substrate having a front surface and a side surface, an electrode integrally formed on the front surface and the side surface so as to cover an edge portion of the front surface of the substrate, and an insulating film interposed between the electrode and the substrate. A circuit assembly according to the present invention includes the chip part according to the present invention and a mounting substrate having a land, bonded by solder to the electrode, on a mounting surface facing the front surface of the substrate.

Abstract: The present invention provides a chip resistor and a method of making the same for alleviating stress resulted from thermal expansion difference and thus suppressing cracks. A chip resistor includes: a substrate, having a carrying surface and a mounting surface facing away from each other; a pair of upper electrodes, disposed at two ends of the carrying surface; a resistor, disposed on the carrying surface and between the pair of upper electrodes, and electrically connected to the pair of upper electrodes; a stress relaxation layer having flexibility and formed on the mounting surface of the substrate; a metal thin film layer, formed on a surface of the stress relaxation layer opposite to the substrate; a side electrode for electrically connecting the upper electrodes and the metal thin film layer; and a plating layer covering the side electrode and the metal thin film layer.

Abstract: Provided is a chip resistor in which cracks, fracture, etc. can be surely prevented from occurring due to thermal stress in solder bonding portions.

Abstract: A support module (10) for polarization resistors of an on-load tap changer comprises:—a supporting region (11) for at least one polarization resistor; —a first joint region (13); —a second joint region (14) which is compatible with the first joint region. A support frame (19) for polarization resistors of an on-load tap changer comprises:—two such support modules which are joined by virtue of the second joint region of the first support module bearing at least partially against the first joint region of the second support module. A fastening element (24) for polarization resistors (22) comprises:—two electrically conductive accommodating sections (25), which each have an accommodating opening (27) for one of the ends (23) of a polarization resistor (22);—an electrically conductive connecting section (26), which connects the two accommodating sections (25) mechanically and electrically to one another;—a first piece (28.1), which comprises the first accommodating section (25.

Abstract: A chip resistor element includes an insulating substrate, a resistor layer, first and second internal electrodes, a resistor protection layer, first and second electrode protection layers, and first and second external electrodes. The resistor layer is on the insulating substrate, the first and second internal electrodes are on respective sides of the resistor layer, and the resistor protection layer covers the resistor layer and extends onto portions of the internal electrodes. The first electrode protection layers are on the first and second internal electrodes so as to overlap with portions of the resistor protection layer and contain first conductive powder particles and resin, while the second electrode protection layers are disposed on the first electrode protection layers and contain second conductive powder particles and resin. A content of resin in the second electrode protection layer is lower than in the first electrode protection layer.

Abstract: Provided is a jumper or current detection resistor element having suppressed occurrence of connection defects resulting from the electromigration. The element (1) of the invention comprises a main body (11) consisting of a metal plate-shaped body, and terminal sections (12) provided at both ends of the main body; the terminal sections protruding from the main body, and both terminal sections provided with a mounting surface; and curved or cut surfaces (A, B, C, D, E) formed at periphery of the mounting surface. Both terminal sections are further provided with opposing surfaces at inside in direction of disposition of both terminal sections, and thickness of the opposing surfaces decreases from the mounting surface (13) to the main body (11).

Abstract: A method for manufacturing a chip resistive element including a substrate, a resistor formed on the substrate, and electrodes connected to opposite ends of the resistor, the method including an electrode forming step of forming the electrodes on the substrate. The electrode forming step includes a step of forming a first electrode layer on the substrate using a first electrode material containing silver, and a step of forming a second electrode layer on the first electrode layer using a second electrode material containing silver and palladium. The first electrode material has a higher silver content than the second electrode material.

Abstract: A chip resistor includes a resistor board, a first electrode, a second electrode and an insulating layer. The second electrode is offset from the first electrode in a lateral direction perpendicular to the thickness direction of the resistor board. The obverse surface of the resistor board includes a first region in contact with the first electrode, a second region in contact with the second electrode and an intermediate region in contact with the insulating layer. The intermediate region is disposed between the first region and the second region in the lateral direction. The first electrode includes a first underlying layer and a first plating layer. The first underlying layer is disposed between the first plating layer and the insulating layer in the thickness direction of the resistor board.

Abstract: A chip resistor with a reduced thickness is provided. The chip resistor includes an insulating substrate, a resistor embedded in the substrate, a first electrode electrically connected to the resistor, and a second electrode electrically connected to the resistor. The first electrode and the second electrode are spaced apart from each other in a lateral direction that is perpendicular to the thickness direction of the substrate.

Abstract: A method of manufacturing a chip resistor includes the following steps. A resistor layer is formed on an obverse surface of a material substrate. A plurality of substrate sections are defined in the material substrate by forming, in the obverse surface of the material substrate, a plurality of first grooves each of which is elongated in a first direction. A conductor layer is formed in each of the first grooves. The substrate sections are cut along lines extending in a second direction different from the first direction.

Abstract: A power controller controls power to a load and includes a primary conductor, a current divider, first and second current sensors, and a controller. The primary conductor carries a primary current to the load. The current divider is connected between the primary conductor and the load and includes a first conductor and a second conductor. The second conductor has a greater impedance than the first conductor. The first current sensor provides a first output representative of the primary current, and the second current sensor provides a second output representative of a secondary current in the second conductor of the current divider. The controller determines the primary current to the load based upon the first output when the primary current is less than a threshold value, and based upon the second output when the primary current is greater than the threshold value.

Abstract: There are provided a chip resistor and a method of manufacturing the same. The chip resistor includes a ceramic substrate; an adhesion portion formed on a surface of the ceramic substrate; and a resistor formed on the adhesion portion, wherein the adhesion portion includes at least one of copper (Cu), nickel (Ni), and copper-nickel (Cu—Ni).

Abstract: A chip resistor includes an insulating substrate, top terminal electrodes formed on top surface of the substrate using silver-based cermet, bottom electrodes, resistive element that is situated between the top terminal electrodes and overlaps them partially, an optional internal protective coating that covers resistive element completely or partially, an external protective coating that covers completely the internal protection coating and partially covers top terminal electrodes, a plated layer of nickel that covers face sides of the substrate, top and bottom electrodes, and overlaps partially external protective coating, finishing plated layer that covers nickel layer. The overlap of nickel layer and external protective layer possesses a sealing property because of metallization of the edges of external protective layer prior to the nickel plating process.

Abstract: In a manufacturing method for a monolithic ceramic electronic component, a plurality of green chips arrayed in row and column directions which are obtained after cutting a mother block are spaced apart from each other and then tumbled, thereby uniformly making the side surface of each of the green chips an open surface. Thereafter, an adhesive is applied to the side surface. Then, by placing a side surface ceramic green sheet on an affixation elastic body, and pressing the side surface of the green chips against the side surface ceramic green sheet, the side surface ceramic green sheet is punched and stuck to the side surface.

Abstract: A chip resistor device includes an insulating substrate, two indented patterns, and a resistor unit. The insulating substrate has opposite first and second surfaces. The first surface has two opposite edges and two electrode forming regions adjacent to the two opposite edges, respectively. The indented patterns are respectively formed in the electrode forming regions of the first surface and indented from the first surface. The resistor unit includes two contact electrodes respectively formed on the electrode forming regions of the first surface and filled into the indented patterns, and a resistor formed on the first surface between the two contact electrodes and electrically contacting the contact electrodes.

Abstract: [Object] A chip resistor suitable for enhancing manufacturing efficiency is provided. [Means] A chip resistor includes a first electrode 1, a second electrode 2, a resistor portion 3, a first intermediate layer 4 connected to the first electrode 1 and the resistor portion 3, a second intermediate layer 5 connected to the second electrode 2 and the resistor portion 3, a coating film 61 covering the first electrode 1, and oxides existing in the first intermediate layer 4. The coating film 61 is made of a material having a higher absorptance of a laser beam of a predetermined wavelength than that of the material forming the first electrode 1. The oxides are oxides of the material forming the coating film 61.

Abstract: A multilayer ceramic substrate includes a ceramic laminated body including a plurality of ceramic layers stacked on each other, a resistor, and a resistor connecting conductor with a portion overlapping the resistor and an overcoat layer that covers the resistor located on a principal surface of the ceramic laminated body. An overcoat layer is made relatively thick during firing, thereby making cracks less likely to be caused, and after the firing step, the thickness of the overcoat layer is reduced by physically scraping down the surface of the overcoat layer, thereby reducing the trimming time. In the overcoat layer, a region that covers a portion in which a resistor overlaps a resistor connecting conductor is thicker than a region that covers the other portion.

Abstract: There is provided a chip resistor including a ceramic substrate; a first resistance layer formed on the ceramic substrate and including a first conductive metal and a first glass; and a second resistance layer formed on the first resistance layer, including a second conductive metal and a second glass, and having a smaller content of glass than the first resistance layer, thereby obtaining relatively low resistance and a relatively small temperature coefficient of resistance (TCR).

Abstract: An object of the disclosure is to provide a chip resistor without causing the disconnection in atmosphere of sulfidizing gas and without precipitating silver sulfide on its surface. The chip resistor of the present disclosure includes a resistor layer disposed on a top surface of a substrate; a first upper electrode layer disposed at both sides of the resistor layer and being electrically connected to the resistor layer; and a second upper electrode layer disposed on the first upper electrode layer and including between 75% by weight and 85% by weight (inclusive) of silver particles with an average particle diameter ranging from 0.3 ?m to 2 ?m, between 1% by weight and 10% by weight (inclusive) of carbon, and a resin.

Abstract: There is disclosed a honeycomb structure including a honeycomb structure section, and a pair of band-like electrode sections arranged on a side surface of the honeycomb structure section, an electrical resistivity of the honeycomb structure section is from 1 to 200 ?cm, in a cross section which is perpendicular to a cell extending direction, the one electrode section is disposed on an opposite side of the other electrode section via the center O, an angle which is 0.5 time as large as a central angle of the electrode section is from 15 to 65°, and each of the electrode sections is formed so as to become thinner from a center portion in a peripheral direction toward both ends in the peripheral direction, and in the cross section which is perpendicular to the extending direction of the cells, the whole outer peripheral shape is a round shape.

Abstract: A chip resistor includes an insulating substrate 11, top terminal electrodes 12 formed on top surface of the substrate using silver-based cermet, bottom electrodes 13, resistive element 14 that is situated between the top terminal electrodes 12 and overlaps them partially, an optional internal protective coating 15 that covers resistive element 14 completely or partially, an external protective coating 16 that covers completely the internal protection coating 15 and partially covers top terminal electrodes 12, a plated layer of nickel 17 that covers face sides of the substrate, top 12 and bottom 13 electrodes, and overlaps partially external protective coating 16, finishing plated layer 18 that covers nickel layer 17. The overlap of nickel layer 17 and external protective layer 16 possesses a sealing property because of metallization of the edges of external protective layer 16 prior to the nickel plating process.

Abstract: Provided may be a semiconductor resistance element including resistance patterns disposed on an insulating substrate. The substrate may have first and second planar surfaces disposed in a first direction, third and fourth planar surfaces at least between the first and second planar surfaces in a second direction and fifth and sixth planar surfaces at least between the first and second planar surfaces in a third direction. The semiconductor resistance element may include a first resistance pattern configured to cover a selected one of the first and second planar surfaces and a second resistance pattern on at least one of the third through sixth planar surfaces.

Abstract: A varistor is provided with a varistor element body, a plurality of internal electrodes arranged in the varistor element body so as to sandwich a partial region of the varistor element body between them, and a plurality of external electrodes arranged on the surface of the varistor element body and connected to the corresponding internal electrodes. The external electrode has a sintered electrode layer formed by attaching an electroconductive paste containing an alkali metal to the surface of the varistor element body and sintering it. The varistor element body has a high-resistance region formed by diffusing the alkali metal in the electroconductive paste into the varistor element body from an interface between the surface of the varistor element body and the sintered electrode layer.

Abstract: A chip resistor device includes: a dielectric substrate that has top and bottom surfaces and two opposite edge faces interconnecting the top and bottom surfaces; two electrodes that are formed on two opposite sides of the dielectric substrate and that cover the edge faces and parts of the top and bottom surfaces; a resistor layer that is formed on one of the top and bottom surfaces of the dielectric substrate between the electrodes and that is brought into contact with the electrodes; and a heat conductive layer that is disposed on the resistor layer oppositely of the dielectric substrate and between the electrodes, that contacts the resistor layer and the two electrodes, and that has a higher resistance than that of the resistor layer. A method for making the chip resistor device is also disclosed.

Abstract: A system for effectively defrosting a plastic window includes a transparent plastic panel, a heater grid having a plurality of grid lines that are integrally formed with the plastic panel, and equalizing means for equalizing the electrical current traveling through each of the grid lines.

Abstract: A co-fired multi-layer stack chip resistor is provided. The co-fired multi-layer stack chip resistor includes a ceramic substrate and a multi-layer stack resistance structure monomer. The ceramic substrate is formed by stacking multiple layers of the ceramic membranes, wherein the ceramic membranes is formed of a bearing membrane and a porcelain slurry with the solvent, the binder and the dispersant. The multi-layer stack resistance structure monomer is stacked on the ceramic substrate, and includes multiple bearing membranes and multiple resistive layers, wherein each resistive layer is formed on the surface of the corresponding bearing membrane, the resistive layers are parallel to each other, and the contiguous resistive layers are stacked with the interval of the predetermined distance along the vertical direction.

Abstract: The electrical multilayer component includes a base body with external electrodes and internal electrodes. A ceramic varistor layer is provided with the first internal electrode, and a dielectric layer adjoins the varistor layer. The dielectric layer has at least one opening filled with a semiconducting material or a metal.

Abstract: Provided may be a semiconductor resistance element including resistance patterns disposed on an insulating substrate. The substrate may have first and second planer surfaces disposed in a first direction, third and fourth planar surfaces at least between the first and second planar surfaces in a second direction and fifth and sixth planar surfaces at least between the first and second planar surfaces in a third direction. The semiconductor resistance element may include a first resistance pattern configured to cover a selected one of the first and second planar surfaces and a second resistance pattern on at least one of the third through sixth planar surfaces.

Abstract: A multilayer PTC thermistor 100 includes a ceramic body 10 having a plurality of ceramic layers 12 and internal electrodes 14 between adjacent ceramic layers 12, external electrodes 30 on the end faces 10a, 10b of the ceramic body 10, and a glass layer 20 on the surfaces 10c, 10d of the ceramic body 10, the glass layer 20 containing an oxide of at least one element selected from the group consisting of zinc and bismuth as the major component, wherein the alkali oxide content of the glass layer is no greater than 0.8 mass %.