Abstract: A system for bit character synchronization of an 8/10 bit code being deserialized is provided by a deserializer with a skip bit function input used to move a character boundary one bit at a time, and 8/10 code error detector, a zero disparity character detector and skip pulse generator. After character sychronism is lost, the skip pulse generator is permitted to generate a skip pulse if the following sequence occurs: all bits of the old character boundary have been flushed through the logic circuits, at least one non-zero disparity character has been detected, and an 8/10 code error is detected. After character synchronism is re-acquired, then the skip pulse generator is no longer permitted to generate a skip pulse.

Abstract: A system for serial communications is disclosed comprising an encoder for serially outputting conservative encoded codewords responsive to a parallel data input, and a decoder for outputting, in parallel, decoded data words responsive to the serially transmitted conservative encoded codewords.The codewords are characterized in that the ratio is known between the total number of bits per codeword transmitted and the total number of transitions per codeword.The encoder transforms each m-bit parallel data work into one n-bit codeword, where n is greater than m, such that every codeword has a known number of transitions and such that one of the transitions in the codeword has a predefined position.Thereafter, the encoder converts each n-bit codeword from parallel to serial form for output onto a serial communications channel.A method is taught for conservative encoding as follows.First, identify and define the total set of q different datawords of m-bits each which can be transmitted.

Abstract: Each of data words has m bits. The m-bit data words are converted into corresponding n-bit code words. The n-bit code words are concatenated to form a bit sequence where the number of successive bits having a same binary value is limited to a range of a smaller value d to a larger value k. A code work W1 and also a following code word W2 are controlled to satisfy the limitation defined by the values d and k. The number of different code words forming an RLL code system is relatively large. For example, in respect of a first available RLL code word system, 8-bit data words are directly converted into 12-bit code words (Tw=0.667T) and the limitation defined by the values d and k equal to 2 and 10 respectively are satisfied. In respect of a second available RLL code word system, 6-bit data words are directly converted into 9-bit code words (Tw=0.667T) and the limitation defined by the values d and k equal to 2 and 23 respectively are satisfied.

Abstract: There is provided a data processing apparatus for encoding or decoding binary data such as a magnetic disk or an optical disk in which a binary data sequence is converted to a binary code sequence which is suitable for a data processes. This data processing apparatus comprises: a code converter for converting the m-bit data in the binary data sequence to the n-bit code corresponding thereto; output means for outputting the n-bit code sequence corresponding to the binary data sequence; and DC-freeing means for restricting the DC component of the code sequence which is outputted from the output means. The code converter has a ROM table to store the data for code conversion and a register for converting the m-bit serial data to the parallel data and can be easily constituted by a programmable array logic.