To Or From Minimum D.c. Level Codes Patents (Class 341/58)
-
Publication number: 20030076246Abstract: One embodiment of the present invention provides a system that transmits a stream of datawords through a bundle of conductors with a three-dimensional structure. Upon receiving a dataword to be transmitted, the system uses an encoding function to encode the dataword into a current codeword in a stream of codewords, wherein the current codeword is less than double the size of the dataword. Next, the system transmits the current codeword to a destination through the bundle of conductors. Note that the encoding function depends on a preceding codeword in the stream of codewords, so that when the preceding codeword changes to the current codeword, rising transitions are substantially matched with falling transitions within the bundle.Type: ApplicationFiled: May 28, 2002Publication date: April 24, 2003Inventor: Mark R. Greenstreet
-
Publication number: 20030071745Abstract: One embodiment of the present invention provides a system for encoding a dataword into a current codeword within a stream of codewords, wherein each codeword in the stream has a substantially equal number of ones and zeros, and wherein each transition between codewords involves a substantially equal number of rising and falling transitions. The system creates the current codeword from the dataword and a preceding codeword in the stream by inverting substantially half of the zero bits of the preceding codeword and inverting substantially half of the one bits of the preceding codeword. This is accomplished by using the dataword to select one bits and the zero bits to invert; determining locations of the one bits and zero bits in the preceding codeword; and then inverting the selected one bits and zero bits in the preceding codeword to form the current codeword.Type: ApplicationFiled: May 28, 2002Publication date: April 17, 2003Inventor: Mark R. Greenstreet
-
Patent number: 6538586Abstract: Frequency spectrums are determined for all possible codes given a predetermined number of bits in a code. A subset of these codes is formed based on spectral properties of codes in a desired frequency band. This subset of code is then used to encode data prior to transmission over a high-speed data bus to reduce undesirable emissions on targeted frequency bands.Type: GrantFiled: January 30, 2002Date of Patent: March 25, 2003Assignee: Intel CorporationInventors: Robert D. Cavin, Alan E. Waltho
-
Patent number: 6538584Abstract: In some embodiments, the invention involves a circuit including a first set of conductors to carry a current bit set and last bit set circuitry to hold and provide a last bit set. The circuit also includes drivers coupled to interconnect conductors to provide signals from the drivers to the interconnect conductors and an encoder to receive the last bit set and the current bit set and determine whether to provide the current bit set or an encoded version of the current bit set to the drivers.Type: GrantFiled: December 28, 2000Date of Patent: March 25, 2003Assignee: Intel CorporationInventors: Shekhar Y. Borkar, Matthew B. Haycock, Stephen R. Mooney, Aaron K. Martin, Joseph T. Kennedy
-
Patent number: 6529147Abstract: An information carrier includes runlength limited marks in a track. The runlengths of the marks represent main channel bits and variations of a further parameter of the marks representing secondary channel bits. Not all marks have the variations, only marks of at least a predetermined runlength have the variations.Type: GrantFiled: March 23, 2000Date of Patent: March 4, 2003Assignee: Koninklijke Philips Electronics N.V.Inventors: Marten E. Van Dijk, Willem M. J. M. Coene, Constant P. M. J. Baggen
-
Patent number: 6509849Abstract: A coding device for coding binary data with a particular transmit signal spectrum, the coding device having a data stream separating device for separating a data stream, which consists of the binary data to be coded, into data blocks having a predetermined data block length, a calculating device for calculating the difference between the number of binary data having a second binary state, for each data block, and a transmitting device for transmitting each data block as transformed data block or as non-transformed data block via a communication channel connected to the transmitting device, in such a manner that the total sequence of the data blocks transmitted by the transmitting device on the communication channel exhibits the particular transmit signal spectrum.Type: GrantFiled: July 5, 2001Date of Patent: January 21, 2003Assignee: Infineon Technologies AGInventor: Wilhard Christophorus von Wendorff
-
Patent number: 6504493Abstract: A method and apparatus to encode data is provided. The method includes the steps of: i) dividing the data into a plurality of blocks, with each block having a plurality of bits, wherein the plurality of blocks includes a first subset of blocks and a second subset of blocks; ii) encoding data in the first subset; arranging a codeword to include the encoded data of the first subset and the second subset; iii) scanning a plurality of segments in the codeword for at least one predetermined sequence; and iv) encoding a scanned segment when the predetermined sequence is found in the segment. A method and apparatus to decode data is also provided according to the present invention.Type: GrantFiled: October 31, 2000Date of Patent: January 7, 2003Assignee: Marvell International, Ltd.Inventor: Gregory Burd
-
Publication number: 20030001760Abstract: The invention relates to a method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal. This stream of databits of the binary information signal is divided into n-bit information words. These information words are converted into m1-bit channel words, in accordance with a channel code C1, or m2-bit channel words, in accordance with a channel code C2, where m1, m2 and n are integers for which it holds that m2>m1≧n. The m2-bit channel word is chosen from of at least two m2-bit channel words, at least two of which have opposite parities, the concatenated m1-bit channel words and the m2-bit channel words complying with a runlength constraint of the binary channel signal.Type: ApplicationFiled: September 3, 2002Publication date: January 2, 2003Applicant: Koninklijke Philips Electronics N.V.Inventor: Willem Marie Julia Marcel Coene
-
Patent number: 6501396Abstract: A scalable physical coding sublayer (PCS) can be adjusted to provide different combinations of communication channels and data widths. The PCS can use 8B/10B encoders having a disparity input connection and at least one disparity output connection. In one embodiment, the encoder has both a synchronous and an asynchronous disparity output connection. The encoder can be coupled with additional encoders to provide an expanded width channel of 16B/20B encoding. Additional configurations are possible. In expanded operation, only one of the encoders needs to output special codes. The encoders, therefore, include a slave input connection to place the encoder in a slave mode so that a special code is replaced with an inert special code. All but one encoder in an expanded system are slave encoders. An idle input connection is also provided in the encoders to place the encoder in an idle mode where pre-defined data is output from the encoder.Type: GrantFiled: March 30, 2001Date of Patent: December 31, 2002Assignee: Xilinx, Inc.Inventors: Joseph Neil Kryzak, Thomas E. Rock
-
Publication number: 20020190879Abstract: A method of generating and allocating codewords includes allocating one of two selectable codewords b1 and b2 as codeword b when a preceding codeword a and a following codeword b form a code stream X, in which the codewords b1 and b2 have opposite INV values which are parameters indicating whether the number of ‘1s’ contained in a codeword is an odd number or an even number. When the code stream of the preceding codeword a and the following codeword b1 is X1, and when the code stream of the preceding codeword a and the following codeword b2 is X2, the codewords are allocated such that the INV values of X1 and X2 are maintained to be opposite when the preceding codeword a or the following codeword b1(b2) should be replaced by another codeword in compliance with a predetermined boundary condition given between codewords. The codewords are allocated so that a DC suppression capability of the code stream can be maintained.Type: ApplicationFiled: April 19, 2002Publication date: December 19, 2002Inventors: Jae-seong Shim, Ki-hyun Kim, Hyun-soo Park, Kiu-hae June, Iqbal Mahboob
-
Publication number: 20020186152Abstract: A method and apparatus for recording and reproducing information to and from an optical disk. If the size of a shortest mark is made small, a signal amplitude lowers and errors are likely to occur. In order to overcome this problem, when data of asymmetric codes is written, the length of a write mark is compensated so that the shortest mark and gap have the same length.Type: ApplicationFiled: July 12, 2002Publication date: December 12, 2002Applicant: Hitachi, Ltd.Inventors: Takeshi Maeda, Yukari Katayama, Hiroyuki Minemura
-
Patent number: 6492920Abstract: A coding table portion includes six coding tables each storing a code word and status information indicating a coding table for use in modulating a next input data word in order to obtain a next code word which satisfies a predetermined run length restriction rule even if the next code word is coupled directly with the preceding code word, corresponding to each input data word. In the coding table portion, the code words and status informations allocated corresponding to input data words of a number set up preliminarily in succession from the highest appearance frequency to a lower one in one or more coding tables of the plural coding tables are replaced with code words having smaller RDSs and status informations allocated corresponding to other input data words in the same coding table. Consequently, the input data word is modulated using the six coding tables.Type: GrantFiled: October 26, 2001Date of Patent: December 10, 2002Assignee: Victor Company of Japan, LimitedInventors: Tsuyoshi Oki, Atsushi Hayami
-
Patent number: 6492915Abstract: A method and apparatus for recording and reproducing information to and from an optical disk. If the size of a shortest mark is made small, a signal amplitude lowers and errors are likely to occur. In order to overcome this problem, when data of asymmetric codes is written, the length of a write mark is compensated so that the shortest mark and gap have the same length.Type: GrantFiled: August 28, 2001Date of Patent: December 10, 2002Assignee: Hitachi, Ltd.Inventors: Takeshi Maeda, Yukari Katayama, Hiroyuki Minemura
-
Patent number: 6489900Abstract: A bus encoding/decoding apparatus and method for a low power digital signal processor (DSP), which uses a narrow data bus, is provided. The apparatus for encoding n bits of data of a data bus, includes a conditional inverting unit for inverting each of (n−1) lower bits of n data when the most significant bit of the n bits of data is 1, a storage unit for storing the last n bits of data which is output to the bus, and a first exclusive OR operating unit for performing a bitwise exclusive OR operation on the lower (n−1) bits or data, which has been inverted by the conditional inverting unit, and the lower (n−1) bits of the n data, which has been stored in the storage unit, wherein the most significant bit of the n bits of data and (n−1) bits of data, which is obtained as the result of the bitwise exclusive OR operation performed by the first exclusive OR operating unit, are output.Type: GrantFiled: December 28, 2000Date of Patent: December 3, 2002Assignees: Samsung Electronics Co., Ltd.Inventors: Young-soo Shin, Ki-young Choi, Byung-ho Min, Young-hoon Chang
-
Publication number: 20020175842Abstract: A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C), wherein the stream of databits of the source signal is divided into n-bit source words (x1, X2), which device comprises converting means (CM) conceived to convert said n-bit source words into corresponding m-bit channel words (Y1, Y2, y3) in accordance with a conversion of the Jacoby type, where m and n are integers, with m>n. The device further comprises control means (10) for carrying out DC-control on said binary channel signal by introducing a freedom of choice in the source-to-channel conversion.Type: ApplicationFiled: March 20, 2002Publication date: November 28, 2002Applicant: U.S. Philips CorporationInventor: Willem M.J. Coene
-
Patent number: 6486804Abstract: A method of converting a stream of databits of a binary information signal into a stream of databits of a constrained binary channel signal, a device for encoding, a signal, a record carrier, a method for decoding, and a device for decoding. The signal is constructed by repetitively or alternately using channel codes C1 and C2. Since two channel words with opposite parities are available in the channel code C2 for each information word, and the same state is established, predetermined properties of the constrained binary channel signal can be influenced. Since the method further comprises the step of substituting, in dependence upon a value of a predetermined property of the binary channel signal, a channel word for a substitute channel word, wherein the substituted channel word and the substitute channel word establish the same state, predetermined properties of the constrained binary channel signal can be further influenced.Type: GrantFiled: May 10, 2001Date of Patent: November 26, 2002Assignee: Koninklijke Phillips Electronics N.V.Inventor: Willem Marie Julia Marcel Coene
-
Patent number: 6476737Abstract: The present invention describes a system and method for encoding a sequence of 64 bit digital data words into a sequence of 65 bit codewords having constraints of (d=0, G=11/I=10) for recording upon a magnetic medium within a magnetic recording channel are disclosed. The method for encoding a sequence of 64 bit digital data words into a sequence of codewords having 65 bits, comprising the steps of dividing each 64-bit digital data word into 8-bit bytes, encoding two 8-bit bytes to form a 17-bit word, forming five 11-bit intermediate blocks from the 8-bit bytes, encoding the five 11-bit intermediate blocks, and concatenating the five encoded 11-bit intermediate blocks and uncoded and unconstrained bits from the 64 bit digital data word to form a 65 bit codeword. A corresponding decoding method is also described. A byte shuffler may be used in the processing.Type: GrantFiled: November 16, 2001Date of Patent: November 5, 2002Assignee: LSI Logic CorporationInventors: Joseph P. Caroselli, Shirish A. Altekar, Charles E. MacDonald
-
Publication number: 20020140584Abstract: A method and apparatus for recording and reproducing information to and from an optical disk. If the size of a shortest mark is made small, a signal amplitude lowers and errors are likely to occur. In order to overcome this problem, when data of asymmetric codes is written, the length of a write mark is compensated so that the shortest mark and gap have the same length.Type: ApplicationFiled: August 28, 2001Publication date: October 3, 2002Applicant: Hitachi. Ltd.Inventors: Takeshi Maeda, Yukari Katayama, Hiroyuki Minemura
-
Patent number: 6445313Abstract: A data modulating/demodulating method and apparatus for an optical recording medium that is capable of keeping a digital sum value at a minimum value. In the method, a source data is converted into a coded data by a first conversion table in which the coded data corresponding to the source data is registered. The coded data is converted into a first channel data suitable for the optical recording medium. A second conversion table is registered with a coded data for suppressing a DC component in correspondence with a specific source data such that a digital sum value of the first channel data becomes a minimum value. The specific source data is converted into the coded data for a direct current restraint by the second decoding table and then converted into a second channel data. A digital sum value for the first and second channel data is calculated to select a coded data in which the digital sum value becomes a minimum value from the first and second conversion tables.Type: GrantFiled: February 6, 2001Date of Patent: September 3, 2002Assignee: LG Electronics Inc.Inventor: Seong Keun Ahn
-
Publication number: 20020118125Abstract: To convert a 12-bit data word into an 18-bit code word, the 12-bit data word is divided into the 8 high-order bits and the 4 low-order bits. The 8 high-order bits are converted into 12 bits and the 4 low-order bits are converted into 6 bits, thereby creating an 18-bit code. This enables conversion using small-scale conversion tables.Type: ApplicationFiled: February 28, 2002Publication date: August 29, 2002Inventors: Chosaku Noda, Yoshiyuki Ishizawa
-
Patent number: 6441756Abstract: A method of modulating and a method of demodulating for a run length limited (RLL) code having an improved direct current (DC) suppression capability. Received data is modulated using a DC suppression control code group which is separate from a data modulation conversion code group. The DC suppression control code group maximizes use of the characteristics of codewords in conversion code groups, such as, the sign of parameter CSV representing the DC value within a codeword and the characteristics of parameter INV predicting the DSV transition direction of the next codeword, while relaxing the redundant codeword generation condition or the condition of usable codewords compared with the data modulation conversion code group. Therefore, the number of codewords increases, so that the probability of DC suppression control further increases.Type: GrantFiled: September 6, 2001Date of Patent: August 27, 2002Assignee: Samsung Electronics Co., Ltd.Inventor: Jae-seong Shim
-
Patent number: 6437710Abstract: A communication system is provided for interconnecting a network of digital systems. Each node of the communication system may include a transceiver and an encoder/decoder. The encoder codes an incoming data stream and forwards the encoded data stream across a communication link based on a DC-adaptive encoding mechanism. The encoded data stream is substantially free of a DC value that would skew the detector components at the receiver end of the communication link. Moreover, the encoded signal is forwarded at no greater than the incoming bitstream. Encoding occurs dependent on a digital sum value of the preceding clock cycle (DSVn−1) for the encoded bitstream and the logic values for the incoming bitstream during the current clock cycle n as well as the subsequent clock cycle n+1. Encoding according to normal encoding or multiple-ones encoding is dependent on those values.Type: GrantFiled: November 10, 2000Date of Patent: August 20, 2002Assignee: Oasis Design, Inc.Inventors: Pak Y. Tam, Horace C. Ho, Rainer P. Mueller, David J. Knapp
-
Patent number: 6437711Abstract: A method encodes an input data block with a block encoder. The block encoder is capable of processing consecutive coding blocks whose size has an upper limit which is smaller than the size of the input data block. The method comprises: determining the length of the input data block before encoding any of its data with the block encoder; dividing the input data block to a plurality of segments wherein all segments are of substantially equal size and no segment is larger than the upper limit; and processing each segment with the block encoder. If the last segment is shorter than the remaining segments, fill bits can be added to the last segment such that its length equals that of the remaining segments.Type: GrantFiled: December 14, 2000Date of Patent: August 20, 2002Assignee: Nokia Networks OyInventors: Esko Nieminen, Lauri Pirttiaho
-
Publication number: 20020109616Abstract: The invention concerns a method and a device for encoding/decoding digital data transmitted through a serial link (Is), particularly of the so-called “8B/10B” type. The full encoded binary word includes 8 data bits (A . . . H) and a 2-bit label (X1X2). The logical state of a center bit triplet (CDE) of the byte is detected. When all of the bits are in the same logical state, “0”) or “1,” the center bit of the triplet (D) is inverted (4) prior to transmission. Otherwise, the byte is transmitted as is. The label (X1,X2) is forced (7) to the logical configuration “10 ” when there is a bit inversion, and to “01” in the opposite case. Upon decoding, this configuration is tested and the center bit received is selectively inverted as a function of the result of the test. In a preferred variant, the method also includes tests of the label and the triplet after decoding, when there has been a bit inversion in the encoding.Type: ApplicationFiled: December 5, 2001Publication date: August 15, 2002Applicant: BULL, S.A.Inventor: Jean-Marie Boudry
-
Patent number: 6430713Abstract: A method for designing a computer program for finding a low-complexity coder for constrained block codes for application to timing recovery or error control in data recording systems. The method includes (1) decomposing an input set of candidate codewords into simple subsets of codewords, (2) providing, for each simple subset of codewords, a respective subset of datawords, and (3) filling in certain coordinates in the datawords by values of certain coordinates in the codewords.Type: GrantFiled: June 30, 1999Date of Patent: August 6, 2002Assignee: International Business Machines CorporationInventors: Brian Harry Marcus, Dharmendra Shantilal Modha
-
Publication number: 20020097173Abstract: A code converter of the present invention converts m data bits to n channel bits (m<n) and records the n channel bits in a recording medium. The code converter includes a basic table made up of a plurality of tables smaller in number than 2m defined on the basis of a bit pattern required of the codes. A converting circuit codes all data of the m data bits to the n channel bits by calculation using the basic table. The code converter is operable with a minimum number of tables and therefore with a minimum of circuit scale.Type: ApplicationFiled: October 30, 2001Publication date: July 25, 2002Applicant: NEC CORPORATIONInventor: Satoshi Itoi
-
Patent number: 6425107Abstract: An encoder/decoder is disclosed which is operative to convert an 8 bit value to a ten bit serial run length limited code for transmission over a serial data link. The encoding technique maintains DC balance within 2 bits over a single ten bit word and compensates for DC imbalance by inverting selected words in the transmission sequence to correct for a DC imbalance resulting from the transmission of a prior unbalanced word. One or more encoding lookup tables are employed at the encoder to map each byte into a ten bit run length limited code for serialization and transmission over the serial data link. A second decoding lookup table is employed at the decoder to map the received 10 bit run length limited code into the original 8 bit value.Type: GrantFiled: October 13, 2000Date of Patent: July 23, 2002Assignees: Fujitsu Network Communications, Inc., Fujitsu LimitedInventors: Stephen A. Caldara, Raymond L. Strouble, Michael Sluyski
-
Publication number: 20020075172Abstract: A device is disclosed for encoding a stream of databits of a binary source signal (S) into a stream of databits of a binary channel signal (C), wherein the stream of databits of the source signal is divided into n-bit source words (x1, x2), which device comprises converting means (CM) conceived to convert said n-bit source words into corresponding m-bit channel words (y1, y2, y3) in accordance with a conversion of the Jacoby type, where m and n are integers, with m>n. The device further comprises control means (10) for carrying out DC-control on said binary channel signal by introducing a freedom of choice in the source-to-channel conversion.Type: ApplicationFiled: December 10, 2001Publication date: June 20, 2002Applicant: U.S. Philips CorporationInventor: Willem M.J. Coene
-
Patent number: 6404355Abstract: An apparatus is disclosed for generating a runlength limited (RLL) digital information signal, the digital information signal having a minimum runlength of d′ and a maximum runlength of k′, d′ and k′ being integers larger than zero and where k′ is larger than d′. In accordance with the invention, the apparatus is adapted to generate the runlength limited digital information signal, such that a minimum runlength in the digital information signal occurs isolated from other minimum runlengths in the digital information signal.Type: GrantFiled: September 30, 1999Date of Patent: June 11, 2002Assignee: Koninklijke Philips Electronics N.V.Inventor: Willem M. J. Coene
-
Patent number: 6400288Abstract: An encoder is provided that converts data words into code words. The code words, when concatenated together, are such that sub-strings of consecutive first symbols in the code words have no more symbols than a maximum number; sub-strings having the maximum number of consecutive first symbols and beginning at selected locations within the code words appear without restriction, and sub-strings having the maximum number of consecutive first symbols and beginning at locations other than the selected locations appear only where the sub-string is concatenated with an acceptable secondary sub-string. A method is also provided for generating a set of such code words for an encoder.Type: GrantFiled: September 17, 1999Date of Patent: June 4, 2002Assignee: Seagate Technology LLCInventors: Lisa Fredrickson, Anuradha Sukhija
-
Patent number: 6392569Abstract: A decoding apparatus and data reproduction apparatus which can perform correction of 1T and 2T which inherently cannot exist as EFM signals, reduce processing of an error correction circuit, and improve the playability. Provision is made of an EPM block containing a correction portion for detecting an edge of an RF signal converted to a binary format by the PLL asymmetry correction circuit for NRZ conversion, using a clock generated in the digital PLL circuit for synchronization, detecting 1T and 2T (T is a channel clock period), which inherently cannot exist as EFM signals in format, generated at the time of synchronization, correcting the detected 1T and 2T signals to 0 or 3T in accordance with predetermined conditions to remove the 1T and 2T from the RF signal, and modulating the RF signal from which the 1T and 2T have been removed by EFM and a demodulation circuit for demodulating by EFM a signal after modulation by EFM.Type: GrantFiled: January 18, 2000Date of Patent: May 21, 2002Assignee: Sony CorporationInventors: Nobumasa Mimachi, Minoru Hashimoto, Hiromasa Kimura
-
Patent number: 6392566Abstract: A method and apparatus are provided for modulating code for use with written optical disks such as digital video disks (DVD). The invention falitates 8/16 modulation by eliminating duplicate code conversion and by reducing the number of times that conversion codes must be looked up from a conversion table. A conversion code corresponding to a received input code is specified from among a plurality of conversion codes. Duplication information corresponding to the input code is read from a pre-processing table and duplicate information indicated duplicate conversion codes in the plurality of conversion codes is stored. Conversion code corresponding to the input code is read from the conversion table and is selectively stored with duplicate conversion codes being omitted.Type: GrantFiled: January 30, 2001Date of Patent: May 21, 2002Assignee: International Business Machines CorporationInventor: Teruhiko Ushio
-
Publication number: 20020050935Abstract: A coding table portion includes six coding tables each storing a code word and status information indicating a coding table for use in modulating a next input data word in order to obtain a next code word which satisfies a predetermined run length restriction rule even if the next code word is coupled directly with the preceding code word, corresponding to each input data word. In the coding table portion, the code words and status informations allocated corresponding to input data words of a number set up preliminarily in succession from the highest appearance frequency to a lower one in one or more coding tables of the plural coding tables are replaced with code words having smaller RDSs and status informations allocated corresponding to other input data words in the same coding table. Consequently, the input data word is modulated using the six coding tables.Type: ApplicationFiled: October 26, 2001Publication date: May 2, 2002Inventors: Tsuyoshi Oki, Atsushi Hayami
-
Publication number: 20020047788Abstract: A methodology for designing an implementing high rate RLL codes is optimized for application to 10-bit ECC symbols, and provides rate 20/21, rate 50/51, rate 90/91 and other modulation code rates for use in magnetic recording channels. A relatively small subcode encoding—one easy to implement—is applied to a portion of the input stream, and the resulting base codeword is partitioned into nibbles that, in turn, are interleaved among the unencoded ECC symbols. Code constraints on the subcode word nibbles depend upon the values of adjacent unencoded symbols. The resulting codes provide excellent density and error propagation performance.Type: ApplicationFiled: March 9, 2001Publication date: April 25, 2002Inventors: Peter McEwen, Kelly K. Fitzpatrick, Bahjat M. Zafer
-
Patent number: 6378007Abstract: In a tape drive, or other storage device, used for storing computer data, both record data and record structure information such as file marks are encoded with codewords to form an encoded data stream. Of the fixed number of possible fixed-length codewords, one codeword is assigned as a root sequence for one or more longer codewords. Thus, detection of the root sequence during decoding of an encoded data stream triggers the reading of a fixed number of further bits. The further bits represent file marks and any other defined information. In the tape drive (800), the tape drive interface (810) receives record data and file mark commands. The formatter (820) encodes the record data as fixed length codewords.Type: GrantFiled: October 30, 1998Date of Patent: April 23, 2002Assignee: Hewlett-Packard CompanyInventor: Simon David Southwell
-
Patent number: 6373407Abstract: The computer system includes a host system, a recording medium, and a digital signal decoder connected to the host system and the recording medium. The digital signal decoder receives M-bit data and generates an N-bit code word from the M-bit data. The number of consecutive bits of 1 in the code word is not larger than a first predetermined number K, and the number of consecutive bits of 0 is not larger than a second predetermined number L. When data is recorded/reproduced by a method such as NRZI (Non-Return to Zero Inverted), or the like, there is a defect in that the number of transitions of data is larger in a code with a high data encoding rate, and the run length of zero is long thereby increasing the data decoding error rate with the recording/reproducing of data. In the digital signal decoder according to the present invention, any code word includes at most 3 consecutive bits of 1, and at most 11 consecutive bits of 0, so that the data decoding error rate can be reduced.Type: GrantFiled: February 23, 1999Date of Patent: April 16, 2002Assignee: Hitachi, Ltd.Inventors: Takushi Nishiya, Tatsuya Hirai, Seiichi Mita, Takashi Nara, Yoichi Uehara, Hiroshi Ide, Kyoko Tsukano, Yoshiju Watanabe
-
Patent number: 6353912Abstract: An encoding circuit for use with a digital signal transmitting apparatus and a digital signal recording/reproducing apparatus encodes a 16-bit information word into a 18-bit code word by trellis encoding method in the condition that the range of the variation of the ADS is limited in such a manner that the 18-bit code word is composed of a combination of 9-bit sub-code words. Thus, while the channel line density and the circuit scale are being suppressed from increasing, the transmission rate of user data can be improved.Type: GrantFiled: November 17, 1998Date of Patent: March 5, 2002Assignee: Sony CorporationInventor: Masaki Uchida
-
Patent number: 6346895Abstract: A method for using a nibble(partial bits of word) inversion code in a network system includes the steps of: a) adding 1 redundancy bit to n bit source data and generating a pre-code, n being an even number of 2 or over; b) deciding the number of transitions in the generated pre-code; c) determining the pre-code as a code word if the number of transitions in the pre-code is greater than or equal to 1+n/2 in a deciding result; d) inverting alternate bits including the redundancy bit among bits constructing the pre-code and generating the code word, if the number of transitions in the pre-code is less than n/2 in the deciding result; e) determining the pre-code as the code word in case that the number of transitions in the pre-code is equal to n/2 and simultaneously the source data is not an in-band signaling and not a special word in the deciding result; and f) inverting the nibble among the bits constructing the pre-code and generating the code word, in case that the number of transitions in the pre-codeType: GrantFiled: January 24, 2001Date of Patent: February 12, 2002Assignees: Electronics and Telecommunications Research Institute, Korea TelecomInventors: Bhum-Cheol Lee, Jong-Moo Sohn, Eun-Chang Choi, Kwon-Chul Park
-
Patent number: 6344807Abstract: A packet-frame generator for creating an encoded packet frame comprising encoded control data and encoded utilizable data. A non-encoded packet frame comprising non-encoded control data and non-encoded utilizable data is providable by an assembling means. The packet-frame generator comprises a modulation encoder for encoding the non-encoded control data by a first modulation code and the non-encoded utilizable data by a second modulation code thereby providing the encoded packet frame.Type: GrantFiled: September 22, 2000Date of Patent: February 5, 2002Assignee: International Business Machines CorporationInventors: Martin Hassner, Nyles Heise, Walter Hirt
-
Publication number: 20020008647Abstract: A coding device for coding binary data with a particular transmit signal spectrum, the coding device (1) having a data stream separating device (3) for separating a data stream, which consists of the binary data to be coded, into data blocks DB having a predetermined data block length, a calculating device (15) for calculating the difference between the number, of binary data having a first binary state and the number of binary data having a second binary state, for each data block DB, and a transmitting device (27) for transmitting each data block as transformed data block or as non-transformed data block DB via a communication channel (K) connected to the transmitting device (27), in such a manner that the tonal sequence of the data blocks transmitted by the transmitting device (27) on the communication channel (K) exhibits the particular transmit signal spectrum.Type: ApplicationFiled: July 5, 2001Publication date: January 24, 2002Inventor: Wilhard Christophorus von Wendorff
-
Publication number: 20020008646Abstract: The present invention relates to method and apparatus of converting a series of data words into modulated signals. This ethod generates for each data word a number of intermediate sequences by combining mutually different digital words with that data word, scrambles these intermediate sequences to form alternative sequences, translates each alternative sequence into a (d,k) constrained sequence, checks whether each (d,k) constrained sequence contains undesired sub-sequence of more than kSET “0”s where kSET is smaller than k, and selects one (d,k) constrained sequence for recording on an optical or magneto-optical recording medium among the (d,k) constrained sequences not having the undesired sub-sequence, thereby recording edge information more frequently which will result in stable clock while conducting DSV control normally.Type: ApplicationFiled: April 10, 2001Publication date: January 24, 2002Inventors: Kees A. Schouhamer Immink, Seong Keun Ahn, Sang Woon Suh, Jin Yong Kim
-
Patent number: 6340938Abstract: A demodulating device of the present invention in which an error code/constraint length determining unit, a minimum run continuation restricting code detecting unit and a minimum run/maximum run compensating code detecting unit specify a constraint length of a code having a predetermined length including an error and inverse conversion units and an error data demodulation table demodulate the code based on the specified constraint length, thus reducing error propagation by a simpler constitution when bit shift error is caused.Type: GrantFiled: August 20, 1999Date of Patent: January 22, 2002Assignee: Sony CorporationInventor: Toshiyuki Nakagawa
-
Patent number: 6333704Abstract: There is provided a coding/decoding system of bit insertion manipulation line code, which has small increase in bit rate and simple configuration and minimizes DC baseline fluctuations by properly coupling the advantages of mBnB code and bit insertion code in a high-speed optical transmission system using AC coupling. The encoding part of the system inserts a bit for minimizing a disparity of m+1 bit block when a disparity with respect to m-bit input information is a minimum value that the m+1 bit block may have, and inserts ‘0’ when it is not, performing pre-coding. Then, the encoding part manipulates a part of the bits of the pre-coded block to make its disparity have the minimum value, compares the disparity of the pre-coded block with a disparity accumulated, and inverts or non-inverts the block, thus carrying out coding.Type: GrantFiled: November 3, 1999Date of Patent: December 25, 2001Assignee: Electronics and Telecommunications Research InstituteInventors: Hee Young Jung, Yong Jin Kim, Byoung Moon Jin, Kyung Rok Cho
-
Publication number: 20010050623Abstract: A device is disclosed for encoding a stream of data bits of a binary source signal (S) into a stream of data bits of a binary channel signal (C1), wherein the bit stream of the source signal is divided into n-bit source words (x1, x2), which device comprises converting means (LC) adapted to convert said source words into corresponding m-bit channel words (y1, y2, y3). Each n-bit source word together with another n-bit source word forms a pair of source words. The values of the n-bit source words differ only in the value of the bit in the qth bit position, q being a constant. The pairs of source words is divided into a first part of pairs and a remaining part of pairs.Type: ApplicationFiled: April 12, 2001Publication date: December 13, 2001Applicant: U.S. PHILIPS CORPORATIONInventor: Josephus Arnoldus Henricus Maria Kahlman
-
Patent number: 6323787Abstract: In the case of transmitting upon converting the 8-bit word string data showing signal information to the 10-bit word string data consisting of word synchronous data, 8-bit word string data showing signal information is obtained and after inserting 2 each of the 8-bit word synchronous data and the 8-bit auxiliary word data to be converted to the 10-bit neutral word data, 8 to 10 bits conversion is conducted to the 10-bit word string data and transmitted; when converting the 8-bit word synchronous data to 10-bit word synchronous data, if the immediately preceding word data is the data having plus running disparity, it is converted to 10-bit word synchronous data having minus running disparity, and if the immediately preceding word data is the data having minus running disparity, it is converted to the 10-bit word synchronous data having plus running disparity. Thereby, in the case of reproducing the signal information at the receiving end, the necessary signal synchronization can be certainly obtained.Type: GrantFiled: April 25, 2000Date of Patent: November 27, 2001Assignee: Sony CorporationInventor: Shigeyuki Yamashita
-
Patent number: 6323789Abstract: A method and apparatus for combining a plurality of 8B/10B encoded DVB-ASI input streams into an aggregate output data stream allows a receiving device to synchronize to the aggregate output data stream by mapping a synchronization character to a unique character if the synchronization character occurs in a first timeslot of the aggregate output data stream. This unique character allows a receiving device to synchronize to the aggregate output data stream. If the synchronization character occurs in a timeslot other than the first timeslot, the synchronization character is mapped to another special character that denotes that no data is present in the timeslot. In addition, if the synchronization character occurs in a timeslot after the last timeslot in which data may be placed in the aggregate output data stream, the synchronization character can be mapped to yet another special character denoting that no data is available in the timeslot.Type: GrantFiled: August 14, 2000Date of Patent: November 27, 2001Assignee: Georgia Tech Research CorporationInventor: Peter H. Lawrence
-
Patent number: 6313764Abstract: According to the present invention, in the demodulating device, demodulating method and transmitting medium, a channel bit sequence of a variable length code having a minimum run d of 1 or more was decoded to a data sequence, and a code assigned to limit the minimum run d from repeating a predetermined number of times in the channel bit sequence of the variable length code was decoded to a data sequence. Design is therefore easier from the viewpoint of clock reproduction. When all the elements in the table contain a “1” representing an edge, data can be decoded more reliably. Further, when omissions are made in the codes in the table up to d bits from the code sequence lengths of the restriction lengths, data can be decoded more reliably. Thus, a clock is stably reproduced.Type: GrantFiled: September 17, 1998Date of Patent: November 6, 2001Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Tatsuya Narahara, Yoshihide Shinpuku
-
Patent number: 6311305Abstract: A method and system for overriding error correction capabilities of digital optical media is provided. The overriding of the error correction codes (ECC) is accomplished by causing a non-correctable pattern of erroneous symbols to occur in the ECC codeword. Specific redundancy symbols are replaced with invalid symbols. The non-correctable error pattern is recognized by the ECC decoder as being non-correctable and the ECC decoder does not attempt to change the values of any symbols of an ECC codeword that is contaminated by the detectable non-correctable error pattern.Type: GrantFiled: March 2, 1998Date of Patent: October 30, 2001Assignee: T.T.R. Technologies Ltd.Inventors: Baruch Sollish, Dennis Howe
-
Patent number: 6304196Abstract: A system and method for encoding and decoding data utilizes Walsh-Hadamard Transforms and inversion techniques to generate the possible minimum disparity values for the data to be encoded. A minimum disparity value is then selected that also provides sufficient transition density.Type: GrantFiled: October 19, 2000Date of Patent: October 16, 2001Assignee: Integrated Device Technology, Inc.Inventors: Greg Copeland, Bertan Tezcan
-
Publication number: 20010028318Abstract: Decryption or descrambling information or other data modification information is encoded into patterns of merge bits for primary information. The decoded information is used to decrypt, descramble or otherwise modify the primary information. In another embodiment, a sequence of symbols is added to original data, the sequence of symbols selected to encode into channel bits having a large accumulated digital sum variance. In another embodiment, a single symbol in the sequence of symbols is replaced after error correction symbols have been added. In another embodiment, decryption or descrambling information or other data modification information is encoded into the sign of the digital sum variance of each blocked row of data.Type: ApplicationFiled: May 14, 2001Publication date: October 11, 2001Inventor: Josh Hogan