Abstract: In response to receiving a scene description, a processing system generates a set of planes in the scene and a bounding volume representing a partition of the scene. Using the set of planes in the scene, a compute unit of an accelerated processing unit performs a spatial test on the bounding volume to determine whether the bounding volume intersects one or more planes of the set of planes in the scene. Based on the spatial test, the compute unit generates intersection data indicating whether the bounding volume intersects one or more planes of the set of planes in the scene. The accelerated processing unit then uses the intersection data to render the scene.

Abstract: A distributed rendering and display system comprises a host device for rendering z-buffers from a scene, a set of pipeline rendering devices, and a set of display devices. Each pipeline rendering device is remotely connected to the host device. Each display device is remotely connected to a pipeline rendering device in the set of pipeline rendering devices. Each rendered z-buffer from the scene is associated with a display view perspective of the scene. Each display device in the set of display devices provides display view perspectives of the scene to one or more users.

Abstract: When performing tile-based graphics processing, a first vertex shading operation to generate vertex shaded position data for vertices is performed, and the vertex shaded position data used to prepare primitive lists indicating which primitives should be rendered for respective rendering tiles. Then, when processing a tile, a second vertex shading operation is performed for vertices of primitives for the tile for which fragments have been generated by a rasteriser prior to rendering the graphics fragments, to generate vertex shaded non-position attribute data for the vertices, based on the results of early depth testing before the fragments are rendered.

Abstract: A three-dimensional reconstruction method, comprising: performing slide calculation on an acquired current image frame to obtain to-be-processed windows; performing point feature extraction and line feature extraction on the to-be-processed windows, and determining corresponding features in each to-be-processed window; performing iterative quadtree splitting for circles on each target to-be-processed window to obtain circular regions of interest corresponding to each target to-be-processed window; performing feature screening on features in the target circular regions of interest to obtain target features corresponding to each target circular region of interest; and performing three-dimensional reconstruction corresponding to the current image frame by using the target features.

Abstract: A system and method are provided for capturing a high resolution, high frame rate video using a Universal Serial Bus (USB) port. Generally, the method involves transmitting a High-Definition Multimedia Interface (HDMI) video including a number of video frames from a HDMI-source. Receiving the HDMI video and buffering and splitting each one of the video frames into a plurality of split video frames. Each of the split video frames is converted into a number of USB data packets. USB data packets from each of the split video frames are then interleaved to form a stream of USB data packets. The stream of USB data packets is coupled to a host system, which executes a program to stitch the USB data packets back together to reassemble each of the video frames, and order the video frames to restore or recreate the HDMI video.

Abstract: A method and apparatus for vascular assessment are disclosed. The apparatus, in some embodiments, receives, from a medical imaging device, a medical image of a coronary vessel tree of a subject and calculates a plurality of geometric measurements associated with individual portions of a vascular segment of the coronary vessel tree. The apparatus also determines a plurality of resistances associated with the plurality of geometric measurements associated with the individual portions of the vascular segment and determines a plurality of pressure drops across the individual portions of the vascular segment based on the determined resistances and a calculated or estimated blood flow. The apparatus further calculates based on the plurality of pressure drops, a functional index indicative of a presence or an absence of a stenosis within the vascular segment.

Abstract: 3-D rendering systems include a rasterization section that can fetch untransformed geometry, transform geometry and cache data for transformed geometry in a memory. As an example, the rasterization section can transform the geometry into screen space. The geometry can include one or more of static geometry and dynamic geometry. The rasterization section can query the cache for presence of data pertaining to a specific element or elements of geometry, and use that data from the cache, if present, and otherwise perform the transformation again, for actions such as hidden surface removal. The rasterization section can receive, from a geometry processing section, tiled geometry lists and perform the hidden surface removal for pixels within respective tiles to which those lists pertain.

Abstract: A technique for processing strong ordered transactions in a direct memory access engine may include retrieving a memory descriptor to perform a strong ordered transaction, and delaying the strong ordered transaction until pending write transactions associated with previous memory descriptors retrieved prior to the memory descriptor are complete. Subsequent transactions associated with memory descriptors following the memory descriptor are allowed to be issued while waiting for the pending write transactions to complete. Upon completion of the pending write transactions, the strong ordered transaction is performed.

Abstract: Rendering systems that can use combinations of rasterization rendering processes and ray tracing rendering processes are disclosed. In some implementations, these systems perform a rasterization pass to identify visible surfaces of pixels in an image. Some implementations may begin shading processes for visible surfaces, before the geometry is entirely processed, in which rays are emitted. Rays can be culled at various points during processing, based on determining whether the surface from which the ray was emitted is still visible. Rendering systems may implement rendering effects as disclosed.

Abstract: Subsurface display interfaces and associated systems and methods are provided. In some embodiments, an example method can include: dividing a graphic to be displayed into a plurality of sets of primitives, each primitive of the sets of primitives comprising a rectangle or a line; assigning the plurality of sets of primitives to display frames of a plurality of display frames; and outputting, at a display positioned under a surface and in series, the plurality of display frames.

Abstract: A method, apparatus, and system for network monitoring are provided. The method retrieves and processes performance data files from each technology type in the network. These performance data files are then loaded into a time series database. At least one key performance indicator is derived from the data. The performance data is organized by region and pool level and then displayed by region and pool level. The method provides configurable thresholds for key performance indicators and alerts users to those thresholds. The apparatus provides a display allowing both monitoring and test functions to be selected. The display is automatically updated based on a predetermined, selectable time interval.

Abstract: Methods and apparatus for merging tasks in a graphics pipeline in which, subsequent to a trigger to flush a tag buffer, one or more tasks from the flushed tag buffer are generated, each task comprising a reference to a program and plurality of fragments on which the program is to be executed, wherein a fragment is an element of a primitive at a sample position. It is then determined whether merging criteria are satisfied and if satisfied, one or more fragments from a next tag buffer flush are added to a last task of the one or more tasks generated from the flushed tag buffer.

Abstract: A method for detecting a three-dimensional object in a two-dimensional image includes: inputting the two-dimensional image into an object detection model, and obtaining a resulting detection depth dataset; obtaining, based on the detection depth dataset, coordinate sets of a number of points-of-interest each associated with a to-be-detected object in a 3D camera centered coordinate system; and converting the coordinate sets of the number of points-of-interest in the 3D camera centered coordinate system into a number of coordinate sets in a 3D global coordinate system. Embodiments of this disclosure may be utilized in the field of self-driving cars with roadside traffic cameras.

Abstract: An embodiment relates to an electronic device which comprises a case and a mobile terminal comprising a terminal body. A connection port provided on one side of the terminal body, a controller and a first display part the electronic device comprising: a second display part for displaying a game executed in the mobile terminal; and a wiring part for electrically connecting a first body and a second body. Wherein the controller controls the first display part and second display part, such that an integrated display part comprising the first display part and second display part is formed, and divides a first image such that the first image displayed on the first display part is displayed on the integrated display part in a divided manner, the first image comprises a first sub-image and a second sub-image, and the first image and second sub-image comprise images overlapping each other.

Abstract: Methods and apparatus relating to techniques for avoiding cache lookup for cold cache. In an example, an apparatus comprises logic, at least partially comprising hardware logic, to collect user information for a user of a data processing device, generate a user profile for the user of the data processing device from the user information, and set a power profile a processor in the data processing device using the user profile. Other embodiments are also disclosed and claimed.

Abstract: Several implementations relate to 3D video formats. One or more implementations provide adaptations to MVC and SVC to allow 3D video formats to be used. According to a general aspect, a set of images including video and depth is encoded. The set of images is related according to a particular 3D video format, and are encoded in a manner that exploits redundancy between the set of images. The encoded images are arranged in a bitstream in a particular order, based on the particular 3D video format that relates to the images. The particular order is indicated in the bitstream using signaling information. According to another general aspect, a bitstream is accessed that includes the encoded set of images. The signaling information is also accessed. The set of images is decoded using the signaling information.

Abstract: A method for graphics processing. The method including rendering graphics for an application using a plurality of graphics processing units (GPUs). The method including using the plurality of GPUs in collaboration to render an image frame including a plurality of pieces of geometry. The method including during a pre-pass phase of rendering, generating information at the GPUs regarding the plurality of pieces of geometry and their relation to a plurality of screen regions. The method including assigning the plurality of screen regions to the plurality of GPUs based on the information for purposes of rendering the plurality of pieces of geometry in a subsequent phase of rendering.

Abstract: A system and method for digitally grading collectible trading cards on a predefined standard scale. The collectible trading cards are graded using their images. First, an image is converted to grayscale image. The grayscale image is subjected to a set of algorithms, such as edge detection algorithm, threshold inversion algorithm, wavelet transform algorithm, corner detection algorithm, color filtering algorithm, and an image sharpen algorithm to obtain respective image features as outputs. The output can be processed using a bag of visual words computer vision model to obtain quantitative data. The quantitative data can then be processed using a pre-trained machine learning model to obtain a grade for the collectible trading card.

Abstract: A computing device may access visually rich documents comprising an image and metadata. A graph, based on the image or metadata, can be generated for a visually rich document. The graph's nodes can correspond to words from the visually rich document. Features for nodes can be determined by the device. The device may generate model labeled graphs by assigning a pseudo-label to nodes using a pretrained model. The device may generate a plurality of graph labeled graphs by assigning a pseudo-label to nodes by matching a first node from a first graph to at least a second node from a second graph. The device may generate a plurality of updated graphs by cross referencing labels from the model labeled graphs and the graph labeled graphs. Until a change in labels is below a threshold, a model can be trained to perform key-value extraction using the updated graphs.

Abstract: In some aspects, the present disclosure provides a method for high dynamic range (HDR) video rotation. The method includes receiving, by a display processor, an indication that a frame rotation animation process for video playback has been initiated, the display processor comprising a display processor pipeline. The method also includes determining whether the video playback is an HDR format or another format. In response to the determination and receiving the indication: bypassing a loading of the frame rotation animation into a first portion of the display processor pipeline, and loading the frame rotation animation into a second portion of the display processor pipeline if the video playback is in an HDR format.

Abstract: A method for managing a boost time required for an application launch in an electronic device is provided. The method includes detecting, by the electronic device, a user input to launch the application. Further, the method includes measuring, by the electronic device, real-time system health parameters of the electronic device. Further, the method includes predicting, by the electronic device, an application launch time by inputting the real-time system health parameters to an AI-based application prediction model. Further, the method includes boosting, by the electronic device, at least one hardware of the electronic device based on the predicted application launch time.

Abstract: A system may include electronic devices that communicate wirelessly. When positioned so that a pair of devices overlap or are near to one another, the devices may operate in a linked mode. During linked operations, devices may communicate wirelessly while input gathering and content displaying operations are shared among the devices. One or both of a pair of devices may have sensors. An orientation sensor, motion sensor, optical sensor, and/or other sensors may be used in identifying conditions in which to enter the linked mode and to identify a region where displays in the pair of devices overlap.

Abstract: Systems and methods are disclosed for migrating a virtual machine (VM) having a virtual function that maps resources of an artificial intelligence (AI) accelerator to the VM. A driver for the AI accelerator can generate a checkpoint of VM processes that make calls to the AI accelerator, and can the checkpoint can include a list and configuration of resources mapped to the AI accelerator by the virtual function. The driver can also access the code, data, and memory of the AI accelerator to generate a checkpoint of the AI accelerator status. When the VM is migrated to a new host, then either, or both, of these checkpoint frames can be used to ensure that resuming the VM on a new host having appropriate AI accelerator resources, can be successful resumed on the new host. One or both checkpoint frames can be captured based upon an event, in anticipation of the need to migrate the VM.

Abstract: Embodiments are generally directed to methods and apparatuses for encoding based on importance values. An embodiment of a computing system comprises: a graphics processing unit (GPU) to render a scene of a graphics application that includes a plurality of geometries into a color buffer within a frame buffer of the GPU; and an encoder to encode the content of the color buffer into a video bitstream based on a plurality of importance values that are assigned to each of the plurality of geometries.

Abstract: The present disclosure relates to a method for computing, computing device and computer-readable storage medium. The method includes: determining a pixel block set in a cache, a first pixel block in the pixel block set comprising an m×n pixel matrix having a first padding setting related to the original pixel data, the m and n being positive integers; and storing the determined pixel block set in a buffer to enable a second pixel block to be read from the buffer based on the buffer initial address of the first pixel block and an address offset associated with the second pixel block, wherein the second pixel block has a second padding setting related to the original pixel data, and the first padding setting and the second padding setting have the same offset amount in a first direction relative to the original pixel data.

Abstract: Methods, systems and apparatuses may provide for technology that determines measured timing data in response to a presentation request from an application, wherein the measured timing data is associated with one or more previous frames and the presentation request is associated with one or more subsequent frames. The technology may also determine scheduling times for the subsequent frame(s) based on the measured timing data, wherein the scheduling times include a simulation time, a rendering time, a driver submission time, a hardware submission time, and a display time. In one example, the technology controls a pacing of the subsequent frame(s) on a display in accordance with the scheduling times.

Abstract: Systems and methods for cache utilization are disclosed. In one embodiment, a graphics processor includes processing resources to perform graphics operations and a cache controller of a cache memory that is coupled to the processing resources. The cache controller is configured to set an initial aging policy using an aging field based on age of cache lines within the cache memory and to determine whether a hint or an instruction to indicate a level of aging has been received. In one embodiment, the cache memory configured to be partitioned into multiple cache regions, wherein the multiple cache regions include a first cache region having a cache eviction policy with a configurable level of data persistence.

Abstract: The graphics processing unit described herein is configured to process graphics data using a rendering space which is sub-divided into a plurality of tiles. The graphics processing unit comprises a tiling unit and rendering logic. The tiling unit is arranged to generate a tile control list for each tile, the tile control list identifying each graphics data item present in the tile. The rendering logic is arranged to render the tiles using the tile control lists generated by the tiling unit. The tiling unit comprises per-tile hash generation logic arranged to generate, for each tile, a per-tile hash value based on a set of textures that will be accessed when processing the tile in the rendering logic, and the tiling unit is further arranged to store the per-tile hash value for a tile within the tile control list for the tile.

Abstract: In an example method, a computer system accesses first data representing three-dimensional content and a plurality of bounding boxes. Each of the bounding boxes encloses at least a portion of the three-dimensional content. The computer system also access second data representing a viewing frustum for rendering the three-dimensional content. Based on the first and the second data, the computer system identifies a subset of the bounding boxes that are visible according to the viewing frustum. For each of the one or more bounding boxes of the subset, the computer system identifies an image tile from among a plurality of image tiles corresponding to the bounding box, and renders one or more video frames in a frame buffer based on the identified image tile.

Abstract: Systems and methods are disclosed including a memory device and a processing device operatively coupled to the memory device. The processing device can perform operations including applying an ordered set of error-handling operations to be performed on data residing in a segment of the memory device as an input to a trained machine learning model, wherein the trained machine learning model is based on latency data for previously-performed error-handling operations; and obtaining an output of the trained machine learning model, the output comprising a reordered set of error-handling operations to be performed on the data residing in the segment of the memory device, and wherein the reordered set adjusts an order of one or more error-handling operations of the ordered set of error-handling operations.

Abstract: Systems and methods are provided for performing random walk graph computing. One method may comprise generating a subset of walkers on a graph, maintaining the generated subset of walkers in a walker pool in a memory, loading a coarse-grained block of the graph from a non-volatile storage into a block buffer of the memory, generating pre-sampled edges for vertices in the coarse-grained block, storing the pre-sampled edges into a pre-sampled edge buffer allocated for the coarse-grained block and moving one or more walkers of the generated subset of walkers using the pre-sampled edges stored in the pre-sampled edge buffer. The generated subset of walkers may have an initial number determined based on a memory space allocated to the walker pool.

Abstract: A network architecture including network storage. The network architecture includes a plurality of streaming arrays, each streaming array including a plurality of compute sleds, wherein each compute sled includes one or more compute nodes. The network architecture includes a PCI Express (PCIe) fabric configured to provide direct access to the network storage from compute nodes of each of the plurality of streaming arrays, the PCIe fabric including a plurality of array-level PCIe switches, each array-level PCIe switch communicatively coupled to compute nodes of compute sleds of a corresponding streaming array and communicatively coupled to the storage server. The network storage is shared by the plurality of streaming arrays.

Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may process a first workload of a plurality of workloads at each of multiple clusters in a GPU pipeline. The apparatus may also increment a plurality of performance counters during the processing of the first workload at each of the multiple clusters. Further, the apparatus may determine, at each of the multiple clusters, whether the first workload is finished processing. The apparatus may also read, upon determining that the first workload is finished processing, a value of each of the multiple clusters for each of the plurality of performance counters. Additionally, the apparatus may transmit an indication of the read value of each of the multiple clusters for all of the plurality of performance counters.

Abstract: A computing device may receive a set of user documents. Data may be extracted from the documents to generate a first graph data structure with one or more initial graphs containing key-value pairs. A model may be trained on the first graph data structure to classify the pairs. Until a set of evaluation metrics for the model exceeds a set of deployment thresholds: generating, a set of evaluation metrics may be generated for the model. The set of evaluation metrics may be compared to the set of deployment thresholds. In response to a determination that the set of evaluation metrics are below the set of deployment thresholds: one or more new graphs may be generated from the one or more initial graphs in the first graph data structure to produce a second graph data structure. The first and second graph can be used to train the model.

Abstract: An image display method includes: displaying, on a user interface, a first image loaded into a first image container in a sliding container; adding a second image container to the sliding container in response to an image switching instruction; loading a second image into the second image container, and the second image being an image located behind the first image in a queue of images to be played; and displaying the second image on the user interface.

Abstract: Disclosed are an image processing method and device using a line-wise operation. The image processing device, according to one embodiment, comprises: a receiver for receiving an image; a first convolution operator for generating a feature map by performing a convolution operation on the basis of the image; and a compressor for compressing the feature map into units of at least one line; and a decompressor for reconstructing the feature map compressed into units of lines.

Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.

Abstract: A processing system concurrency optimization system includes a processing system having first and second processing subsystems, a power system that is coupled to the first and second processing subsystems, a processing system concurrency optimization database, and a processing system concurrency optimization subsystem that is coupled to the power system and the processing system concurrency optimization database. The processing system concurrency optimization subsystem determines that a first workload has been provided for performance by the processing system, and identifies a first processing system concurrency optimization profile that is associated with the first workload in the processing system concurrency optimization database.

Abstract: There is described a method of shading a group of pixels in a fragment shader in a raster graphics pipeline. At least one first pilot pixel of the group of pixels is shaded under a first precision. At least one second pilot pixel of the group of pixels is shaded under a second precision. An error value representing a difference between the first and second pilot pixels is calculated. At least one other pixel of the group of pixels is shaded under the first precision if the error value is greater than an error threshold. The at least one other pixel is shaded under the second precision if the error value is smaller than the error threshold.

Abstract: A graphics rendering method includes obtaining, by a central processing unit (CPU), to-be-processed vertex data. The to-be-processed vertex data is vertex data used by a graphics processing unit (GPU) for graphics rendering processing. The method also includes processing, by the CPU, the to-be-processed vertex data to obtain vertex data within a field of view of a user. The method additionally includes sending, by the CPU, the vertex data within the field of view of the user to the GPU for the graphics rendering processing.

Abstract: A processing device having a graphical user interface includes a touch screen display that receives touch gesture commands from a vehicle operator and a controller. In operation, computer code implements a set of widgets such that at least one widget is normally viewable on the touch screen display. The set of widgets are organized to include at least one home screen, such as a motion home screen that displays at least one travel related widget, a lift home screen that displays at least one lift related widget, etc. When a current operating state of a control module of the industrial vehicle indicates that a designated control is engaged, the controller causes the display to snap to the associated home screen position.

Abstract: An apparatus to facilitate graphics rendering is disclosed. The apparatus comprises sequencer hardware to operate in a tile mode to render objects, including performing batch formation to generate one or more batches of received objects, performing tile sequencing for each of the objects to compute tile fill intersects for each of the objects and performing a play sequencing of each of the objects.

Abstract: A graphics processing unit having multiple groups of processor cores for rendering graphics data for allocated tiles and outputting the processed data to regions of a memory resource. Scheduling logic allocates sets of tiles to the groups of processor cores to perform a first render, and at a time when at least one of the groups has not completed processing its allocated sets of one or more tiles as part of the first render, allocates at least one set of tiles for a second render to one of the other groups of processor cores for processing. Progress indication logic indicates progress of the first render, indicating regions of the memory resource for which processing for the first render has been completed. Progress check logic checks the progress indication in response to a request for access to a region of the memory resource as part of the second render and enables access that region of the resource in response to an indication that processing for the first render has been completed for that region.

Abstract: A driving signal processing method for a large touch display integrated (LTDI) system is provided. The LTDI system includes plural LTDI chips that are concatenated. The LTDI chips include a master LTDI chip and plural slave LTDI chips. The driving signal processing method includes: receiving, by the LTDI chips, display data from a timing controller; and dispersedly outputting, by the master LTDI chip and at least one of the slave LTDI chips, M gate control signals respectively corresponding to M gate lines of a display panel of the LTDI system according to the display data during the display stage of the display panel.

Abstract: Techniques for rendering two-dimensional vector graphics are described. The techniques include using a central processing unit to generate tessellate triangles along a vector path in which each of the tessellate triangles is represented by a set of vertices. From the tessellate triangles, an index buffer and a compressed vertex buffer are generated. The index buffer includes a vertex index for each vertex of each of the tessellate triangles. The compressed vertex buffer includes a vertex buffer entry for each unique vertex that maps to one or more vertex indices of the index buffer. The index buffer and the compressed vertex buffer are provided to a graphics processing unit to render the vector path with anti-aliasing.

Abstract: A method of operating a tile-based graphics processor that executes a graphics processing pipeline is disclosed. When there are no more primitives left to be provided for processing to the pipeline for a rendering tile, it is determined whether any remaining processing steps for the rendering tile can be omitted, e.g. because they will not affect a buffer that will be output when the rendering tile is complete. When it is determined that a processing step can be omitted, that processing step is omitted.

Abstract: A data path interface circuit includes: a writing path module, connected to an internal port and an external port and configured to transmit stored data to the internal port from the external port; a reading path module, connected to the internal port and external port respectively and configured to transmit the stored data to the external port from the internal port; a first delay module, connected to the external port and internal port respectively, and configured to obtain the stored data from the external port or internal port, perform delay processing on the stored data, and transmit the delayed stored data to the writing path module and/or reading path module; and a delay control module, connected to the first delay module and configured to receive a signal instruction from external and control delay time for the first delay module to perform the delay processing according to the signal instruction.

Abstract: Methods and tiling engines for storing tiling primitives in a graphics processing system.

Abstract: A decoder is configured to decode a plurality of texels from a received block of texture data encoded according to the Adaptive Scalable Texture Compression (ASTC) format, and includes a parameter decode unit configured to decode configuration data for the received block of texture data, a colour decode unit configured to decode colour endpoint data for the plurality of texels of the received block in dependence on the configuration data, a weight decode unit configured to decode interpolation weight data for each of the plurality of texels of the received block in dependence on the configuration data, and at least one interpolator unit configured to calculate a colour value for each of the plurality of texels of the received block using the interpolation weight data for that texel and a pair of colour endpoints from the colour endpoint data.

Abstract: Methods and systems of routing a design layout include setting an inner region and an outer region for modification of structures in an original design layout, in accordance with a minimum spacing that is based on a fabrication process. Routing of trim positions and conductive wire extents is performed within the inner region, based on positions of shapes within the outer region, including node folding of a new constraint graph to minimize perturbations from a previous constraint graph, to generate an updated design layout that can be manufactured using the fabrication process.